Fwd: FSW-2023 Registration is now open! Secure your ticket

Hi This is the first in-person FSW since before COVID. This is a workshop focused on space going applications. The presentations tend to be very interesting and top notch. Plus the opportunity to speak with others in the field is really incredible. OAR is planning to be there including myself

[PATCH] bsp/tms570: Add -mbe32 to LINKFLAGS

There is not just big-endian on ARM. We have two variants BE32 (obsolete) and BE8. The Cortex-R5F processor supports only BE8, however, some TMS570 variants are BE32 internally. In GCC 8 and later, the --be8 option is passed to the linker based on the selected architecture or CPU. Use BE32 by

[PATCH v2 4/4] bsps/shared/: Use device tree blob

If the bsp is integrated and supported a device tree blob(dtb) then use dtb instead of using it from the U-Boot (BSP_START_COPY_FDT_FROM_U_BOOT=False). --- bsps/shared/start/bsp-fdt.c | 8 1 file changed, 8 insertions(+) diff --git a/bsps/shared/start/bsp-fdt.c

[PATCH v2 2/4] spec/build/bsps: Add dtb support

Add dtb and dtb header path configurable build option --- spec/build/bsps/optdtb.yml | 19 +++ spec/build/bsps/optdtbheaderpath.yml | 20 2 files changed, 39 insertions(+) create mode 100644 spec/build/bsps/optdtb.yml create mode 100644

[PATCH v2 1/4] bsps/riscv: Add device tree blob

Add the basic Microchip PolarFire SoC device tree source and blob The mpfs-dtb.h is generated by the bin2hex https://github.com/padmaraob/bin2hex 1.Compile and build the bin2hex.c $ gcc -o bin2hex bin2hex.c 2.Generate the mpfs.dtb from the mpfs.dts $ dtc -O dtb -o mpfs.dtb

[PATCH v2 3/4] bsps/riscv: Add Microchip PolarFire SoC BSP variant

The Microchip PolarFire SoC support is implemented as a riscv BSP variant to boot with any individual hart(cpu core) or SMP based on the boot HARTID configurable and support components are 4 CPU Cores (U54), Interrupt controller (PLIC), Timer (CLINT), UART. --- bsps/riscv/riscv/clock/clockdrv.c

[PATCH v2 0/4] Microchip PolarFire SoC support

This patch set adds the Microchip PolarFire SoC BSP Variant support to RISC-V RTEMS. The PolarFire SoC is the 4x 64-bit RISC-V U54 cores and a 64-bit RISC-V E51 monitor core SoC from Microchip, more info available here: https://www.microchip.com/en-us/products/fpgas-and-plds/

Re: [PATCH] bsps/riscv/riscv: Fix fe310_uart_read

On 18/09/2022 21:22, Alan Cudmore wrote: Note: Resending after learning how to use git send-email, please disregard previous message. This fixes the riscv fe310 console driver fe310_uart_read function. The function reads the RX status/data register to check if data is available, but discards

Successful Hello world from RPi4B AArch64 over serial

Hey everyone, I've managed to get RTEMS6 on the Raspberry pi 4B rev 1.4. Every test ran fine except for minimum.exe, It gave a fatal error. Here's my setup for running RTEMS6 on RPi4B: TF-A is required to enable GIC on RPi. I had tried to use armstub-gic.S (

Re: Successful Hello world from RPi4B AArch64 over serial

Great progress Noor! I will try your branch today. Alan On Mon, Sep 19, 2022 at 12:15 PM Joel Sherrill wrote: > > > On Mon, Sep 19, 2022 at 10:11 AM Noor Aman wrote: > >> Hey everyone, >> I've managed to get RTEMS6 on the Raspberry pi 4B rev 1.4. Every test ran >> fine except for minimum.exe,

RE: Successful Hello world from RPi4B AArch64 over serial

I built the TF-A binary, your dev branch, used the config.txt described below, and was able to run unlimited.exe. (I’m using a Pi4b 2GB)Great milestone!Alan From: Noor AmanSent: Monday, September 19, 2022 11:11 AMTo: William Moore; Alan Cudmore; Hesham Moustafa; rtems-de...@rtems.orgSubject:

Re: OT: [PATCH rtems-lwip v3 1/7] lwip.py: Change arch and bsp check method

On 9/19/2022 04:28, Cedric Berger wrote: Sorry for a slightly off-topic question here: [...] In that case, I'll stick with the BSP management improvements once v4 of this patch set goes in (probably) and skip the generic build. Is a generic build something that would be worth pursuing for

Re: [PATCH v2 0/4] Microchip PolarFire SoC support

Hi Padmarao, The patches apply cleanly and build for me. What is the recommended config.ini file for this BSP? I used: [riscv/mpfs64imafdc] BUILD_TESTS=True RTEMS_POSIX_API=True RTEMS_SMP=True BSP_START_COPY_FDT_FROM_U_BOOT=False BSP_DTB_IS_SUPPORTED=True BSP_DTB_HEADER_PATH=bsp/mpfs-dtb.h I

Re: Successful Hello world from RPi4B AArch64 over serial

On Mon, Sep 19, 2022, 1:23 PM Alan Cudmore wrote: > I built the TF-A binary, your dev branch, used the config.txt described > below, and was able to run unlimited.exe. (I’m using a Pi4b 2GB) > > Great milestone! > This is great news! Now to get it merged for others. Are any other peripherals

Re: Successful Hello world from RPi4B AArch64 over serial

On Mon, Sep 19, 2022 at 10:11 AM Noor Aman wrote: > Hey everyone, > I've managed to get RTEMS6 on the Raspberry pi 4B rev 1.4. Every test ran > fine except for minimum.exe, It gave a fatal error. > Congratulations! Hoozah! minimum.exe is supposed to reflect the smallest application you can

Re: [PATCH] c-user: Add application config info directives

On 19/9/2022 5:21 pm, Sebastian Huber wrote: > On 17/09/2022 09:31, Chris Johns wrote: >>> +rtems_configuration_get_do_zero_of_workspace() >>> +-- >>> + >>> +Indicates if the RTEMS Workspace is configured to be zeroed during system >>> +initialization

Re: Integrating the Formal Methods part of Qualification

Dear Andrew, > It's great to see a move toward formal verification for RTEMS. Great to hear about other work in this space as well ! > From our side (TU Dortmund in Germany and the University of Twente in the > Netherlands), we recently adopted Frama-C to verify ICPP and MrsP. A > potential

OT: [PATCH rtems-lwip v3 1/7] lwip.py: Change arch and bsp check method

Sorry for a slightly off-topic question here: [...] In that case, I'll stick with the BSP management improvements once v4 of this patch set goes in (probably) and skip the generic build. Is a generic build something that would be worth pursuing for lwIP? It would come with the core stacks,

Re: [PATCH] c-user: Add application config info directives

On 17/09/2022 09:31, Chris Johns wrote: +rtems_configuration_get_do_zero_of_workspace() +-- + +Indicates if the RTEMS Workspace is configured to be zeroed during system +initialization for this application. + +.. rubric:: CALLING SEQUENCE: + +..