On Wed, 6 Jan 2021 at 07:30, somesh deshmukh wrote:
>
> After testing multiple times I observed that the failing instruction is not
> consistent but I am getting mcause as 2 every time, which represents Illegal
> instruction.
This sounds like memory is being overwritten.
> Is it compulsory to
After testing multiple times I observed that the failing instruction is not
consistent but I am getting mcause as 2 every time, which represents
Illegal instruction.
Is it compulsory to use the device tree to boot RTEMS? I am trying to boot
it using a simple bootloader application that will copy
Hi Robin,
On Tue, Jan 5, 2021 at 5:20 AM Robin.Mueller
wrote:
> commit 8bcd2c40ac28bf575d6e012c57e3546799eefb40
> Author: Robin.Mueller
> Date: Tue Jan 5 12:16:19 2021 +0100
>
> deleted old cfg file
>
> commit 2da3db8799018e98d2237ee54b13f163690fbeb2
> Author: Robin.Mueller
> Date:
I don't see why the "auipc" would fail. Are you sure that's the
faulting instruction? Can you read mcause/mepc from your debugger
after it hangs?
How/where do you prepare the FDT and pass it to RTEMS? bsp_fdt_copy
expects the bootloader to pass the HARTID in a0, and the FDT pointer
in a1.
On
commit 8bcd2c40ac28bf575d6e012c57e3546799eefb40
Author: Robin.Mueller
Date: Tue Jan 5 12:16:19 2021 +0100
deleted old cfg file
commit 2da3db8799018e98d2237ee54b13f163690fbeb2
Author: Robin.Mueller
Date: Tue Jan 5 12:13:03 2021 +0100
removed some moved components
commit
---
This patch was updated after the configuration structs for the STM32
were moved into separate files.
bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
Hi All,
I am trying to boot RTEMS on PolarFire SoC FPGA using rv64imafdc_medany BSP.
I am using a simple bare-metal bootloader application to copy the
hello.bin(I generated a hello.bin file from hello.exe from
testsuits/samples directory) at the address 0x8000.
Attached is the disassembly of
