That's probably ok. I haven't ever used one of the breakout cables to
connect to a SATA connector, but it sounds like SATA cables don't have
the built in crossover like the SAS ones do.
Matt
On 12/07/2009 11:57 AM, Charles Irick wrote:
Thank you for the fast reply. It looks like I need th
Thank you for the fast reply. It looks like I need the SATA fanout
connectors to be the host in this case because pin 2-3 are TX for the
SATA port. Would there be any issue having the mini-SAS as the target?
(part: iSAS-7P88-U)
Charles
On Mon, Dec 7, 2009 at 2:29 PM, Matt Ettus wrote:
> On 12/07
On 12/07/2009 11:17 AM, Charles Irick wrote:
Hello,
I am narrowing down my issues and I think my problem is related to
physically connecting the USRP2 to the V5 and it being a host to host
connection. (I think I have Tx connected to Tx and Rx to Rx) For
verification, are the A1-A13 pins on top or
Hello,
I am narrowing down my issues and I think my problem is related to
physically connecting the USRP2 to the V5 and it being a host to host
connection. (I think I have Tx connected to Tx and Rx to Rx) For
verification, are the A1-A13 pins on top or the B1-B13 pins for the
mini-SAS port? (
http:
On 12/01/2009 12:58 PM, Charles Irick wrote:
Hello,
I'm most likely having a clock issue because I cannot get any data
transfers going between the USRP2 and GTPs on the V5. A few questions:
- I'm not quite sure I understand the 10MHz reference clock idea, or
its usage; I looked through the HDL a
Hello,
I'm most likely having a clock issue because I cannot get any data
transfers going between the USRP2 and GTPs on the V5. A few questions:
- I'm not quite sure I understand the 10MHz reference clock idea, or
its usage; I looked through the HDL and everything on the FPGA is
running at 100MHz.
On 11/24/2009 03:10 PM, Charles Irick wrote:
Hello,
I'm looking to use the MIMO port to send serial data to a Virtex5
board and am trying to get an idea of how to set up the USRP2 to
achieve this.
- I was wondering how a simple loopback test might be achieved.
Something simple like taking what t
Hello again,
I decided to try and run the mimo_tx.bin (built from SVN rev 11663) as
the s/w firmware and use the Virtex5 board as the "slave USRP2" since
this would require almost no changes to the gnuradio side. I'm using
u2_rev3_ise10.1sp3_r11370.bin as the FPGA bitstream. When I run the
host app
Hello,
I'm looking to use the MIMO port to send serial data to a Virtex5
board and am trying to get an idea of how to set up the USRP2 to
achieve this.
- I was wondering how a simple loopback test might be achieved.
Something simple like taking what the TI chip gives the FPGA and
sending it back o
