[Intel-gfx] [v3 0/7] Crystalcove (CRC) PMIC based panel and pwm control

On Fri, Jun 26, 2015 at 06:31:37PM +0200, Daniel Vetter wrote: > On Fri, Jun 26, 2015 at 02:32:03PM +0530, Shobhit Kumar wrote: > > Hi, > > Next update of the series reviewed at > > https://lkml.org/lkml/2015/6/22/155 > > > > Major changes are few review comments from Varka and Ville being

[Bug 100541] Since 4.1, the mouse cursor is corrupted after suspend/resume

https://bugzilla.kernel.org/show_bug.cgi?id=100541 Alex Deucher changed: What|Removed |Added CC||alexdeucher at gmail.com --- Comment #1

[Bug 100541] New: Since 4.1, the mouse cursor is corrupted after suspend/resume

https://bugzilla.kernel.org/show_bug.cgi?id=100541 Bug ID: 100541 Summary: Since 4.1, the mouse cursor is corrupted after suspend/resume Product: Drivers Version: 2.5 Kernel Version: 4.1 Hardware: All

[GIT PULL]: dma-buf changes for 4.2

Hi Linus, Very small pull request on dma-buf for 4.2 merge window. May I request you to please pull? The following changes since commit 5ebe6afaf0057ac3eaeb98defd5456894b446d22: Linux 4.1-rc2 (2015-05-03 19:22:23 -0700) are available in the git repository at:

[PATCH] drm/radeon: fix adding all VAs to the freed list on remove

On 26.06.2015 17:41, Christian König wrote: > From: Christian König > > We only should do so when the BO_VA was actually mapped. > Otherwise we get a nice error message on the next CS. > > Signed-off-by: Christian König Tested-by: Michel Dänzer -- Earthling Michel Dänzer

[Intel-gfx] [v3 0/7] Crystalcove (CRC) PMIC based panel and pwm control

On Fri, Jun 26, 2015 at 02:32:03PM +0530, Shobhit Kumar wrote: > Hi, > Next update of the series reviewed at > https://lkml.org/lkml/2015/6/22/155 > > Major changes are few review comments from Varka and Ville being addressed. > Also except > for intel-gfx patches, all patches reviesion history

[PATCH v2 5/5] drm/rockchip: default enable win2/3 area0 bit

Win2/3 support 4 area display, but now havn't found a suitable way to use it, and it enable by win gate and area gate, so default enable area0 gate, so that its behaviour just like a win. Signed-off-by: Mark Yao --- Changes in v2: None drivers/gpu/drm/rockchip/rockchip_drm_vop.c |6 ++

[PATCH v2 4/5] drm/rockchip: vop: switch cursor plane to window 3

Window 1 support scale and yuv format, it's waste use it for a cursor, use window 3 is enough. Signed-off-by: Mark Yao --- Changes in v2: None drivers/gpu/drm/rockchip/rockchip_drm_vop.c |7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git

[PATCH v2 3/5] drm/rockchip: vop: support plane scale

Win_full support 1/8 to 8 scale down/up engine, support all format scale. Signed-off-by: Mark Yao --- Changes in v2: - Fix scale dest info. drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 389 ++- drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 96 +++ 2 files

[PATCH v2 2/5] drm/rockchip: vop: fix yuv plane support

vop support yuv with NV12, NV16 and NV24, only 2 plane yuv. Signed-off-by: Mark Yao Changes in v2: - Uv buffer not support odd offset, align it. - Fix error display when move yuv image. --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 63 --- 1 file changed, 57

[PATCH v2 1/5] drm/rockchip: vop: optimize virtual stride calculate

vir_stride need number words of the virtual width, and fb->pitches save bytes_per_pixel, so just div 4 switch to stride. Signed-off-by: Mark Yao --- Changes in v2: None drivers/gpu/drm/rockchip/rockchip_drm_vop.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH v2 0/5] drm/rockchip: support yuv overlay and plane scale

This series patches are used for yuv image overlay display. Rockchip vop support NV11, NV16, NV24 yuv format, and can scale the image scale 1/8 to 8. Changes in v2: - Uv buffer not support odd offset, align it. - Fix error display when move yuv image. - Fix scale dest info. Mark Yao (5):

[v3 5/7] pwm: crc: Add Crystalcove (CRC) PWM driver

On 06/26/2015 02:32 PM, Shobhit Kumar wrote: > The Crystalcove PMIC provides three PWM signals and this driver exports > one of them on the BYT platform which is used to control backlight for > DSI panel. This is platform device implementation of the drivers/mfd > cell device for CRC PMIC. > > CC:

[PATCH] staging: imx-drm: Fix pixel clock polarity

Hi David, Am Freitag, den 26.06.2015, 13:26 +0200 schrieb David Jander: > This is odd. We started investigating because one of our customers (using an > LVDS connected panel) reported some boards causing color errors in gradients. > If you displayed for example a horizontal red gradient from 0 to

[PATCH 1/2] drm: bridge/dw_hdmi: fix register I2CM_ADDRESS register name

Hello David, On 08.06.2015 17:17, Vladimir Zapolskiy wrote: > Hi David, Philipp, Andy, Russell, > > On 19.05.2015 17:39, Andy Yan wrote: >> Hi Vladimir, >>Thanks for you patch. >> >> On 2015年05月18日 20:32, Vladimir Zapolskiy wrote: >>> I2CM_ADDRESS became a MESS, fix it, also change

[PATCH 2/2] drm/msm/mdp5: Allocate CTL0/1 for dual DSI single FLUSH

This change takes advantage of a HW feature that synchronize flush operation on CTL1 to CTL0, to keep dual DSI pipes in sync. Signed-off-by: Hai Li --- drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c | 140 drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.h | 4 +-

[PATCH 1/2] drm/msm/mdp5: Allocate CTL for each display interface

In MDP5, CTL contains information of the whole pipeline whose output goes down to a display interface. In various cases, one interface may require 2 CRTCs, but only one CTL. Some interfaces also require to use certain CTLs. Instead of allocating CTL for each active CRTC, this change is to

[PATCH 0/2] drm/msm/mdp5: Refactor CTL code

Instead of allocating CTL for each CRTC, we start to associate CTL to each display interface, which reflects real HW requirement. It also helps in making use of HW single FLUSH feature to sync between dual DSI pipes. Hai Li (2): drm/msm/mdp5: Allocate CTL for each display interface

[PATCH 1/2] drm: bridge/dw_hdmi: fix register I2CM_ADDRESS register name

On Fri, Jun 26, 2015 at 05:24:12PM +0300, Vladimir Zapolskiy wrote: > Hello David, > > On 08.06.2015 17:17, Vladimir Zapolskiy wrote: > > what would be the next action regarding these two patches? If review is > > done, should they go to drm-dwhdmi-devel or drm-next ? > > ping. I don't think it

[PATCH] drm/msm: mdp4: Fix drm_framebuffer dereference crash

mdp4_get_frame_format() can dereference a drm_framebuffer when it's NULL. Call it in mdp4_plane_mode_set only when we know fb is non-NULL. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[PATCH 1/1] gpu/drm: remove unnecessary check before kfree

On 26.06.2015 15:25, Maninder Singh wrote: > kfree(NULL) is safe and this check is probably not required > > Signed-off-by: Maninder Singh > Reviewed-by: Vaneet Narang > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff

[git pull] drm tree for 4.2

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[v3 7/7] drm/i915: Backlight control using CRC PMIC based PWM driver

Use the CRC PWM device in intel_panel.c and add new MIPI backlight specififc callbacks v2: Modify to use pwm_config callback v3: Addressed Jani's comments - Renamed all function as pwm_* instead of vlv_* - Call intel_panel_actually_set_backlight in enable function - Return -ENODEV in

[v3 6/7] drm/i915: Use the CRC gpio for panel enable/disable

The CRC (Crystal Cove) PMIC, controls the panel enable and disable signals for BYT for dsi panels. This is indicated in the VBT fields. Use that to initialize and use GPIO based control for these signals. v2: Use the newer gpiod interface(Alexandre) v3: Remove the redundant checks and unused code

[v3 5/7] pwm: crc: Add Crystalcove (CRC) PWM driver

The Crystalcove PMIC provides three PWM signals and this driver exports one of them on the BYT platform which is used to control backlight for DSI panel. This is platform device implementation of the drivers/mfd cell device for CRC PMIC. CC: Samuel Ortiz Cc: Linus Walleij Cc: Alexandre Courbot

[v3 4/7] mfd: intel_soc_pmic_core: ADD PWM lookup table for CRC PMIC based PWM

On some BYT PLatform the PWM is controlled using CRC PMIC. Add a lookup entry for the same to be used by the consumer (Intel GFX) CC: Samuel Ortiz Cc: Linus Walleij Cc: Alexandre Courbot Cc: Thierry Reding Acked-by: Lee Jones Tested-by: Ville Syrjälä Signed-off-by: Shobhit Kumar --- v2:

[v3 3/7] mfd: intel_soc_pmic_crc: Add PWM cell device for Crystalcove PMIC

Needed for PWM control suuported by the PMIC CC: Samuel Ortiz Cc: Linus Walleij Cc: Alexandre Courbot Cc: Thierry Reding Acked-by: Lee Jones Tested-by: Ville Syrjälä Signed-off-by: Shobhit Kumar --- v2: Correct the subject line (Lee jones) drivers/mfd/intel_soc_pmic_crc.c | 3 +++ 1

[v3 2/7] mfd: intel_soc_pmic_core: Add lookup table for Panel Control as GPIO signal

On some Intel SoC platforms, the panel enable/disable signals are controlled by CRC PMIC. Add those control as a new GPIO in a lookup table for gpio-crystalcove chip during CRC driver load CC: Samuel Ortiz Cc: Linus Walleij Cc: Alexandre Courbot Cc: Thierry Reding Acked-by: Lee Jones

[v3 1/7] gpiolib: Add support for removing registered consumer lookup table

In case we unload and load a driver module again that is registering a lookup table, without this it will result in multiple entries. Provide an option to remove the lookup table on driver unload Cc: Samuel Ortiz Cc: Linus Walleij Cc: Alexandre Courbot Cc: Thierry Reding Reviewed-by:

[v3 0/7] Crystalcove (CRC) PMIC based panel and pwm control

Hi, Next update of the series reviewed at https://lkml.org/lkml/2015/6/22/155 Major changes are few review comments from Varka and Ville being addressed. Also except for intel-gfx patches, all patches reviesion history is moved out of commit message. Hope this series finally finds its mark.

Color management in DRM framework

Hi Shashank, I have been working on support for colorspace handling for V4L2 (video capture), basically the flip-side of the coin that you are working on. While both the V4L2 and DRM/KMS APIs are completely different, the part that does the matrix calculations can be shared between the two. I

[git pull] drm tree for 4.2

On Fri, Jun 26, 2015 at 1:37 PM, Dave Airlie wrote: > > No generally Linus likes to do his own merges with hints from us. > > unless it's really tricky. Yup. And this time all the merges were trivial. My merge ended up differing from Dave's simply because of an ordering of statements that could

[PATCH v2] drm/amdgpu: use kzalloc for allocating one thing

Use kzalloc rather than kcalloc(1.. for allocating one thing. Signed-off-by: Maninder Singh Reviewed-by: Vaneet Narang Reviewed-by: Christian Konig --- v2: Chnged shortlog prefix - gpu/amdgpu drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[PATCH v2] drm/amdgpu: remove unnecessary check before kfree

kfree(NULL) is safe and this check is probably not required Signed-off-by: Maninder Singh Reviewed-by: Vaneet Narang Reviewed-by: Christian Konig --- v2: Chnged shortlog prefix - gpu/amdgpu drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)

[PATCH] staging: imx-drm: Fix pixel clock polarity

Dear Philipp, On Fri, 26 Jun 2015 12:27:03 +0200 Philipp Zabel wrote: > Hi David, > > Am Freitag, den 26.06.2015, 09:51 +0200 schrieb David Jander: > > clk_pol should almost always be 1 (active-high pixel clock). When using the > > LDB, it must be 1 and for externally connected displays it

[PATCH 5/5] drm/msm/dsi: Modify dsi manager bridge ops to work with external bridges

The dsi bridge ops call drm_panel functions to set up the connected drm_panel. Add checks to make sure these aren't called when we're connected to an external bridge. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/dsi/dsi_manager.c | 43 +++ 1 file changed,

[PATCH 4/5] drm/msm/dsi: Allow dsi to connect to an external bridge

There are platforms where the DSI output can be connected to another encoder bridge chip (DSI to HDMI, DSI to LVDS etc). Add support for external bridge support to the dsi driver. We assume that the external bridge chip would be of the type drm_bridge. The dsi driver's internal drm_bridge

[PATCH 3/5] drm/msm/dsi: Create a helper to check if there is a connected device

Create a helper msm_dsi_device_connected() which checks whether we have a device connected to the dsi host or not. This check gets messy when we have support external bridges too. Having an inline function makes it more legible. For now, the check only consists of msm_dsi->panel being non-NULL.

[PATCH 2/5] drm/msm/dsi: Refer to connected device as 'device' instead of 'panel'

We currently support only panels connected to dsi output. We're going to also support external bridge chips now. Change 'panel_node' to 'device_node' in the struct msm_dsi_host and 'panel_flags' to 'device_flags' in msm_dsi. This makes things sound a bit more generic. Signed-off-by: Archit

[PATCH 1/5] drm/msm/dsi: Make TE gpio optional

Platforms containing only DSI video mode devices don't need a TE gpio. Make TE gpio optional. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/dsi/dsi_host.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c

[PATCH 0/5] drm/msm/dsi: Add support for external bridge chips

The dsi driver only connects to drm_panel devices right now. drm_bridge based devices can be used to implement external encoder chips (like DSI to HDMI, DSI to LVDS) etc. Make changes such that the dsi driver works with drm_bridge devices. This enables the driver to connect with the encoder chips

[PATCH v2 3/3] drm/msm: mdp4 lvds: get panel node via of graph parsing

We currently get the output connected to LVDS by looking for a phandle called 'qcom,lvds-panel' under the mdp DT node. Use the more standard of_graph approach to create an lvds output port, and retrieve the panel node from the port's endpoint data. Signed-off-by: Archit Taneja ---

[PATCH v2 2/3] drm/msm: dsi host: Use device graph parsing to parse connected panel

The dsi host looks for the connected panel node by parsing for a child named 'panel'. This hierarchy isn't very flexible. The connected panel is forced to be a child to the dsi host, and hence, a mipi dsi device. This isn't suitable for dsi devices that don't use mipi dsi as their control bus.

[PATCH v2 1/3] drm/msm: dsi host: add missing of_node_put()

Decrement device node refcount if of_get_child_by_name is successfully called. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/dsi/dsi_host.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c

[PATCH v2 0/3] drm/msm: Use device graph to parse connected panels

drm/msm currently relies on phandles/child nodes to get data about connected panels to LVDS and DSI. This method has known limitations. Use device graphs in DT to represent the connections between the encoder outputs and the panels. Use of_graph helpers in the driver to get the panel device node.

[PATCH v2] drm/amdgpu: remove unnecessary check before kfree

On Fri, Jun 26, 2015 at 3:56 AM, Maninder Singh wrote: > kfree(NULL) is safe and this check is probably not required > > Signed-off-by: Maninder Singh > Reviewed-by: Vaneet Narang > Reviewed-by: Christian Konig Applied. thanks! Alex > --- > v2: Chnged shortlog prefix - gpu/amdgpu > >

[PATCH v2] drm/amdgpu: use kzalloc for allocating one thing

On Fri, Jun 26, 2015 at 3:58 AM, Maninder Singh wrote: > Use kzalloc rather than kcalloc(1.. for allocating > one thing. > > Signed-off-by: Maninder Singh > Reviewed-by: Vaneet Narang > Reviewed-by: Christian Konig > --- > v2: Chnged shortlog prefix - gpu/amdgpu Applied. thanks! Alex > >

[PATCH] drm/radeon: fix adding all VAs to the freed list on remove v2

On Fri, Jun 26, 2015 at 6:31 AM, Christian König wrote: > From: Christian König > > We only should do so when the BO_VA was actually mapped. > Otherwise we get a nice error message on the next CS. > > v2: It actually doesn't matter if it was invalidated or not, > if it was mapped we need

drm: rcar-du: Clarify error message when encoder initialization fails

Hello Laurent Pinchart, This is a semi-automatic email about new static checker warnings. The patch 64549cdf85a1: "drm: rcar-du: Clarify error message when encoder initialization fails" from May 26, 2015, leads to the following Smatch complaint: drivers/gpu/drm/rcar-du/rcar_du_kms.c:651

[PATCH] drm/radeon: fix adding all VAs to the freed list on remove v2

From: Christian König We only should do so when the BO_VA was actually mapped. Otherwise we get a nice error message on the next CS. v2: It actually doesn't matter if it was invalidated or not, if it was mapped we need to clear the area where it was mapped.

[PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel

From: Philipp Zabel According to the data sheet, the minimum horizontal blanking interval is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the minimum working horizontal blanking interval to be 60 clocks. Signed-off-by: Philipp Zabel Signed-off-by:

[PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel

From: Philipp Zabel Signed-off-by: Philipp Zabel Signed-off-by: Lucas Stach --- drivers/gpu/drm/panel/panel-simple.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index

[PATCH] staging: imx-drm: Fix pixel clock polarity

Hi David, Am Freitag, den 26.06.2015, 09:51 +0200 schrieb David Jander: > clk_pol should almost always be 1 (active-high pixel clock). When using the > LDB, it must be 1 and for externally connected displays it should most > probably also be 1. Original Freescale code sets this bit always, except

[PATCH v2] scripts/kernel-doc: Adding cross-reference links to html documentation.

Functions, Structs and Parameters definitions on kernel documentation are pure cosmetic, it only highlights the element. To ease the navigation in the documentation we should use inside those tags so readers can easily jump between methods directly. This was discussed in 2014[1] and is

[PATCH 1/1] gpu/drm: remove unnecessary check before kfree

kfree(NULL) is safe and this check is probably not required Signed-off-by: Maninder Singh Reviewed-by: Vaneet Narang --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

[PATCH 1/1] gpu/drm: use kzalloc for allocating one thing

Use kzalloc rather than kcalloc(1.. for allocating one thing. Signed-off-by: Maninder Singh Reviewed-by: Vaneet Narang --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

[Bug 90263] GPU card fans run full speed at all times

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Color management in DRM framework

Hi Shashank, On 25 June 2015 at 17:19, Sharma, Shashank wrote: > Gentle reminder for the review and comments. > > > > For those who prefer having the design available with the mail, I am > attaching a PDF copy of the design document with this mail. > Perhaps I'm not hte best person to comment on

[Intel-gfx] [v2 7/7] drm/i915: Backlight control using CRC PMIC based PWM driver

On Thu, 25 Jun 2015, Shobhit Kumar wrote: > On Thu, Jun 25, 2015 at 2:18 PM, Ville Syrjälä > wrote: >> On Mon, Jun 22, 2015 at 04:24:25PM +0530, Shobhit Kumar wrote: >>> Use the CRC PWM device in intel_panel.c and add new MIPI backlight >>> specififc callbacks >>> >>> v2: Modify to use

[PATCH] drm/vblank: WARN_ON nested use of drm_vblank_on/off

On 22 June 2015 at 14:02, Daniel Vetter wrote: > We should never nest these since in theory kms drivers should know > when a pipe is on/off and call the corresponding enable/disable > functions for the vblank helper code only once. But for historical > reasons (the shared-with-ums version of this

[PATCH] scripts/kernel-doc: Adding cross-reference links to html documentation.

On 06/24/2015 06:22 PM, Daniel Vetter wrote: > On Wed, Jun 24, 2015 at 04:10:24PM -0300, Danilo Cesar Lemes de Paula wrote: >> Functions, Structs and Parameters definitions on kernel documentation >> are pure cosmetic, it only highlights the element. >> >> To ease the navigation in the

Color management in DRM framework

Hi Emil, Thanks your time and suggestions. We actually have the complete implementation ready with us, but we wanted to know if community is agreeing to the design itself. In fact that was our plan ahead, that if we don’t get enough comments on the design, we will start pushing the

[PATCH v5 1/3] drm/layerscape: Add Freescale DCU DRM driver

On 23 June 2015 at 17:50, Wang J.W. wrote: > Hi all, > > Anybody have any comments for this series of patches? Any comments are > welcomed. They had been send out for more than two monthes. Thanks. Can someone of the other ARM driver maintainers give this an overview, and possibly look at the

[PATCH] drm/radeon: fix adding all VAs to the freed list on remove

From: Christian König We only should do so when the BO_VA was actually mapped. Otherwise we get a nice error message on the next CS. Signed-off-by: Christian König --- drivers/gpu/drm/radeon/radeon_vm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

[git pull] drm tree for 4.2

Hey Dave, I'm not 100% sure, but didn't you wanted to send this pull request out for drm-next-merged instead of drm-next? Cause I'm still getting merge conflicts when I try to merge 4.1 into drm-next. Regards, Christian. On 26.06.2015 03:00, Dave Airlie wrote: > Hi Linus, > > This is the

[PATCH] staging: imx-drm: Fix pixel clock polarity

clk_pol should almost always be 1 (active-high pixel clock). When using the LDB, it must be 1 and for externally connected displays it should most probably also be 1. Original Freescale code sets this bit always, except when the FB_SYNC_CLK_LAT_FALL flag is set, which is a proprietary extension

[PATCH 1/1] gpu/drm: use kzalloc for allocating one thing

On 26.06.2015 09:37, Daniel Vetter wrote: > On Fri, Jun 26, 2015 at 09:34:43AM +0200, Daniel Vetter wrote: >> On Fri, Jun 26, 2015 at 11:54:10AM +0530, Maninder Singh wrote: >>> Use kzalloc rather than kcalloc(1.. for allocating >>> one thing. >>> >>> Signed-off-by: Maninder Singh >>>

[PATCH 1/1] gpu/drm: use kzalloc for allocating one thing

On Fri, Jun 26, 2015 at 09:34:43AM +0200, Daniel Vetter wrote: > On Fri, Jun 26, 2015 at 11:54:10AM +0530, Maninder Singh wrote: > > Use kzalloc rather than kcalloc(1.. for allocating > > one thing. > > > > Signed-off-by: Maninder Singh > > Reviewed-by: Vaneet Narang > > Applied to drm-misc,

[PATCH 1/1] gpu/drm: use kzalloc for allocating one thing

On Fri, Jun 26, 2015 at 11:54:10AM +0530, Maninder Singh wrote: > Use kzalloc rather than kcalloc(1.. for allocating > one thing. > > Signed-off-by: Maninder Singh > Reviewed-by: Vaneet Narang Applied to drm-misc, thanks. -Daniel > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |2 +- > 1

[PATCH v2] drm/rockchip: import dma_buf to gem

We want to display a buffer allocated by other driver, need import the buffer to gem. Signed-off-by: Mark Yao --- Changes in v2: Adviced by Russell King - check sgt-nents == 1 when get iova from scatterlist - remove unused dma_map_sg/dma_unmap_sg, dma_buf_map_attachment->map_dma_buf should do

[Bug 91110] Textures missing iff character in specific areas in dolphin running Xenoblades Chronicles

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[PATCH 1/1] gpu/drm: remove unnecessary check before kfree

Hi, >The shortlog prefix of both your patches should be "drm/amdgpu:" instead >of "gpu/drm:". With that fixed, both are Do i need to send V2 of patch with that change or you have fixed that? >Reviewed-by: Michel Dänzer Thanks. ..

[Bug 90182] [radeonsi]Qt Applications won't start on the dedicated GPU (SIGABRT)

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[Bug 90182] [radeonsi]Qt Applications won't start on the dedicated GPU (SIGABRT)

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[Bug 90182] [radeonsi]Qt Applications won't start on the dedicated GPU (SIGABRT)

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[Bug 90182] [radeonsi]Qt Applications won't start on the dedicated GPU (SIGABRT)

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[git pull] drm tree for 4.2

Hi Linus, This is the main drm pull request for v4.2. I've one other new driver from freescale on my radar, it's been posted and reviewed, I'd just like to get someone to give it a last look, so maybe I'll send it or maybe I'll leave it. There is no major nouveau changes in here, Ben was

[Bug 90182] [radeonsi]Qt Applications won't start on the dedicated GPU (SIGABRT)

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[Bug 90182] [radeonsi]Qt Applications won't start on the dedicated GPU (SIGABRT)

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[Bug 90182] [radeonsi]Qt Applications won't start on the dedicated GPU (SIGABRT)

bed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20150626/451c2708/attachment.html>

[Bug 90182] [radeonsi]Qt Applications won't start on the dedicated GPU (SIGABRT)

t;http://lists.freedesktop.org/archives/dri-devel/attachments/20150626/b512e2ba/attachment.html>