[PATCH 1/2] drm: Add infrastructure for CRTC background color property

Hi Matt, On 23 October 2015 at 01:25, Matt Roper wrote: > --- a/include/drm/drm_crtc.h > +++ b/include/drm/drm_crtc.h > +typedef struct { > + uint64_t v; > +} drm_rgba_t; > + Humble request - please don't add typedefs. The drm subsystem (barring legacy core and certain drivers) is

[PATCH] drm/mgag200: fix kernel hang in cursor code.

The machine hang completely with the following message on the console: [ 487.777538] BUG: unable to handle kernel NULL pointer dereference at 0060 [ 487.777554] IP: [] _raw_spin_lock+0xe/0x30 [ 487.777557] PGD 42e9f7067 PUD 42f2fa067 PMD 0 [ 487.777560] Oops: 0002 [#1] SMP ... [

BUG: drm/mgag200 NULL pointer dereference at 0000000000000060

Hi All, Just found the following bug causing machine hang: [ 487.777538] BUG: unable to handle kernel NULL pointer dereference at 0060 [ 487.777554] IP: [] _raw_spin_lock+0xe/0x30 [ 487.777557] PGD 42e9f7067 PUD 42f2fa067 PMD 0 [ 487.777560] Oops: 0002 [#1] SMP ... [ 487.777618]

[Bug 92952] Enabling Anti-Aliasing, when pp_jimenezmlaa and pp_jimenezmlaa_color are set, causes screen to corrupt

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[Bug 92999] [APITRACE] Shadow of Mordor missing fonts in menu

l remove the need for those wrong overrides). -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151118/85434ded/attachment.html>

[Bug 92999] [APITRACE] Shadow of Mordor missing fonts in menu

e and link using "g++ const_init.cpp -lGL -lSDL2 -lGLEW" -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151118/7343159d/attachment.html>

[PATCH 6/6] drm/msm/adreno: Remove CONFIG_OF checks

On 11/18/2015 8:15 PM, Rob Clark wrote: > On Wed, Nov 18, 2015 at 6:19 AM, Archit Taneja > wrote: >> Remove CONFIG_OF checks in adreno_device.c. The downstream bus scaling >> stuff is included only when CONFIG_OF is not set. So, remove that too. >> >> Signed-off-by: Archit Taneja >> --- >>

[PATCH 3/6] dt-bindings: drm/msm: Update MDP bindings

+dt list On 11/18/2015 4:49 PM, Archit Taneja wrote: > Update DT bindings for mdp. We now have a more uniform and future-proof > set of compatible strings. > > MDP5 bindings were missing. Add those and update details on the > clock-names properties. > > Signed-off-by: Archit Taneja > --- >

[PATCH v2 10/10] dt-bindings: Add DSIv2 documentation

Hi Rob, On 11/18/2015 6:48 PM, Rob Herring wrote: > +dt list > > On Wed, Nov 18, 2015 at 4:55 AM, Archit Taneja > wrote: >> Add additional property info needed for DSIv2 DT. > > Please use get_maintainers.pl. Sorry about that, missed out doing that posting this time. > >> Signed-off-by:

[Bug 92999] [APITRACE] Shadow of Mordor missing fonts in menu

dri-devel/attachments/20151118/a7abd858/attachment.html>

[Bug 44695] Rendering glitch in ShaderToy Monjori demo with Mesa 7.11 Gallium 0.4 AMD RV710

org/archives/dri-devel/attachments/20151118/00dbfa4e/attachment.html>

[Bug 44568] Half-Life 1 engine has poor fps is large areas

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[Bug 37296] [r600g] lighting artifacts on frozenbyte games

... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151118/0c2fec70/attachment.html>

[Bug 92996] [Fiji/amdgpu/Powerplay] Problems with vsync, interactivity, performance, EQ overflow with Powerplay

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[Bug 92996] [Fiji/amdgpu/Powerplay] Problems with vsync, interactivity, performance, EQ overflow with Powerplay

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[Bug 92996] [Fiji/amdgpu/Powerplay] Problems with vsync, interactivity, performance, EQ overflow with Powerplay

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[Bug 90404] [Steam] Assault Android Cactus demo: Shaders are choppy

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[Bug 90404] Shaders are choppy

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[Bug 91729] Graphic Distortions on Knights of the Old Republic with wine

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[Bug 92952] Enabling Anti-Aliasing, when pp_jimenezmlaa and pp_jimenezmlaa_color are set, causes screen to corrupt

dri-devel/attachments/20151118/d55828c6/attachment.html>

[Bug 92755] [APITRACE] Shadow of Mordor locks up R600

|R600|locks up R600 -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151118/f31c3

[Bug 92755] Shadow of Mordor locks up R600

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[Bug 91251] [APITRACE] [r600g] "ARK: Survival Evolved" game: shader errors

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[Bug 91251] [APITRACE] [r600g] "ARK: Survival Evolved" game: shader errors

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[PATCH] drm: do not use device name as a format string

drm_dev_set_unique() formats its parameter using kvasprintf() but many of its callers directly pass dev_name(dev) as printf format string, without any format parameter. This can cause some issues when the device name contains '%' characters. To avoid any potential issue, always use "%s" when

[PATCH] drm/atomic-helper: Check encoder/crtc constraints

This was totally lost when I originally created the atomic helpers. We probably should also check possible_clones in the helpers, but since the legacy ones didn't do that this is for a separate patch. Reported-by: Ville Syrjälä Cc: Ville Syrjälä Cc: Daniel Stone Signed-off-by: Daniel

[PATCH 7/7] drm/fsl-dcu: use mode flags for hsync/vsync pixelclk polarity

The current default configuration is as follows: - Display samples data on the falling edge - Invert VSYNC signal (active LOW) - Invert HSYNC signal (active LOW) The mode flags allow to specify the required polarity per display. Furthermore, none of the current driver settings is actually a

[PATCH 6/7] drm/fsl-dcu: fix alpha blending

Fix alpha blending by enabling alpha blending for the whole frame if a color mode with alpha channel is selected (DRM_FORMAT_ARGB*). Also support color modes without alpha channel (DRM_FORMAT_XRGB*) by just not enabling alpha blending on layer level. Signed-off-by: Stefan Agner ---

[PATCH 5/7] drm/fsl-dcu: mask all interrupts on initialization

The state of the interrupt mask register on initialization is unknown, e.g. U-Boot could already used the DCU. So depending on the boot loader, the outcome of the interrupt mask register could be different. A defined state is much more preferable. Also, there is no value in keeping interrupts

[PATCH 4/7] drm/fsl-dcu: handle initialization errors properly

If initialization fails (e.g. due to missing panel node or deferred probe) make sure to roll-back all operations and return the error code. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c | 24 1 file changed, 20 insertions(+), 4 deletions(-)

[PATCH 3/7] drm/fsl-dcu: avoid memory leak on errors

Improve error handling during CRTC initialization. Especially avoid memory leaks in the primary plane initialization error path. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 7 ++- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c | 1 + 2 files changed, 7

[PATCH 2/7] drm/fsl-dcu: remove regmap return value checks

It is not common to do regmap return value checks, especially not for memory mapped device. We can rule out most error returns since the conditions are static and we know they are ok (e.g. offset aligned to register stride). Also without proper error handling they are not really valuable for the

[PATCH 1/7] drm/fsl-dcu: specify volatile registers

Since we are using cached registers, we need to specify volatile registers explicitly to avoid reading their value from the cache. This allows to read the correct interrupt status in fsl_dcu_drm_irq and clear the asserted bits only. Signed-off-by: Stefan Agner ---

[PATCH 0/7] drm/fsl-dcu: fixes and enhancements

During testing the DCU DRM driver on the Freescale Vybrid platform I came across some (platform independent) bugs and problems which this patchset addresses. Note: To use the driver on Vybrid some platform/device-tree enhancements are needed which are not part of this patchset. I still need to

[PATCH 5/5] drm/msm/mdp4: Initialize DSI encoders

Create DSI encoders during modeset_init. The 2 encoders should ideally be one command mode and one video mode DSI encoder respectively, but we don't support command mode yet. We just create 2 of the same because the dsi driver expects it, we end up using only the first one. Signed-off-by: Archit

[PATCH 4/5] drm/msm/mdp4: Call custom round_pixclk helper only if the encoder type is TMDS

The mdp_kms round_pixclk op creates problems when we have more interfaces in use. It calls the DTV encoder's helper by default. Check on encoder type and call the corresponding encoder's func meant for rounding pixel clock. DSI and LVDS don't require rounding, so just return rate in their case.

[PATCH 3/5] drm/msm/dsi: Add a mdp4 encoder for DSI

From: Vinay Simha BN Create an mdp4 incoder for DSI. Only DSI video mode is supported as of now. Signed-off-by: Archit Taneja Signed-off-by: Vinay Simha BN --- drivers/gpu/drm/msm/Makefile| 1 +

[PATCH 2/5] drm/msm/mdp4: Initialize LCDC encoder even if panel driver isn't available

Currently, the driver defers if it doesn't find a drm_panel. This forces us to have a drm_panel, if not, the driver isn't usable. Make the lcdc encoder initialization independent of the availability of the drm panel. We only check if there is a panel node specified in DT. If it isn't, then we

[PATCH 1/5] drm/msm/mdp4: Clean up modeset_init

modeset_init() for mdp4 isn't very flexible. That makes it hard to add more interfaces. Split out the encoder/connector creation code in modeset_init into a separate function. This is similar to what's done in modeset_init for mdp5. Signed-off-by: Archit Taneja ---

[PATCH 0/5] drm/msm: DSI support on MDP4

This adds DSI video mode supports for the mdp4 kms driver. The first few patches make sure mdp4's modeset_init() func works with multiple encoders. It also fixes up some issues with the way the LVDS interface is initialized. We just support 1 DSI instance for now, and that too only DSI video

[PATCH v6 12/12] dt-bindings: hdmi-connector: add DDC I2C bus phandle documentation

Add an optional ddc-i2c-bus phandle property that points to an I2C master controller that handles the connector DDC pins. Signed-off-by: Philipp Zabel Acked-by: Rob Herring --- Changes since v5: - Rebased onto v4.4-rc1 --- Documentation/devicetree/bindings/display/connector/hdmi-connector.txt

[PATCH v6 11/12] clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output

The configurable hdmi_ref output of the PLL block is derived from the tvdpll_594m clock signal via a configurable PLL post-divider. It is used as the PLL reference input to the HDMI PHY module. Signed-off-by: Philipp Zabel --- drivers/clk/mediatek/clk-mt8173.c | 5 +

[PATCH v6 10/12] clk: mediatek: make dpi0_sel and hdmi_sel not propagate rate changes

These muxes are supposed to select a fitting divider after the PLL is already set to the correct rate. Signed-off-by: Philipp Zabel --- drivers/clk/mediatek/clk-mt8173.c | 4 ++-- drivers/clk/mediatek/clk-mtk.h| 7 +-- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git

[PATCH v6 09/12] arm64: dts: mt8173: Add HDMI related nodes

From: CK Hu This patch adds the device nodes for the HDMI encoder, HDMI PHY, and HDMI CEC modules. Signed-off-by: CK Hu Signed-off-by: Cawa Cheng Signed-off-by: Jie Qiu Signed-off-by: Daniel Kurtz Signed-off-by: Philipp Zabel ---

[PATCH v6 08/12] arm64: dts: mt8173: Add display subsystem related nodes

From: CK Hu This patch adds the device nodes for the DISP function blocks comprising the display subsystem. Signed-off-by: CK Hu Signed-off-by: Cawa Cheng Signed-off-by: Jie Qiu Signed-off-by: Daniel Kurtz Signed-off-by: Philipp Zabel --- TODO: - The power-domain

[PATCH v6 07/12] drm/mediatek: enable hdmi output control bit

From: Jie Qiu MT8173 HDMI hardware has a output control bit to enable/disable HDMI output. Because of security reason, so this bit can ONLY be controlled in ARM supervisor mode. Now the only way to enter ARM supervisor is the ARM trusted firmware. So atf provides a API for

[PATCH v6 06/12] drm/mediatek: Add HDMI support

From: Jie Qiu This patch adds drivers for the HDMI bridge connected to the DPI0 display subsystem function block, for the HDMI DDC block, and for the HDMI PHY to support HDMI output. Signed-off-by: Jie Qiu Signed-off-by: Philipp Zabel --- Changes since v5: - Register and

[PATCH v6 05/12] dt-bindings: drm/mediatek: Add Mediatek HDMI dts binding

Add the device tree binding documentation for Mediatek HDMI, HDMI PHY and HDMI DDC devices. Signed-off-by: Philipp Zabel Acked-by: Rob Herring --- .../bindings/display/mediatek/mediatek,hdmi.txt| 142 + 1 file changed, 142 insertions(+) create mode 100644

[PATCH v6 04/12] drm/mediatek: Add DPI sub driver

From: Jie Qiu Add DPI connector/encoder to support HDMI output via the attached HDMI bridge. Signed-off-by: Jie Qiu Signed-off-by: Philipp Zabel --- Changes since v5: - Register and unregister drivers in a loop --- drivers/gpu/drm/mediatek/Makefile | 3 +-

[PATCH v6 03/12] drm/mediatek: Add DSI sub driver

From: CK Hu This patch add a drm encoder/connector driver for the MIPI DSI function block of the Mediatek display subsystem and a phy driver for the MIPI TX D-PHY control module. Signed-off-by: Jitao Shi Signed-off-by: Philipp Zabel --- Changes since v5: - Register and

[PATCH v6 02/12] drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.

From: CK Hu This patch adds an initial DRM driver for the Mediatek MT8173 DISP subsystem. It currently supports two fixed output streams from the OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively. Signed-off-by: CK Hu Signed-off-by: YT Shen Signed-off-by: Philipp

[PATCH v6 01/12] dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding

From: CK Hu Add device tree binding documentation for the display subsystem in Mediatek MT8173 SoCs. Signed-off-by: CK Hu Signed-off-by: Philipp Zabel Acked-by: Rob Herring --- Changes since v5: - Updated DISP_MUTEX description - Fixed DSI and DPI documentation path ---

[PATCH v6 00/12] MT8173 DRM support

Hi, another update to the MT8173 DRM support patchset. Since the device tree bindings are now in order, I have dropped the RFC. The irq handler is still writing to hardware registers, as on MT8173 vblank synchronised register updates need help from a separate hardware command queue unit. A driver

[PATCH 02/16 REBASED] dt-bindings: remove deprecated compatible string from exynos-hdmi

On 18.11.2015 17:33, Andrzej Hajda wrote: > samsung,exynos5-hdmi compatible was marked as deprecated in Jun 2013. > It was never used since then. > > Signed-off-by: Andrzej Hajda > Reviewed-by: Gustavo Padovan > --- > Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt | 7 +++

[PATCH v2] drm: support hotspot for universal plane cursors

On 18.11.2015 17:51, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 05:39:39PM +0900, Michel Dänzer wrote: >> On 18.11.2015 01:29, Daniel Vetter wrote: >>> >>> And no, I have absolutely no idea why radeon is pulling some tricks here, >>> which have been added in >>> >>> commit

[PATCH RFC] drm/atomic: Disable planes on blanked CRTC and enable on unblank

On 11/16/15 18:06, Daniel Vetter wrote: > On Thu, Nov 05, 2015 at 05:03:09PM +0200, Jyri Sarha wrote: >> Disable planes if they are on to be blanked CRTC and enable them when >> the CRTC is turned back on by DMPS. >> >> This is desirable on HW that loses its context on blanking. When >> planes are

[Bug 91656] [APITRACE] [bisected] Pillars of Eternity glitch in maps

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[Bug 91656] [APITRACE] [bistected] Pillars of Eternity glitch in maps

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[Bug 92229] [APITRACE] SOMA have serious graphical errors

|errors |serious graphical errors -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151118/46977

[Bug 92952] [APITRACE] Enabling Anti-Aliasing causes screen to corrupt

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[Bug 91729] Graphic Distortions on Knights of the Old Republic with wine

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[Bug 92229] SOMA have serious graphical errors

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[PATCH v2] drm: support hotspot for universal plane cursors

On 18.11.2015 01:29, Daniel Vetter wrote: > On Tue, Nov 17, 2015 at 03:59:43PM +, John Keeping wrote: >> On Tue, 17 Nov 2015 17:39:32 +0200, Ville Syrjälä wrote: >> >>> On Tue, Nov 17, 2015 at 03:05:34PM +, John Keeping wrote: The request's hot_x and hot_y are set correctly for both

[pull] radeon and amdgpu drm-fixes-4.4

Hi Dave, Radeon and amdgpu fixes for 4.4. A bit more the usual since I missed last week. Misc fixes all over the place. The big changes are the tiling configuration fixes for Fiji. The following changes since commit 5bad7d29a7bcffb2dbc28ea2728eeb3af13784f2: Revert "drm/rockchip: Convert

[Bug 92952] Enabling Anti-Aliasing causes screen to corrupt

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[Bug 92996] [Fiji/amdgpu/Powerplay] Problems with vsync, interactivity, performance, EQ overflow with Powerplay

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[PATCH RFC] drm/atomic: Disable planes on blanked CRTC and enable on unblank

On Wed, Nov 18, 2015 at 05:52:45PM +0200, Jyri Sarha wrote: > On 11/16/15 18:06, Daniel Vetter wrote: > >On Thu, Nov 05, 2015 at 05:03:09PM +0200, Jyri Sarha wrote: > >>Disable planes if they are on to be blanked CRTC and enable them when > >>the CRTC is turned back on by DMPS. > >> > >>This is

[PATCH 6/6] drm/msm/adreno: Remove CONFIG_OF checks

Remove CONFIG_OF checks in adreno_device.c. The downstream bus scaling stuff is included only when CONFIG_OF is not set. So, remove that too. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/adreno/adreno_device.c | 52 -- 1 file changed, 52 deletions(-) diff

[PATCH 5/6] drm/msm/hdmi: remove CONFIG_OF checks

We now only care about kernels that support DT. Remote the non-DT stuff. While we're at it, use of_device_get_match_data to retrieve match data. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/hdmi/hdmi.c | 87 - 1 file changed, 16 insertions(+), 71

[PATCH 4/6] drm/msm/mdp: Remove CONFIG_OF checks from MDP drivers

We don't intend to use downstream non-DT kernels anymore, so remove CONFIG_OF checks. Update the TODO comment so that we don't forget about max_clk setting for non APQ8064 chips having MDP4. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 20 +++-

[PATCH 3/6] dt-bindings: drm/msm: Update MDP bindings

Update DT bindings for mdp. We now have a more uniform and future-proof set of compatible strings. MDP5 bindings were missing. Add those and update details on the clock-names properties. Signed-off-by: Archit Taneja --- .../devicetree/bindings/display/msm/mdp.txt| 26

[PATCH 2/6] drm/msm: Update compatible strings for mdp

Create distinct compatible strings for mdp4 and mdp5. Keep "qcom,mdss_mdp" as is to support downstream kernels. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/msm_drv.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_drv.c

[PATCH 1/6] drm/msm: Remove non-DT code in msm_drv

Support for non-DT kernels was mainly to use v3.4 downstream kernels. This is no longer a priority now as we have reasonable support upstream. Remove CONFIG_OF from the top level msm_drv.c file. While we're at it, clean up the data matching process using of_device_get_match_data. Signed-off-by:

[PATCH 0/6] drm/msm: Work only with DT supported kernels

The drm/msm driver supports non-DT kernels. This was used mainly for getting the driver to run on older downstream kernels (v3.4 and before). This isn't needed anymore. So remove the CONFIG_OF code. Also, provide a cleaner set of DT compatible strings for the MDP driver. The last patch which

[PATCH 14/25] drm/exynos: introduce exynos_drm_plane_config structure

Hey Marek, Marek Szyprowski wrote: > Hello, > > On 2015-11-17 19:00, Tobias Jakobi wrote: >> Marek Szyprowski wrote: >>> This patch adds common structure for keeping plane configuration and >>> capabilities data. This patch is inspired by similar code developed by >>> Tobias Jakobi. >>> >>>

[PATCH] drm/mgag200: fix kernel hang in cursor code.

On Wed, Nov 18, 2015 at 11:00:53PM +0800, Rui Wang wrote: > The machine hang completely with the following message on the console: > > [ 487.777538] BUG: unable to handle kernel NULL pointer dereference at > 0060 > [ 487.777554] IP: [] _raw_spin_lock+0xe/0x30 > [ 487.777557] PGD

[PATCH v2 10/10] dt-bindings: Add DSIv2 documentation

Add additional property info needed for DSIv2 DT. Signed-off-by: Archit Taneja --- Documentation/devicetree/bindings/display/msm/dsi.txt | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt

[PATCH v2 09/10] drm/msm/dsi: Enable MMSS SPFB port via syscon

For DSIv2 to work, we need to enable MMSS_AHB_ARB_MASTER_PORT in MMSS_SFPB. We enable the required bitfield by retrieving MMSS_SFPB regmap pointer via syscon. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/dsi/dsi_host.c | 33 + 1 file changed, 33

[PATCH v2 08/10] drm/msm/dsi: Don't use iommu for command TX buffer for DSIv2

We currently use iommu allocated DMA buffers for sending DSI commands. DSIv2 doesn't have a port connected to the MDP iommu. Therefore, it can't use iommu allocated buffers to fetch DSI commands. Use a regular contiguous DMA buffer if we are DSIv2. Signed-off-by: Archit Taneja ---

[PATCH v2 07/10] drm/msm/dsi: Add dsi_cfg for APQ8064

Add a dsi_cfg entry for APQ8064. Since this is the first DSIv2 chip to be supported, add a list of bus clocks that are required by the DSIv2 block. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 19 --- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 2 ++ 2 files

[PATCH v2 06/10] drm/msm/dsi: Set up link clocks for DSIv2

DSIv2 (DSI on older A family chips) has slightly different link clock requirements. First, we have an extra clock called src_clk (with a dedicated RCG). This is required by the DSI controller to process the pixel data coming from MDP. It needs to be set at the rate "pclk * bytes_per_pixel". We

[PATCH v2 05/10] drm/msm/dsi: Parse bus clocks from a list

DSI bus clocks seem to vary between different DSI host versions, and the SOC to which they belong. Even the enable/disable sequence varies. Provide a list of bus clock names in dsi_cfg. The driver will use this to retrieve the clocks, and enable/disable them. Add bus clock lists for DSI6G, and

[PATCH v2 04/10] drm/msm/dsi: Delay dsi_clk_init

Initialize clocks only after we get the DSI host version. This will allow us to get clocks using a pre-defined list based on the DSI major/minor version of the host. This is required since clock requirements of different major DSI revisions(v2 vs 6g) aren't the same. Modify dsi_get_version to get

[PATCH v2 03/10] drm/msm/dsi: Use a better way to figure out DSI version

The current version checking mechanism works fine for DSI6G blocks. It doesn't work so well for older generation DSIv2 blocks. The initial read of REG_DSI_6G_HW_VERSION(offset 0x0) would result in a read of REG_DSI_CTRL for DSIv2. This register won't necessarily be 0 on DSIv2. It can be non zero

[PATCH v2 02/10] drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY

Add DSI PLL common clock framework clocks for 8960 PHY. The PLL here is different from the ones found in B family msm chips. As before, the DSI provides two clocks to the outside world. dsixpll and dsixpllbyte (x = 1, 2). dsixpll is a regular clock divider, but dsixpllbyte is modelled as a custom

[PATCH v2 01/10] drm/msm/dsi: Add support for 28nm PHY on 8960

DSI PHY on MSM8960 and APQ8064 is a 28nm PHY that's different from the supported 28nm LP PHY found in newer chips. Add support for the new PHY. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/Kconfig | 8 + drivers/gpu/drm/msm/Makefile| 1 +

[PATCH v2 00/10] drm/msm/dsi: Add support for DSI on MSM8960/APQ8064

Add support for DSI on 8960/8064. The DSI IP used in these chips is an older version(DSIv2) of what we have right now(DSI6G). The bulk of the additions come thanks to a different PHY/PLL. The DSI host in itself doesn't have too many changes. Changes in v2: - Incorporated Stephen's comments for

[PATCH] tree wide: Use kvfree() than conditional kfree()/vfree()

On Mon, 9 Nov 2015, Tetsuo Handa wrote: > There are many locations that do > > if (memory_was_allocated_by_vmalloc) > vfree(ptr); > else > kfree(ptr); > > but kvfree() can handle both kmalloc()ed memory and vmalloc()ed memory > using is_vmalloc_addr(). Unless callers have special

[Intel-gfx] i915 Skylake: "Invalid ROM contents"

Hi, On 18 November 2015 at 15:59, Andy Lutomirski wrote: > On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä > wrote: >> On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >>> Typing: >>> >>> # cat /sys/devices/pci:00/:00:02.0/rom >>> >>> Provokes: >>> >>> i915

[PATCH] drm/panel: simple: Add support for G121X1-L03

Add support for Innolux CheMei 12" G121X1-L03 XGA LVDS display. Datasheet: http://www.azdisplays.com/PDF/G121X1-L03.pdf Signed-off-by: Akshay Bhat --- .../bindings/display/panel/innolux,g121x1-l03.txt | 7 + drivers/gpu/drm/panel/panel-simple.c | 31 ++ 2

Regression on Chromebook Pixel 2015 due to i915 fastboot always-on

- Original Message - > From: "Linus Torvalds" > To: "Jani Nikula" > Cc: "Daniel Vetter" , "Olof Johansson" lixom.net>, "Maarten Lankhorst" > , "Dave Airlie" redhat.com>, "Duncan Laurie" , > "dri-devel" , "Linux Kernel Mailing List" > > Sent: Thursday, 19 November, 2015 2:18:50 AM >

[Bug 92790] Radeon.mst error

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[PATCH 6/6] drm/msm/adreno: Remove CONFIG_OF checks

On Wed, Nov 18, 2015 at 11:04 AM, Archit Taneja wrote: > > > On 11/18/2015 8:15 PM, Rob Clark wrote: >> >> On Wed, Nov 18, 2015 at 6:19 AM, Archit Taneja >> wrote: >>> >>> Remove CONFIG_OF checks in adreno_device.c. The downstream bus scaling >>> stuff is included only when CONFIG_OF is not

[PATCH 1/2] drm: Add infrastructure for CRTC background color property

On Wed, Nov 18, 2015 at 01:35:54PM -0800, Bob Paauwe wrote: > On Thu, 22 Oct 2015 17:25:34 -0700 > Matt Roper wrote: > > > To support CRTC background color, we need a way of communicating RGB > > color values to the DRM. However there is often a mismatch between how > > userspace wants to

[Mesa-dev] [PATCH v4 1/2] intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)

On Wed, Oct 14, 2015 at 5:11 AM, Michel Thierry wrote: > On 10/14/2015 8:19 AM, Daniel Vetter wrote: >> >> On Tue, Oct 13, 2015 at 02:51:36PM -0700, Kristian Høgsberg wrote: >>> >>> On Tue, Oct 13, 2015 at 7:55 AM, Michel Thierry >>> wrote: On 10/13/2015 3:13 PM, Emil Velikov wrote:

[Bug 92993] Powerplay: Thermal controller fails to start on R9 Nano (Fiji)

archives/dri-devel/attachments/20151118/d6d70492/attachment.html>

[Bug 91880] Radeonsi on Grenada cards (r9 390) exceptionally unstable and poorly performing

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[Bug 91880] Radeonsi on Grenada cards (r9 390) exceptionally unstable and poorly performing

"vbios.rom" in case it is useful. I hope I can help in some way. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151118/5

[PATCH] drm/qxl: fix cursor position with non-zero hotspot

On Wed, Nov 18, 2015 at 11:17:25AM +, John Keeping wrote: > The SPICE protocol considers the position of a cursor to be the location > of its active pixel on the display, so the cursor is drawn with its > top-left corner at "(x - hot_spot_x, y - hot_spot_y)" but the DRM cursor > position gives

[Intel-gfx] [PATCH 2/2] drm/i915/skl: Add support for pipe background color

On Thu, 22 Oct 2015 17:25:35 -0700 Matt Roper wrote: > SKL and BXT allow CRTC's to be programmed with a background/canvas color > below the programmable planes. Let's expose this as a property to allow > userspace to program a desired value. > > This patch is based on earlier work by Chandra

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