https://bugs.freedesktop.org/show_bug.cgi?id=107873
Timothy Arceri changed:
What|Removed |Added
Resolution|--- |NOTOURBUG
Status|NEW
https://bugs.freedesktop.org/show_bug.cgi?id=107873
--- Comment #8 from Timothy Arceri ---
(In reply to Zebediah Figura from comment #7)
> Do you mean that this is a bug present in Staging but not in upstream Wine?
> In particular, is the patchset "opengl32-Revert_Disable_Ext" to blame?
I'm not
On Sun, 2 Sep 2018 09:26:17 +0200, Jernej Skrabec wrote:
> From: Icenowy Zheng
>
> The Allwinner H6 SoC's DE3 needs the SRAM C section being claimed in the
> system controller to work, like A64 DE2.
>
> As H6 and A64 system controller are quite similar, code is reused now,
> and the A64 fallbac
On Tue, 4 Sep 2018 15:10:13 +0300, Laurent Pinchart wrote:
> The E3 (r8a77990) supports two LVDS channels. Extend the binding to
> support them.
>
> Signed-off-by: Laurent Pinchart
> ---
> Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
> 1 file changed, 1 insertion(+)
On Tue, 4 Sep 2018 15:10:12 +0300, Laurent Pinchart wrote:
> Document the E3 (r8a77990) SoC in the R-Car DU bindings.
>
> Signed-off-by: Laurent Pinchart
> ---
> Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring
___
On Sun, 2 Sep 2018 09:26:34 +0200, Jernej Skrabec wrote:
> From: Icenowy Zheng
>
> The Allwinner H6 SoC uses a v2.12a DesignWare HDMI controller, with
> dedicated CEC and HDCP clocks added; the PHY connected is a standard
> DesignWare HDMI PHY.
>
> Add binding for it.
>
> Signed-off-by: Icenow
On Sun, 2 Sep 2018 09:26:25 +0200, Jernej Skrabec wrote:
> This commit adds compatibles used in H6 display pipeline, namely for
> display engine, mixer and TV TCON.
>
> H6 display engine is somewhat similar to R40, just less TCONs and
> mixer support more features.
>
> Signed-off-by: Jernej Skra
On Sun, 2 Sep 2018 09:26:23 +0200, Jernej Skrabec wrote:
> This commit adds necessary description and dt includes for H6 DE3 clock.
> It is very similar to others, but memory region has some additional
> registers not found in DE2.
>
> Signed-off-by: Jernej Skrabec
> ---
> Documentation/devicet
On Sun, 2 Sep 2018 09:26:40 +0200, Jernej Skrabec wrote:
> From: Icenowy Zheng
>
> Allwinner H6 SoC has a cut down version of TCON TOP.
>
> Add binding documentation for it.
>
> Signed-off-by: Icenowy Zheng
> [expanded description]
> Signed-off-by: Jernej Skrabec
> ---
> .../bindings/displa
On Sun, 2 Sep 2018 09:26:19 +0200, Jernej Skrabec wrote:
> From: Icenowy Zheng
>
> The Allwinner H6 DE3 bus is similar to the A64 DE2 one.
>
> Add its compatible string with the A64 string as fallback to the
> binding.
>
> Some description of the binding is modified to make it more generic.
>
https://bugs.freedesktop.org/show_bug.cgi?id=105530
--- Comment #12 from Andrew Sheldon ---
The bug looks to be due to the new display code. Setting amdgpu.dc=0 removes
all stuttering in the testufo test, with TearFree enabled. Compton still has
stuttering, but that could be a configuration issue
https://bugs.freedesktop.org/show_bug.cgi?id=105530
--- Comment #11 from Andrew Sheldon ---
I've run some tests using:
https://testufo.com/photo#photo=quebec.jpg&pps=960&pursuit=0&height=0
I've found that with TearFree enabled, there is a stutter every 4-5 seconds.
This occurs at different refre
> -Original Message-
> From: Daniel Vetter On Behalf Of Daniel Vetter
> Sent: Saturday, September 15, 2018 12:11 AM
> To: Koenig, Christian
> Cc: Zhou, David(ChunMing) ; dri-
> de...@lists.freedesktop.org; amd-...@lists.freedesktop.org; Dave Airlie
> ; Rakos, Daniel ; Daniel
> Vetter
>
https://bugs.freedesktop.org/show_bug.cgi?id=106921
--- Comment #4 from Greg White ---
I still see this with a Vega 56 in 4.19-rc3, mesa 18.2 and 18.3.
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https://bugs.freedesktop.org/show_bug.cgi?id=107572
--- Comment #23 from madc...@atlas.cz ---
OK, I just tried Mesa 18.2 from the Copr suggested by Andrew but it does not
fix the Witcher 3 for me. Unigine Superposition seems to have been fixed by
the 4.18 kernel as I just ran it multiple times ev
https://bugs.freedesktop.org/show_bug.cgi?id=107261
--- Comment #6 from Zheng Luo ---
Created attachment 141592
--> https://bugs.freedesktop.org/attachment.cgi?id=141592&action=edit
4.18.7-arch with 2500U messages
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https://bugs.freedesktop.org/show_bug.cgi?id=107953
Bug ID: 107953
Summary: Screen Corruption (Bisected)
Product: DRI
Version: DRI git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: critica
https://bugzilla.kernel.org/show_bug.cgi?id=200621
--- Comment #21 from Jon (jon...@gmail.com) ---
I have 3 monitors and when this happens the entire system freezes but still
responds to icmp.
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https://bugzilla.kernel.org/show_bug.cgi?id=200621
--- Comment #22 from Jon (jon...@gmail.com) ---
So this is interesting. I'm still getting these errors occasionally but the
computer hasn't frozen in a day (1d 13h, specifically). Sometimes it will make
it two or even three days without a total
https://bugs.freedesktop.org/show_bug.cgi?id=107950
Bug ID: 107950
Summary: Delayed freeze with DRI_PRIME=1 on Topaz
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
S
https://bugs.freedesktop.org/show_bug.cgi?id=104602
--- Comment #8 from peetipa...@gmail.com ---
Just want to comment that this issue is still occuring on mesa 18.2, arch linux
kernel 4.18.6.
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https://bugzilla.kernel.org/show_bug.cgi?id=201147
Bug ID: 201147
Summary: amdgpu, no detected monitors HP Envy x360 - AMD Ryzen
5 2500U
Product: Drivers
Version: 2.5
Kernel Version: 4.18.7
Hardware: x86-64
https://bugzilla.kernel.org/show_bug.cgi?id=200621
--- Comment #20 from Richard Smith (smit...@gmx.co.uk) ---
According to this Debian bug report, the issue may be due to the latest edition
of the GPU firmware:
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=908313
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https://bugzilla.kernel.org/show_bug.cgi?id=200621
--- Comment #23 from Jon (jon...@gmail.com) ---
That previous post should have said 4.18.5-200, not 4.18.4-200
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dri-
Load plane color luts as part of atomic plane updates.
This will be done only if the plane color luts are changed.
v4: Rebase
v5: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 4
drivers/gpu/drm/i915/intel_color.c| 8
drivers/gpu/drm/i9
Existing LUT precision structure is having only 16 bit
precision. This is not enough for upcoming enhanced hardwares
and advance usecases like HDR processing. Hence added a new
structure with 32 bit precision values. Also added the code,
for extracting the same from values passed from userspace.
v
Define helper function to enable Plane color features
to attach plane color properties to plane structure.
v2: Rebase
v3: Modiefied the function to use updated property names.
v4: Rebase
v5: Moved helper function to drm_color_mgmt.c file to have all
color operations consolidated at one place. N
Add Plane Degamma as a blob property and plane degamma size as
a range property.
v2: Rebase
v3: Fixed Sean, Paul's review comments. Moved the property from
mode_config to drm_plane. Created a helper function to instantiate
these properties and removed from drm_mode_create_standard_properties
Adde
Add a blob property for plane CSC usage.
v2: Rebase
v3: Fixed Sean, Paul's review comments. Moved the property from
mode_config to drm_plane. Created a helper function to instantiate
these properties and removed from drm_mode_create_standard_properties
Added property documentation as suggested by
https://bugs.freedesktop.org/show_bug.cgi?id=107947
Bug ID: 107947
Summary: REG_WAIT timeout 10us * 3500 tries - dce_mi_free_dmif
line:563 during boot
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
https://bugs.freedesktop.org/show_bug.cgi?id=107261
Zheng Luo changed:
What|Removed |Added
CC||viclu...@gmail.com
--- Comment #5 from Zhen
This is how a typical display color hardware pipeline looks like:
+---+
|RAM|
| +--++-++-+ |
| | FB 1 || FB 2 || FB N| |
| +--++-++-+
Add plane gamma as blob property and size as a
range property.
v2: Rebase
v3: Fixed Sean, Paul's review comments. Moved the property from
mode_config to drm_plane. Created a helper function to instantiate
these properties and removed from drm_mode_create_standard_properties
Added property documen
https://bugs.freedesktop.org/show_bug.cgi?id=107595
Przemek changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
Enable and initialize plane color features.
v2: Rebase and some cleanup
v3: Updated intel_plane_color_init to call
drm_plane_color_create_prop function, which will
in turn create plane color properties.
v4: Rebase
v5: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_drv.h
Implement Plane Gamma feature for BDW and Gen9 platforms.
v2: Used newly added drm_color_lut_ext structure for enhanced
precision for Gamma LUT entries.
v3: Rebase
v4: Used extended function for LUT extraction (pointed by
Alexandru).
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_pc
https://bugzilla.kernel.org/show_bug.cgi?id=201147
--- Comment #1 from rezbit@gmail.com ---
Created attachment 278567
--> https://bugzilla.kernel.org/attachment.cgi?id=278567&action=edit
Xorg log
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https://bugs.freedesktop.org/show_bug.cgi?id=105530
--- Comment #10 from Andrew Sheldon ---
Appears to affect the RX550 and Vega 56 as well, with kernel 4.18.8. Most
obvious symptoms are seen when running fullscreen games, with a high recorded
framerate, but FPS feels like it's running at half th
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