This case is used to migrate pages from device memory, back to system
memory. Device coherent type memory is cache coherent from device and CPU
point of view.
Signed-off-by: Alex Sierra
Acked-by: Felix Kuehling
Reviewed-by: Alistair Poppple
Signed-off-by: Christoph Hellwig
---
Device memory that is cache coherent from device and CPU point of view.
This is used on platforms that have an advanced system bus (like CAPI
or CXL). Any page of a process can be migrated to such memory. However,
no one should be allowed to pin such memory so that it can always be
evicted.
Hi Samuel,
Sorry for the (very) late answer
On Tue, Apr 12, 2022 at 06:34:40PM -0500, Samuel Holland wrote:
> On 4/12/22 8:23 AM, Maxime Ripard wrote:
> > Hi,
> >
> > On Mon, Apr 11, 2022 at 11:35:08PM -0500, Samuel Holland wrote:
> >> Now that the HDMI PHY is using a platform driver, it can
On Mon, May 30, 2022 at 04:02:46PM +0200, Javier Martinez Canillas wrote:
> The kernel test robot reports a compile warning due the ssd130x_spi_table
> variable being defined but not used. This happen when ssd130x-spi driver
> is built-in instead of being built as a module, i.e:
>
> CC
On Tue, May 31, 2022 at 5:32 AM Daniel Vetter wrote:
>
> On Mon, 30 May 2022 at 17:41, Rob Clark wrote:
> >
> > On Mon, May 30, 2022 at 7:49 AM Daniel Vetter wrote:
> > >
> > > On Mon, 30 May 2022 at 15:54, Rob Clark wrote:
> > > >
> > > > On Mon, May 30, 2022 at 12:26 AM Thomas Zimmermann
>
of_graph_get_remote_node() returns remote device nodepointer with
refcount incremented, we should use of_node_put() on it when done.
Add missing of_node_put() to avoid refcount leak.
Fixes: e67f6037ae1b ("drm/meson: split out encoder from meson_dw_hdmi")
Signed-off-by: Miaoqian Lin
---
of_graph_get_remote_node() returns remote device nodepointer with
refcount incremented, we should use of_node_put() on it when done.
Add missing of_node_put() to avoid refcount leak.
Fixes: 318ba02cd8a8 ("drm/meson: encoder_cvbs: switch to bridge with
ATTACH_NO_CONNECTOR")
Signed-off-by:
In commit a670ff578f1f ("drm/msm/dpu: always use mdp device to scale
bandwidth") we fully moved interconnect stuff to the DPU driver. This
had no change for sc7180 but _did_ have an impact for other SoCs. It
made them match the sc7180 scheme.
Unfortunately, the sc7180 scheme seems like it was a
On Tue, May 17, 2022 at 12:56:34PM +0530, Bhanuprakash Modem wrote:
> This series will add a support to set the vrr_enabled property for
> crtc based on the platform support and the request from userspace.
> And userspace can also query to get the status of "vrr_enabled".
>
> Test-with:
On Mon, 30 May 2022 22:14:30 +0200, Fabien Parent wrote:
> DPI is part of the display / multimedia block in MediaTek SoCs, and
> always have a power-domain (at least in the upstream device-trees).
> Add the power-domains property to the binding documentation.
>
> Signed-off-by: Fabien Parent
>
On Tue, May 31, 2022 at 06:27:58PM +0800, ChiaEn Wu wrote:
> From: ChiYuan Huang
>
> Add mt6370 DisplayBias and VibLDO support.
Other than one small thing this looks nice and clean:
> + enable_gpio = fwnode_gpiod_get_index(of_fwnode_handle(np), "enable", 0,
> +
On Mon, 30 May 2022 at 17:41, Rob Clark wrote:
>
> On Mon, May 30, 2022 at 7:49 AM Daniel Vetter wrote:
> >
> > On Mon, 30 May 2022 at 15:54, Rob Clark wrote:
> > >
> > > On Mon, May 30, 2022 at 12:26 AM Thomas Zimmermann
> > > wrote:
> > > >
> > > > Hi
> > > >
> > > > Am 29.05.22 um 18:29
Replace magic register writes in msm_mdss_enable() with version that
contains less magic and more variable names that can be traced back to
the dpu_hw_catalog or the downstream dtsi files.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_mdss.c | 79 ++
On 30/05/2022 22:14, Fabien Parent wrote:
> DPI for MT8365 is compatible with MT8192 but requires an additional
> clock. Modify the documentation to requires this clock only on MT8365 SoCs.
>
> Signed-off-by: Fabien Parent
> ---
> .../display/mediatek/mediatek,dpi.yaml| 44
Hi All,
Gentle ping.
Are you ok with this patch series? Please let me know.
Cheers,
Biju
> Subject: [PATCH v3 0/2] Add RZ/G2L DSI driver
>
> This patch series aims to support the MIPI DSI encoder found in the RZ/G2L
> SoC. It currently supports DSI mode only.
>
> This unit supports MIPI
Am 31.05.22 um 13:14 schrieb Thomas Zimmermann:
Various cleanups to ast's conenctor code. Simplifies the code, adds
support for using VGA and ASTDP connectors at the same time, and
initializes polling of the connector status.
Patch 1 was first posted at [1], so this patchset starts at version
Expect the hardware to provide a DDC channel. Fail probing if its
initialization fails.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_drv.h | 2 --
drivers/gpu/drm/ast/ast_i2c.c | 7 ---
drivers/gpu/drm/ast/ast_mode.c | 38 --
3 files
Enable output polling for all connectors. VGA always uses EDID for this. As
there's currently no interrupt handling for the ast devices, we have to use
that trick for the various DP and DVI ports as well.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_mode.c | 14
Both, struct ast_vga_connector and struct ast_sil164_connector, are
now wrappers around struct drm_connector. Remove them.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_drv.h | 24 ++--
drivers/gpu/drm/ast/ast_mode.c | 18 ++
2 files changed,
Read the display modes from the connectors DDC helper, which also
updates the connector's EDID property. The code for the connector's
.get_modes helper is now shared between VGA and SIL164.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_mode.c | 57
Various cleanups to ast's conenctor code. Simplifies the code, adds
support for using VGA and ASTDP connectors at the same time, and
initializes polling of the connector status.
Patch 1 was first posted at [1], so this patchset starts at version
2. The implementation of detect_ctx in patch 3 has
Systems with AST graphics can have multiple output; typically VGA
plus some other port. Record detected output chips in a bitmask and
initialize each output on its own.
Assume a VGA output by default and use SIL164 and DP501 if available.
For ASTDP assume that it can run in parallel with VGA.
On Tue, 31 May 2022, Jani Nikula wrote:
> On Tue, 31 May 2022, William Tseng wrote:
>> This is a workaround for HDMI 1.4 sink which has a CEA mode with higher vic
>> than what is defined in CEA-861-D.
>>
>> As an example, a HDMI 1.4 sink has the video format 2560x1080p to be
>> displayed and the
Hi,
On 5/30/22 13:34, Hsin-Yi Wang wrote:
> On Mon, May 30, 2022 at 4:53 PM Hans de Goede wrote:
>>
>> Hi,
>>
>> On 5/30/22 10:19, Hsin-Yi Wang wrote:
>>> Some drivers, eg. mtk_drm and msm_drm, rely on the panel to set the
>>> orientation. Panel calls drm_connector_set_panel_orientation() to
On Tue, 31 May 2022, William Tseng wrote:
> This is a workaround for HDMI 1.4 sink which has a CEA mode with higher vic
> than what is defined in CEA-861-D.
>
> As an example, a HDMI 1.4 sink has the video format 2560x1080p to be
> displayed and the video format is indicated by both SVD (with vic
Hi,
On 5/18/22 16:23, Jani Nikula wrote:
> On Wed, 18 May 2022, Hans de Goede wrote:
>> So how about: display_brightness or panel_brightness ?
>
> This is a prime opportunity to look at all the existing properties, and
> come up with a new combination of capitalization, spacing, hyphens,
>
This is a workaround for HDMI 1.4 sink which has a CEA mode with higher vic
than what is defined in CEA-861-D.
As an example, a HDMI 1.4 sink has the video format 2560x1080p to be
displayed and the video format is indicated by both SVD (with vic 90 and
pictuure aspect ratio 64:27) and DTD. When
Hi Melissa,
On Mon, May 09, 2022 at 03:52:04PM -0100, Melissa Wen wrote:
> > @@ -915,10 +954,14 @@ int vc4_set_tiling_ioctl(struct drm_device *dev, void
> > *data,
> > int vc4_get_tiling_ioctl(struct drm_device *dev, void *data,
> > struct drm_file *file_priv)
> > {
> > +
Hi Joel,
On Mon, May 30, 2022 at 6:08 PM Joel Selvaraj wrote:
> +#define dsi_dcs_write_seq(dsi, cmd, seq...) do {
> \
Please name it mipi_dsi_dcs_write_seq() and...
> + static const u8 d[] = { cmd, seq };
> \
> +
On Mon, May 30, 2022 at 6:08 PM Joel Selvaraj wrote:
> Add a prefix for EBBG. They manufacture displays which are used in some
> Xiaomi phones, but I could not find much details about the company.
>
> Signed-off-by: Joel Selvaraj
> Acked-by: Krzysztof Kozlowski
Acked-by: Linus Walleij
Hi Daniel,
Thanks for your feedback
On Wed, May 25, 2022 at 07:18:07PM +0200, Daniel Vetter wrote:
> > > VBLANK Events and Asynchronous Commits
> > > ==
> > > When should the VBLANK event complete? When the pixels have been blitted
> > > to the kernel's shadow
Hi Lucas,
Am Mittwoch, 6. April 2022, 18:01:22 CEST schrieb Lucas Stach:
> This adds the DT nodes for all the peripherals that make up the
> HDMI display pipeline.
>
> Signed-off-by: Lucas Stach
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 80 +++
> 1 file changed,
Hi Alexander,
On 22-05-31, Alexander Stein wrote:
> Hi Marco,
>
> Am Montag, 30. Mai 2022, 17:05:48 CEST schrieb Marco Felsch:
> > The bridge device can now also be enabled/disabled by an external reset
> > controller. So the device now supports either enable/disable by simple
> > GPIO or by an
On Tue, May 31, 2022 at 8:26 AM Julia Lawall wrote:
> > On 30 May 2022, at 15:27, Arnd Bergmann wrote:
> > On Mon, May 30, 2022 at 4:08 PM Jani Nikula wrote:
> >>> On Mon, 30 May 2022, Arnd Bergmann wrote:
> >>> struct my_driver_priv {
> >>> struct device dev;
> >>> u8
Add MT8365 binding documentation for all the display components that are
compatible with the compatible string from other SoCs.
Signed-off-by: Fabien Parent
---
.../bindings/display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml| 1 +
MT8365 requires an additional clock for DPI. Add support for that
additional clock.
Signed-off-by: Fabien Parent
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
DPI is part of the display / multimedia block in MediaTek SoCs, and
always have a power-domain (at least in the upstream device-trees).
Add the power-domains property to the binding documentation.
Signed-off-by: Fabien Parent
---
.../devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 6
The code always assume that the main path is enabled, which is not
always the case. When the main path is not enabled, the CRTC index
of the ext path is incorrect which makes the secondary path
not usable. Fix the CRTC index calculation.
Signed-off-by: Fabien Parent
---
Add DRM support for MT8365 SoC.
Signed-off-by: Fabien Parent
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 27 ++
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index
Add mutex support for MT8365 SoC.
Signed-off-by: Fabien Parent
---
drivers/soc/mediatek/mtk-mutex.c | 40
1 file changed, 40 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index 981d56967e7a..b8d5c4a62542 100644
Right now only the DSI path connections are described in the mt8365
mmsys driver. The external path will be DPI/HDMI. This commit adds
the connections for DPI/HDMI.
Signed-off-by: Fabien Parent
---
drivers/soc/mediatek/mt8365-mmsys.h | 22 ++
1 file changed, 22 insertions(+)
DPI for MT8365 is compatible with MT8192 but requires an additional
clock. Modify the documentation to requires this clock only on MT8365 SoCs.
Signed-off-by: Fabien Parent
---
.../display/mediatek/mediatek,dpi.yaml| 44 ---
1 file changed, 37 insertions(+), 7
Hello,
syzbot found the following issue on:
HEAD commit:7e062cda7d90 Merge tag 'net-next-5.19' of git://git.kernel..
git tree: upstream
console+strace: https://syzkaller.appspot.com/x/log.txt?x=172151d3f0
kernel config: https://syzkaller.appspot.com/x/.config?x=e9d71d3c07c36588
Hi Marco,
Am Montag, 30. Mai 2022, 17:05:48 CEST schrieb Marco Felsch:
> The bridge device can now also be enabled/disabled by an external reset
> controller. So the device now supports either enable/disable by simple
> GPIO or by an Reset-Controller.
>
> Signed-off-by: Marco Felsch
> ---
>
> On 30 May 2022, at 15:27, Arnd Bergmann wrote:
>
> On Mon, May 30, 2022 at 4:08 PM Jani Nikula wrote:
>>> On Mon, 30 May 2022, Arnd Bergmann wrote:
>>> struct my_driver_priv {
>>> struct device dev;
>>> u8 causes_misalignment;
>>> spinlock_t lock;
>>> atomic_t
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