Quoting Dmitry Baryshkov (2022-08-22 11:49:00)
> The #sound-dai-cells property should be used only for DP controllers. It
> doesn't make sense for eDP, there is no support for audio output. The
> aux-bus should not be used for DP controllers. Also p1 MMIO region
> should be used only for DP
Quoting Dmitry Baryshkov (2022-08-22 11:48:59)
> Document missing definitions for opp-table (DP controller OPPs), aux-bus
> (DP AUX BUS) and data-lanes (DP/eDP lanes mapping) properties.
>
> Reviewed-by: Stephen Boyd
> Acked-by: Krzysztof Kozlowski
> Signed-off-by: Dmitry Baryshkov
> ---
>
Quoting Dmitry Baryshkov (2022-08-22 11:48:58)
> The commit 85936d4f3815 ("phy: qcom-qmp: add regulator_set_load to dp
> phy") moved setting regulator load to the DP PHY driver (QMP). Then, the
> commit 7516351bebc1 ("drm/msm/dp: delete vdda regulator related
> functions from eDP/DP controller")
Quoting Dmitry Baryshkov (2022-08-22 10:22:04)
> Follow up the merge of address fields and drop the variable that became
> unused after the commit 9403f9a42c88 ("drm/msm/dpu: merge base_off with
> blk_off in struct dpu_hw_blk_reg_map").
>
> Fixes: 9403f9a42c88 ("drm/msm/dpu: merge base_off with
Quoting Dmitry Baryshkov (2022-08-22 10:24:55)
> Drop the dpu_cfg variable and corresponding kzalloc, which became unused
> after changing hw catalog to static configuration.
>
> Fixes: de7d480f5e8c ("drm/msm/dpu: make dpu hardware catalog static const")
> Reported-by: kernel test robot
>
Quoting Dmitry Baryshkov (2022-08-22 11:46:39)
> On 12/07/2022 02:16, Rob Herring wrote:
> >
> > But this is the wrong location for 'data-lanes'. It belongs in an
> > endpoint node.
>
> I rechecked the existing device trees (sc7280-herobrine.dtsi). The
> data-lanes are already inside the main dp
> -static size_t get_pgsize(u64 addr, size_t size)
> +static size_t get_pgsize(u64 addr, size_t size, size_t *count)
> {
> - if (addr & (SZ_2M - 1) || size < SZ_2M)
> - return SZ_4K;
> + size_t blk_offset = -addr % SZ_2M;
addr is unsigned. if this is correct, it's magic.
Build robots complain
smatch warnings:
drivers/gpu/drm/msm/dp/dp_link.c:969 dp_link_process_link_status_update()
warn: inconsistent indenting
Fix it.
Cc: Kuogee Hsieh
Fixes: ea530388e64b ("drm/msm/dp: skip checking LINK_STATUS_UPDATED bit")
Reported-by: kernel test robot
Signed-off-by:
On 8/23/22 5:12 AM, Kees Cook wrote:
On Tue, Aug 23, 2022 at 04:32:10AM +0900, Gwan-gyeong Mun wrote:
On 8/22/22 11:05 PM, Andrzej Hajda wrote:
On 18.08.2022 02:12, Kees Cook wrote:
On Thu, Aug 18, 2022 at 01:07:29AM +0200, Andi Shyti wrote:
[...]
+#define safe_conversion(ptr, value) ({
On 8/22/22 19:09, YueHaibing wrote:
> WARNING: unmet direct dependencies detected for DRM_TTM
> Depends on [n]: HAS_IOMEM [=y] && DRM [=y] && MMU [=n]
> Selected by [y]:
> - DRM_TTM_HELPER [=y] && HAS_IOMEM [=y] && DRM [=y]
> - DRM_HISI_HIBMC [=y] && HAS_IOMEM [=y] && DRM [=y] && PCI
Hi,
On Wed, Aug 17, 2022 at 05:05:25PM -0700, Brian Norris wrote:
> Hmm, actually I'm going to have to retract that now that I've given it
> some more testing locally. I happen to have a system where I commonly
> hit this error case, and I'm thinking commit 211f276ed3d9 is actually
> wrong, and
Hi Andrew,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on linus/master v6.0-rc2 next-20220822]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest
drm_mipi_dbi needs lots of DRM_KMS_HELPER support, so select
that Kconfig symbol like it is done is most other uses, and
the way that it was before MIPS_DBI was moved from tinydrm
to its core location.
Fixes these build errors:
ld: drivers/gpu/drm/drm_mipi_dbi.o: in function `mipi_dbi_buf_copy':
Use 'select' instead of 'depends on' for DRM helpers for the
Ilitek ILI9341 panel driver.
This is what is done in the vast majority of other cases and
this makes it possible to fix a build error with drm_mipi_dbi.
Fixes: 5a04227326b0 ("drm/panel: Add ilitek ili9341 panel driver")
Signed-off-by:
On 8/22/22 7:06 PM, Randy Dunlap wrote:
Hi--
On 8/22/22 17:01, Andrew Davis wrote:
Most Kconfig options to enable a driver are in the Kconfig file
inside the relevant directory, move these two to the same.
Signed-off-by: Andrew Davis
---
drivers/gpu/drm/Kconfig| 42
We have no segment size limitations. Set to unlimited.
Signed-off-by: Andrew Davis
---
drivers/gpu/drm/tidss/tidss_dispc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
b/drivers/gpu/drm/tidss/tidss_dispc.c
index dd3c6a606ae2..624545e4636c 100644
---
Hi--
On 8/22/22 17:01, Andrew Davis wrote:
> Most Kconfig options to enable a driver are in the Kconfig file
> inside the relevant directory, move these two to the same.
>
> Signed-off-by: Andrew Davis
> ---
> drivers/gpu/drm/Kconfig| 42 --
>
While a scatter-gather table having only 1 entry does imply it is
contiguous, it is a logic error to assume the inverse. Tables can have
more than 1 entry and still be contiguous. Use a proper check here.
Signed-off-by: Andrew Davis
---
drivers/gpu/drm/omapdrm/omap_gem.c | 14 ++
1
Most Kconfig options to enable a driver are in the Kconfig file
inside the relevant directory, move these two to the same.
Signed-off-by: Andrew Davis
---
drivers/gpu/drm/Kconfig| 42 --
drivers/gpu/drm/amd/amdgpu/Kconfig | 22
Although there is usually not such a limitation (and when there is it is
often only because the driver forgot to change the super small default),
it is still correct here to break scatterlist element into chunks of
dma_max_mapping_size().
This might cause some issues for users with misbehaving
Quoting Dmitry Baryshkov (2022-07-10 01:41:30)
> The eDP node includes two clocks which are used by the eDP PHY rather
> than eDP controller itself. Drop these clocks to remove extra difference
> between eDP and DP controllers.
>
> Suggested-by: Stephen Boyd
> Signed-off-by: Dmitry Baryshkov
>
Convert to io-pgtable's bulk {map,unmap}_pages() APIs, to help the old
single-page interfaces eventually go away. Unmapping heap BOs still
wants to be done a page at a time, but everything else can get the full
benefit of the more efficient interface.
Signed-off-by: Robin Murphy
---
Reviewed-by: Lyude Paul
Thanks! I will push this upstream in a moment
On Mon, 2022-08-15 at 13:40 +0300, Beniamin Sandu wrote:
> This makes the code look cleaner and easier to read.
>
> Signed-off-by: Beniamin Sandu
> ---
> drivers/gpu/drm/nouveau/nouveau_hwmon.c | 85
On Thu, 18 Aug 2022 09:05:24 -0300
Jason Gunthorpe wrote:
> On Wed, Aug 17, 2022 at 01:11:38PM -0300, Jason Gunthorpe wrote:
> > dma-buf has become a way to safely acquire a handle to non-struct page
> > memory that can still have lifetime controlled by the exporter. Notably
> > RDMA can now
Reviewed-by: Lyude Paul
On Fri, 2022-08-19 at 22:09 +0200, Karol Herbst wrote:
> It is a bit unlcear to us why that's helping, but it does and unbreaks
> suspend/resume on a lot of GPUs without any known drawbacks.
>
> Cc: sta...@vger.kernel.org # v5.15+
> Closes:
On 07/08/2022 20:28, Rob Clark wrote:
From: Rob Clark
Intended as a way to trigger error paths in mesa.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_debugfs.c | 8
drivers/gpu/drm/msm/msm_drv.c | 15 +++
On 10/08/2022 06:50, Bjorn Andersson wrote:
Most instances where HPD interrupts are masked and unmasked are guareded
by the presence of an EDP panel being connected, but not all. Extend
this to cover the last few places, as HPD interrupt handling is not used
for the EDP case.
Signed-off-by:
On 10/08/2022 06:50, Bjorn Andersson wrote:
The DisplayPort controller's hot-plug mechanism is based on pinmuxing a
physical signal no a GPIO pin into the controller. This is not always
possible, either because there aren't dedicated GPIOs available or
because the hot-plug signal is a virtual
On 10/08/2022 06:50, Bjorn Andersson wrote:
The Qualcomm SDM845 platform has a single DisplayPort controller, with
the same design as SC7180, so add support for this by reusing the SC7180
definition.
Signed-off-by: Bjorn Andersson
Reviewed-by: Dmitry Baryshkov
---
On 08/22, Igor Matheus Andrade Torrente wrote:
> On 8/22/22 16:01, Melissa Wen wrote:
> > On 08/22, Igor Matheus Andrade Torrente wrote:
> > > Hi Melissa,
> > >
> > > On 8/20/22 07:51, Melissa Wen wrote:
> > > > On 08/19, Igor Torrente wrote:
> > > > > Currently the blend function only accepts
The display controller node can contain the opp-table describing its
frequencies and OPP levels. Allow specifying the opp-table in the DPU
devices.
Signed-off-by: Dmitry Baryshkov
---
Documentation/devicetree/bindings/display/msm/dpu-common.yaml | 3 +++
1 file changed, 3 insertions(+)
diff
Move schema for qcom,sc7180-mdss from dpu-sc7180.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display/msm/dpu-sc7180.yaml | 149 +-
Move schema for qcom,sc7280-mdss from dpu-sc7280.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display/msm/dpu-sc7280.yaml | 148 +-
Move schema for qcom,msm8998-mdss from dpu-msm8998.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display/msm/dpu-msm8998.yaml | 142 +-
Split Mobile Display SubSystem (MDSS) root node bindings to the separate
yaml file. Changes to the existing (txt) schema:
- Added optional "vbif_nrt_phys" region used by msm8996
- Made "bus" and "vsync" clocks optional (they are not used by some
platforms)
- Added (optional) "core" clock
Move schema for qcom,qcm2290-mdss from dpu-qcm2290.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display/msm/dpu-qcm2290.yaml | 140 +-
Move schema for qcom,sdm845-mdss from dpu-sdm845.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display/msm/dpu-sdm845.yaml | 135 ---
.../devicetree/bindings/display/msm/mdss.yaml
Add gcc-bus clock required for the SDM845 DPU device tree node. This
change was made in the commit 111c52854102 ("arm64: dts: qcom: sdm845:
move bus clock to mdp node for sdm845 target"), but was not reflected in
the schema.
Reviewed-by: Rob Herring
Signed-off-by: Dmitry Baryshkov
---
Move properties common to all DPU DT nodes to the dpu-common.yaml.
Note, this removes description of individual DPU port@ nodes. However
such definitions add no additional value. The reg values do not
correspond to hardware INTF indices. The driver discovers and binds
these ports not paying any
Create separate YAML schema for MDSS devicesd$ (both for MDP5 and DPU
devices). Cleanup DPU schema files, so that they do not contain schema
for both MDSS and DPU nodes. Apply misc small fixes to the DPU schema
afterwards.
Changes since v2:
- Added a patch to allow opp-table under the dpu*
On 18/07/2022 20:50, Rob Herring wrote:
On Sun, Jul 10, 2022 at 12:00:40PM +0300, Dmitry Baryshkov wrote:
Move properties common to all DPU DT nodes to the dpu-common.yaml.
Note, this removes description of individual DPU port@ nodes. However
such definitions add no additional value. The reg
On Tue, Aug 23, 2022 at 04:32:10AM +0900, Gwan-gyeong Mun wrote:
> On 8/22/22 11:05 PM, Andrzej Hajda wrote:
> > On 18.08.2022 02:12, Kees Cook wrote:
> > > On Thu, Aug 18, 2022 at 01:07:29AM +0200, Andi Shyti wrote:
> > > > [...]
> > > > > +#define safe_conversion(ptr, value) ({ \
> > > > > +
On 8/19/22 10:57, Yang Yingliang wrote:
> Add missing pci_disable_device() in error path in chipsfb_pci_init().
>
> Signed-off-by: Yang Yingliang
applied.
Thanks!
Helge
> ---
> drivers/video/fbdev/chipsfb.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/video/fbdev/chipsfb.c
Poblem: Given many entities competing for same rq on
same scheduler an uncceptabliy long wait time for some
jobs waiting stuck in rq before being picked up are
observed (seen using GPUVis).
The issue is due to Round Robin policy used by scheduler
to pick up the next entity for execution. Under
On 8/21/22 13:17, Shigeru Yoshida wrote:
> It's needed to destroy bl_curve_mutex on freeing struct fb_info since
> the mutex is embedded in the structure and initialized when it's
> allocated.
>
> Signed-off-by: Shigeru Yoshida
applied.
Thanks,
Helge
> ---
> drivers/video/fbdev/core/fbsysfs.c
On 8/19/22 13:06, Jiapeng Chong wrote:
> No functional modification involved.
>
> drivers/video/fbdev/aty/radeon_base.c:2107 radeon_identify_vram() warn:
> inconsistent indenting.
>
> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=1932
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng
Applied. Thanks!
Alex
On Sun, Aug 21, 2022 at 2:41 AM Tales Aparecida
wrote:
>
> Removes DEFINEs that should have been removed after they were
> introduced to ObjectID.h by the commit abea57d70e90
> ("drm/amdgpu: Add BRACKET_LAYOUT_ENUMs to ObjectID.h")
>
> Signed-off-by: Tales Aparecida
>
On 8/18/22 12:44, Letu Ren wrote:
> In `do_fb_ioctl()` of fbmem.c, if cmd is FBIOPUT_VSCREENINFO, var will be
> copied from user, then go through `fb_set_var()` and
> `info->fbops->fb_check_var()` which could may be `pm2fb_check_var()`.
> Along the path, `var->pixclock` won't be modified. This
On 8/19/22 13:04, Jiapeng Chong wrote:
> No functional modification involved.
>
> drivers/video/fbdev/sis/sis_main.c:6165 sisfb_probe() warn: inconsistent
> indenting.
> drivers/video/fbdev/sis/sis_main.c:4266 sisfb_post_300_rwtest() warn:
> inconsistent indenting.
>
On 8/22/22 16:01, Melissa Wen wrote:
On 08/22, Igor Matheus Andrade Torrente wrote:
Hi Melissa,
On 8/20/22 07:51, Melissa Wen wrote:
On 08/19, Igor Torrente wrote:
Currently the blend function only accepts XRGB_ and ARGB_
as a color input.
This patch refactors all the functions
On 8/22/22 15:37, Melissa Wen wrote:
On 08/22, Igor Matheus Andrade Torrente wrote:
Hi Mellisa,
On 8/20/22 08:00, Melissa Wen wrote:
On 08/19, Igor Torrente wrote:
Changes the name of this struct to a more meaningful name.
A name that represents better what this struct is about.
Composer is
On 8/22/22 11:05 PM, Andrzej Hajda wrote:
On 18.08.2022 02:12, Kees Cook wrote:
On Thu, Aug 18, 2022 at 01:07:29AM +0200, Andi Shyti wrote:
Hi Kees,
would you mind taking a look at this patch?
Hi! Thanks for the heads-up!
Thanks,
Andi
On Tue, Aug 16, 2022 at 06:35:18PM +0900,
From: Vitaly Kuznetsov Sent: Thursday, August 18, 2022
7:25 AM
>
> When drm_aperture_remove_conflicting_pci_framebuffers() fails, 'pdev'
> needs to be released with pci_dev_put().
>
> Fixes: 76c56a5affeb ("drm/hyperv: Add DRM driver for hyperv synthetic video
> device")
> Signed-off-by:
From: Vitaly Kuznetsov Sent: Thursday, August 18, 2022
7:25 AM
>
> There are already two places in kernel with PCI_VENDOR_ID_MICROSOFT/
> PCI_DEVICE_ID_HYPERV_VIDEO and there's a need to use these from core
> Vmbus code. Move the defines to a common header.
>
> No functional change.
>
>
On Fri, 19 Aug 2022 22:10:44 +0530, Akhil P Oommen wrote:
> Add an optional reference to GPUCC reset which can be used to ensure cx
> gdsc collapse during gpu recovery.
>
> Signed-off-by: Akhil P Oommen
> ---
>
> Changes in v4:
> - New patch in v4
>
>
On 11/08/2022 11:25, Krzysztof Kozlowski wrote:
On 10/07/2022 12:00, Dmitry Baryshkov wrote:
Move schema for qcom,sc7180-mdss from dpu-sc7180.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display/msm/dpu-sc7180.yaml
On 08/22, Igor Matheus Andrade Torrente wrote:
> Hi Melissa,
>
> On 8/20/22 07:51, Melissa Wen wrote:
> > On 08/19, Igor Torrente wrote:
> > > Currently the blend function only accepts XRGB_ and ARGB_
> > > as a color input.
> > >
> > > This patch refactors all the functions related to
On 11/07/2022 14:37, Krzysztof Kozlowski wrote:
On 10/07/2022 11:00, Dmitry Baryshkov wrote:
Thank you for your patch. There is something to discuss/improve.
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+ - power-domains
The #sound-dai-cells property should be used only for DP controllers. It
doesn't make sense for eDP, there is no support for audio output. The
aux-bus should not be used for DP controllers. Also p1 MMIO region
should be used only for DP controllers.
Take care of these differences.
Reviewed-by:
The commit 85936d4f3815 ("phy: qcom-qmp: add regulator_set_load to dp
phy") moved setting regulator load to the DP PHY driver (QMP). Then, the
commit 7516351bebc1 ("drm/msm/dp: delete vdda regulator related
functions from eDP/DP controller") removed support for VDDA supplies
from the DP controller
Fix several issues with the DP and eDP bindings on the Qualcomm
platforms. While we are at it, fix several small issues with platform
files declaring these controllers.
Changes since v2:
- Fixed commit message for the patch 1 to mention proper commit IDs.
- Dropped dts patches which were picked
Document missing definitions for opp-table (DP controller OPPs), aux-bus
(DP AUX BUS) and data-lanes (DP/eDP lanes mapping) properties.
Reviewed-by: Stephen Boyd
Acked-by: Krzysztof Kozlowski
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display/msm/dp-controller.yaml | 12
From: Rob Clark
Using map_pages/unmap_pages cuts down on the # of pgtable walks needed
in the process of finding where to insert/remove an entry. The end
result is ~5-10x faster than mapping a single page at a time.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_iommu.c | 91
On 12/07/2022 02:16, Rob Herring wrote:
On Sun, Jul 10, 2022 at 11:41:32AM +0300, Dmitry Baryshkov wrote:
Document missing definitions for opp-table (DP controller OPPs), aux-bus
(DP AUX BUS) and data-lanes (DP/eDP lanes mapping) properties.
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry
On 08/22, Igor Matheus Andrade Torrente wrote:
> Hi Mellisa,
>
> On 8/20/22 08:00, Melissa Wen wrote:
> > On 08/19, Igor Torrente wrote:
> > > Changes the name of this struct to a more meaningful name.
> > > A name that represents better what this struct is about.
> > >
> > > Composer is the
On 22/08/2022 20:32, Abhinav Kumar wrote:
On 8/22/2022 9:49 AM, Dmitry Baryshkov wrote:
On 22/08/2022 19:38, Abhinav Kumar wrote:
Hi Dmitry
On 8/22/2022 9:18 AM, Dmitry Baryshkov wrote:
On 17/08/2022 21:01, Kuogee Hsieh wrote:
DRM commit_tails() will disable downstream crtc/encoder/bridge
Hi Mellisa,
On 8/20/22 08:00, Melissa Wen wrote:
On 08/19, Igor Torrente wrote:
Changes the name of this struct to a more meaningful name.
A name that represents better what this struct is about.
Composer is the code that do the compositing of the planes.
This struct contains information on
Hi Melissa,
On 8/20/22 07:51, Melissa Wen wrote:
On 08/19, Igor Torrente wrote:
Currently the blend function only accepts XRGB_ and ARGB_
as a color input.
This patch refactors all the functions related to the plane composition
to overcome this limitation.
The pixels blend is done
On Thu, 18 Aug 2022 09:17:13 +0300, Krzysztof Kozlowski wrote:
> Simple 'opp-table:true' accepts a boolean property as opp-table, so
> restrict it to object to properly enforce real OPP table nodes.
>
> Signed-off-by: Krzysztof Kozlowski
>
> ---
>
> Changes since v1:
> 1. Correct typo in msg.
On 06/07/2022 18:52, Krzysztof Kozlowski wrote:
On 06/07/2022 16:52, Dmitry Baryshkov wrote:
Make display/msm/gmu.yaml describe all existing GMU variants rather than
just the 630.2 (SDM845) version of it.
Signed-off-by: Dmitry Baryshkov
---
.../devicetree/bindings/display/msm/gmu.yaml |
Hi,
On Mon, Aug 22, 2022 at 10:33 AM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Aug 22, 2022 at 6:35 AM Johan Hovold wrote:
> >
> > On Fri, Jul 22, 2022 at 11:48:40AM +0200, Johan Hovold wrote:
> > > On Mon, Jul 11, 2022 at 09:52:02AM +0200, Johan Hovold wrote:
> > > > Add an eDP panel entry for
panel-edp changes go through the drm-misc tree (as per the "DRM PANEL
DRIVERS" entry in MAINTAINERS), but ever since splitting panel-edp out
of panel-simple I've been trying to keep a close eye on it. Make that
official by listing me as a reviewer.
Signed-off-by: Douglas Anderson
---
On 8/22/2022 10:24 AM, Dmitry Baryshkov wrote:
Drop the dpu_cfg variable and corresponding kzalloc, which became unused
after changing hw catalog to static configuration.
Fixes: de7d480f5e8c ("drm/msm/dpu: make dpu hardware catalog static const")
Reported-by: kernel test robot
Reported-by:
On 15/07/2022 00:54, Abhinav Kumar wrote:
On 7/12/2022 6:22 AM, Dmitry Baryshkov wrote:
Currently the DSI driver has two separate paths: one if the next device
in a chain is a bridge and another one if the panel is connected
directly to the DSI host. Simplify the code path by using
It makes no sense to have the HPD worker in the MSM DSI driver anymore.
It is only queued from the dsi_host_attach/detach() callbacks, where
it plays no useful role. Either way the panel or next bridge will be
present and will report it's status directly.
Signed-off-by: Dmitry Baryshkov
---
On 8/22/2022 9:49 AM, Dmitry Baryshkov wrote:
On 22/08/2022 19:38, Abhinav Kumar wrote:
Hi Dmitry
On 8/22/2022 9:18 AM, Dmitry Baryshkov wrote:
On 17/08/2022 21:01, Kuogee Hsieh wrote:
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and
Hi,
On Mon, Aug 22, 2022 at 6:35 AM Johan Hovold wrote:
>
> On Fri, Jul 22, 2022 at 11:48:40AM +0200, Johan Hovold wrote:
> > On Mon, Jul 11, 2022 at 09:52:02AM +0200, Johan Hovold wrote:
> > > Add an eDP panel entry for AUO B133UAN02.1.
> > >
> > > Due to lack of documentation, use the
On Fri, Jul 22, 2022 at 02:51:43PM +0200, Andrzej Hajda wrote:
> In case of deferred FB setup core can try to create new
> framebuffer. Disallow it if hpd_suspended flag is set.
>
> Signed-off-by: Andrzej Hajda
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_fbdev.c | 6
On Fri, Jul 22, 2022 at 02:51:42PM +0200, Andrzej Hajda wrote:
> HPD events during driver removal can be generated by hardware and
> software frameworks - drm_dp_mst, the former we can avoid by disabling
> interrupts, the latter can be triggered by any drm_dp_mst transaction,
> and this is too
On 8/16/22 22:55, Dmitry Osipenko wrote:
> On 8/16/22 15:03, Christian König wrote:
>> Am 16.08.22 um 13:44 schrieb Dmitry Osipenko:
>>> [SNIP]
The other complication I noticed is that we don't seem to keep around
the fd after importing to a GEM handle. And I could imagine that
Drop the dpu_cfg variable and corresponding kzalloc, which became unused
after changing hw catalog to static configuration.
Fixes: de7d480f5e8c ("drm/msm/dpu: make dpu hardware catalog static const")
Reported-by: kernel test robot
Reported-by: Dan Carpenter
Signed-off-by: Dmitry Baryshkov
---
Follow up the merge of address fields and drop the variable that became
unused after the commit 9403f9a42c88 ("drm/msm/dpu: merge base_off with
blk_off in struct dpu_hw_blk_reg_map").
Fixes: 9403f9a42c88 ("drm/msm/dpu: merge base_off with blk_off in struct
dpu_hw_blk_reg_map")
Signed-off-by:
On 21/08/2022 18:54, Rob Clark wrote:
From: Rob Clark
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On 19/08/2022 19:40, Akhil P Oommen wrote:
Allow a consumer driver to poll for cx gdsc collapse through Reset
framework.
Signed-off-by: Akhil P Oommen
---
(no changes since v3)
Changes in v3:
- Convert 'struct qcom_reset_ops cx_gdsc_reset' to 'static const' (Krzysztof)
Changes in v2:
-
On 19/08/2022 19:40, Akhil P Oommen wrote:
Add a reset op compatible function to poll for gdsc collapse.
Signed-off-by: Akhil P Oommen
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On 19/08/2022 19:40, Akhil P Oommen wrote:
Allow soc specific clk drivers to specify a custom reset operation. We
will use this in an upcoming patch to allow gpucc driver to specify a
differet reset operation for cx_gdsc.
Signed-off-by: Akhil P Oommen
Reviewed-by: Dmitry Baryshkov
--
With
On Fri, Jul 22, 2022 at 02:51:41PM +0200, Andrzej Hajda wrote:
> HPD event after fbdev unregistration can cause registration of deferred
> fbdev which will not be unregistered later, causing use-after-free.
> To avoid it HPD handling should be suspended before fbdev unregistration.
>
> It should
On Fri, Jul 22, 2022 at 02:51:40PM +0200, Andrzej Hajda wrote:
> i915->hotplug.dig_port_work can be queued from intel_hpd_irq_handler
> called by IRQ handler or by intel_hpd_trigger_irq called from dp_mst.
> Since dp_mst is suspended after irq handler uninstall, a cleaner approach
> is to cancel
On 22/08/2022 19:38, Abhinav Kumar wrote:
Hi Dmitry
On 8/22/2022 9:18 AM, Dmitry Baryshkov wrote:
On 17/08/2022 21:01, Kuogee Hsieh wrote:
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and crtc->active is set before pushing
a new frame
Hi Dmitry
On 8/22/2022 9:18 AM, Dmitry Baryshkov wrote:
On 17/08/2022 21:01, Kuogee Hsieh wrote:
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and crtc->active is set before pushing
a new frame downstream.
There is a rare case that user space
On 09/08/2022 22:40, Laurent Pinchart wrote:
Hi Abhinav,
Thank you for the patch.
On Mon, Aug 08, 2022 at 05:35:30PM -0700, Abhinav Kumar wrote:
adv7533 bridge tries to dynamically switch lanes based on the
mode by detaching and attaching the mipi dsi device.
This approach is incorrect
On 17/08/2022 21:01, Kuogee Hsieh wrote:
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and crtc->active is set before pushing
a new frame downstream.
There is a rare case that user space display manager issue an extra
screen update immediately
This series adds support for 4k@30 to the rockchip HDMI controller. This
has been tested on a rk3568 rock3a board. It should be possible to add
4k@60 support the same way, but it doesn't work for me, so let's add
4k@30 as a first step.
Sascha
Sascha Hauer (2):
drm/rockchip: dw_hdmi: relax
The driver checks if the pixel clock of the given mode matches an entry
in the mpll config table. The frequencies in the mpll table are meant as
a frequency range up to which the entry works, not as a frequency that
must match the pixel clock. Return MODE_OK when the pixelclock is
smaller than one
This adds the PLL/phy settings to support higher resolutions like 4k@30.
The values were taken from the Rockchip downstream Kernel.
Signed-off-by: Sascha Hauer
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 8
1 file changed, 8 insertions(+)
diff --git
Hi Tomi,
Thank you for the patch.
On Mon, Aug 22, 2022 at 05:34:01PM +0300, Tomi Valkeinen wrote:
> From: Tomi Valkeinen
>
> rcar_mipi_dsi_startup() writes correct values to VCLKSET, but as it uses
> or-operation to add the new values to the current value in the register,
> it should first
On 2022-08-22 14:52, Robin Murphy wrote:
On 2022-08-21 19:19, Rob Clark wrote:
From: Rob Clark
Optimize TLB invalidation by using different ASID for each set of
pgtables. There can be scenarios where multiple processes end up
with the same ASID (such as >256 processes using the GPU), but
From: Tomi Valkeinen
The DU driver uses the rcar_lvds_clk_enable() and
rcar_lvds_clk_disable() functions enable or disable the pixel clock
generated by the LVDS encoder, as it requires that clock for proper DU
operation. Rename the functions by replacing "clk" with "pclk" to make
it clearer that
From: Tomi Valkeinen
rcar_mipi_dsi_startup() writes correct values to VCLKSET, but as it uses
or-operation to add the new values to the current value in the register,
it should first make sure the fields are cleared.
Do this by using rcar_mipi_dsi_write() to write the VCLKSET_CKEN bit to
From: Tomi Valkeinen
Improve the DSI shutdown procedure by clearing various bits that were
set while enabling the DSI output. There has been no clear issues caused
by these, but it's safer to ensure that the features are disabled at the
start of the next DSI enable.
Signed-off-by: Tomi
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