Hi Roman,
On 2023-03-29 at 21:58:02 +0200, Maxime Ripard wrote:
> On Tue, Mar 28, 2023 at 01:48:33AM +0200, Roman Beranek wrote:
>> On Mon Mar 27, 2023 at 10:20 PM CEST, Maxime Ripard wrote:
>> >
>> > On Sat, Mar 25, 2023 at 12:40:04PM +0100, Frank Oltmanns wrote:
>> > > Claiming to set the
On 3/29/2023 8:30 PM, Dmitry Baryshkov wrote:
On 30/03/2023 05:53, Abhinav Kumar wrote:
On 3/16/2023 9:16 AM, Dmitry Baryshkov wrote:
It is possible to use multirect feature and split source to use the SSPP
to output two consecutive rectangles. This commit brings in this
capability to
Hi,
On 2023-03-29 at 21:56:39 +0200, Maxime Ripard wrote:
> Hi,
>
> On Tue, Mar 28, 2023 at 09:28:19PM +0200, Frank Oltmanns wrote:
>> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
>> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
>> @@ -819,6 +819,34 @@ static void
On 3/29/23 22:36, Kai-Heng Feng wrote:
On Wed, Mar 29, 2023 at 9:23 PM Mario Limonciello
wrote:
On 3/29/23 04:59, Kai-Heng Feng wrote:
When the power is lost due to ACPI power resources being turned off, the
driver should reset the GPU so it can work anew.
First, _PR3 support of the
On Wed, Mar 29, 2023 at 11:04:17AM +0200, Thomas Zimmermann wrote:
(cc'ing Lucas)
Hi
Am 25.03.23 um 08:46 schrieb Sui Jingfeng:
The assignment already done in drm_client_buffer_vmap(),
just trival clean, no functional change.
Signed-off-by: Sui Jingfeng <15330273...@189.cn>
---
On Thu, Mar 30, 2023 at 2:10 AM Jagan Teki wrote:
>
> On Sat, Feb 18, 2023 at 4:47 PM Pin-yen Lin wrote:
> >
> > This series is developed for and tested on MT8173 board, and the layout is:
> >
> > /-- anx7688
> > -- MT8173 HDMI bridge -- GPIO mux
> >
On Tue, Mar 28, 2023 at 04:31:13PM -0700, Anusha Srivatsa wrote:
-Original Message-
From: De Marchi, Lucas
Sent: Thursday, March 23, 2023 10:18 PM
To: intel...@lists.freedesktop.org
Cc: Srivatsa, Anusha ; Harrison, John C
; Ceraolo Spurio, Daniele
; dri-devel@lists.freedesktop.org;
On Wed, Mar 29, 2023 at 9:23 PM Mario Limonciello
wrote:
>
>
> On 3/29/23 04:59, Kai-Heng Feng wrote:
> > When the power is lost due to ACPI power resources being turned off, the
> > driver should reset the GPU so it can work anew.
> >
> > First, _PR3 support of the hierarchy needs to be found
On 30/03/2023 05:53, Abhinav Kumar wrote:
On 3/16/2023 9:16 AM, Dmitry Baryshkov wrote:
It is possible to use multirect feature and split source to use the SSPP
to output two consecutive rectangles. This commit brings in this
capability to support wider screen resolutions.
Tested-by: Abhinav
Hi all,
After merging the drm tree, today's linux-next build (htmldocs) produced
this warning:
include/uapi/linux/sync_file.h:77: warning: Function parameter or member
'num_fences' not described in 'sync_file_info'
Revealed by commit
d71c11cc79d2 ("dma-buf/sync_file: Surface sync-file
1. Add ovl_adaptor get_format and get_num_formats component function.
The two functions are needed for getting the supported format in
mtk_plane_init().
2. Get supported format from the ovl_adaptor's rdma engine - mdp_rdma.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h
Add ovl_adaptor get_format and get_num_formats component function.
The two functions are needed for getting the supported format in
mtk_plane_init().
Changes in v3:
- modify for reviewer's comment in v2.
- add mdp-rdma get supported format api for ovl_adaptor driver.
Changes in v2:
- remove
Add mdp_rdma get_format and get_num_formats function.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +++
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 24
2 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
On 3/16/2023 9:16 AM, Dmitry Baryshkov wrote:
It is possible to use multirect feature and split source to use the SSPP
to output two consecutive rectangles. This commit brings in this
capability to support wider screen resolutions.
Tested-by: Abhinav Kumar # sc7280
Signed-off-by: Dmitry
On Wed, Mar 29, 2023 at 8:49 PM Kai-Heng Feng
wrote:
>
> On Wed, Mar 29, 2023 at 9:21 PM Alex Deucher wrote:
> >
> > On Wed, Mar 29, 2023 at 6:00 AM Kai-Heng Feng
> > wrote:
> > >
> > > When the power is lost due to ACPI power resources being turned off, the
> > > driver should reset the GPU so
for the patch! Yet something to improve:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm/drm-next drm-intel/for-linux-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.3-rc4
next-20230329]
[If your patch is applied to the wrong git tree, kindly
./drivers/gpu/drm/bridge/samsung-dsim.c:1957:6-11: No need to set .owner here.
The core will do it.
Reported-by: Abaci Robot
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4640
Signed-off-by: Yang Li
---
drivers/gpu/drm/bridge/samsung-dsim.c | 1 -
1 file changed, 1 deletion(-)
diff
On Wed, Mar 29, 2023 at 9:21 PM Alex Deucher wrote:
>
> On Wed, Mar 29, 2023 at 6:00 AM Kai-Heng Feng
> wrote:
> >
> > When the power is lost due to ACPI power resources being turned off, the
> > driver should reset the GPU so it can work anew.
> >
> > First, _PR3 support of the hierarchy needs
On 30/03/2023 02:18, Jessica Zhang wrote:
Introduce MSM-specific DSC helper methods, as some calculations are
common between DP and DSC.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/disp/msm_dsc_helper.c | 74
On 30/03/2023 02:18, Jessica Zhang wrote:
Introduce MSM-specific DSC helper methods, as some calculations are
common between DP and DSC.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/disp/msm_dsc_helper.c | 74
On Wed, 2023-03-29 at 08:43 +0100, Tvrtko Ursulin wrote:
> On 28/03/2023 18:52, Rodrigo Vivi wrote:
> > On Tue, Mar 28, 2023 at 05:01:36PM +, Teres Alexis, Alan Previn wrote:
> > > On Mon, 2023-03-27 at 17:15 +0100, Tvrtko Ursulin wrote:
> > >
alan:snip
> How will the context create path
Hi Sui,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm/drm-next drm-intel/for-linux-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.3-rc4
next-20230329]
[If your patch is applied
On 30/03/2023 02:45, Jessica Zhang wrote:
On 3/29/2023 4:31 PM, Dmitry Baryshkov wrote:
On 30/03/2023 02:18, Jessica Zhang wrote:
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
On 30/03/2023 02:18, Jessica Zhang wrote:
Use MSM and DRM DSC helper methods.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
On 3/29/2023 4:25 PM, Dmitry Baryshkov wrote:
On 30/03/2023 02:18, Jessica Zhang wrote:
Add helpers to calculate det_thresh_flatness and initial_scale_value as
these calculations are defined within the DSC spec.
Signed-off-by: Jessica Zhang
---
include/drm/display/drm_dsc_helper.h | 10
On 3/29/2023 4:31 PM, Dmitry Baryshkov wrote:
On 30/03/2023 02:18, Jessica Zhang wrote:
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
On 30/03/2023 02:18, Jessica Zhang wrote:
Correct the math for slice_last_group_size so that it matches the
calculations downstream.
Signed-off-by: Jessica Zhang
Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC")
Reviewed-by: Dmitry Baryshkov
---
On 30/03/2023 02:18, Jessica Zhang wrote:
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index
On 30/03/2023 02:18, Jessica Zhang wrote:
Add helpers to calculate det_thresh_flatness and initial_scale_value as
these calculations are defined within the DSC spec.
Signed-off-by: Jessica Zhang
---
include/drm/display/drm_dsc_helper.h | 10 ++
1 file changed, 10 insertions(+)
diff
Correct the math for slice_last_group_size so that it matches the
calculations downstream.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
Use MSM and DRM DSC helper methods.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index 619926da1441..648c530b5d05 100644
---
Introduce MSM-specific DSC helper methods, as some calculations are
common between DP and DSC.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/disp/msm_dsc_helper.c | 74 +++
change-id: 20230329-rfc-msm-dsc-helper-981a95edfbd0
Best regards,
--
Jessica Zhang
Add helpers to calculate det_thresh_flatness and initial_scale_value as
these calculations are defined within the DSC spec.
Signed-off-by: Jessica Zhang
---
include/drm/display/drm_dsc_helper.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/drm/display/drm_dsc_helper.h
clang with W=1 reports
drivers/gpu/drm/nouveau/nouveau_svm.c:929:6: error: variable
'ret' set but not used [-Werror,-Wunused-but-set-variable]
int ret;
^
This variable is not used so remove it.
Signed-off-by: Tom Rix
---
drivers/gpu/drm/nouveau/nouveau_svm.c | 5 ++---
1
The GPU on msm8996 is powered on by several power domains. Add
configuration for the GFX CPR and MX domains.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
Some a5xx Adreno devices might need additional power domains to handle
voltage scaling. While we do not (yet) have support for CPR3 providing
voltage scaling, allow specifying MX domain to scale the memory cell
voltage.
Signed-off-by: Dmitry Baryshkov
---
For some a5xx Adrenos we have to specify both GX and MX power domains.
GX is used to power up the GPU clocks and logic. MX is used for scaling
voltage of memory cells.
In case the DT specifies several (GX, MX) power domains, none will be
bound by the core. We have to manage GX manually. Also make
Konrad brought up the topic of scaling the MX domain according to the
OPP changes. Here is my RFC for this functionality. I post it as an RFC
for two reasons:
1) I'm not sure that we should scale MX if we are not scaling main
voltage following the CPR3
2) With this patchset I'm getting the
Hi Dave, Daniel,
Fixes for 6.3.
The following changes since commit 197b6b60ae7bc51dd0814953c562833143b292aa:
Linux 6.3-rc4 (2023-03-26 14:40:20 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.3-2023-03-29
for you to
From: Sui Jingfeng
As Lucas pointed, there should have some way to let mesa query the kernel
about the host platform whether support cached coherent mode or not. This
should touch the ioctl stuff I think, bad design may lead new mesa or
libdrm crash old kernel. It need more instruction how
From: Sui Jingfeng
Also rename the virtual master device as etnaviv_platform_device, for
better reflection that it is a platform device, not the drm device control
structure. Another benefit is that we no longer need to call of_node_put()
for three different case. Instead, we only need call
From: Sui Jingfeng
This patch add pci driver support to etnaviv on the top of what already
have, take the gc1000 in ls7a1000 and ls2k1000 as the first instance of
the generic pci device driver.
There is only one gpu core for the gc1000 in ls7a1000 and ls2k1000,
component framework can be
From: Sui Jingfeng
struct etnaviv_drm_private contains a lot of common resources that is
shared by all GPUs, members of it is large enough. This patch introduce
two dedicate functions which is for the construction and destruction of
the instance of this structure. The idea is avoid to leak
From: Sui Jingfeng
Because it is also platform dependent, there are environment which
without clk subsystem support, we don't want the driver rage quit
because of no clk subsystem driver support. There are discrete graphics
card which integrate vivante gpu IP.
For the GPU in ls7a1000 and
From: Sui Jingfeng
There is a Vivante GC1000(v5037) in LS2K1000 and LS7A1000, the gpu is a
PCI device and it has 2D and 3D core in the same gpu device. Therefore,
this patch trying to add PCI device driver support on the great works
already done by etnaviv folks.
LS7A1000 is a bridge
From: Sui Jingfeng
Because get irq from a device is platform dependent, pci device has
different method to get irq. This patch is a preparation before we
introduce support for the pci device.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 34
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
> Signed-off-by: Dmitry Baryshkov
> ---
> .../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h| 178 +
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 181 +-
> 2 files changed, 180 insertions(+), 179 deletions(-)
>
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
> UBWC and highest bank settings differ slightly between different DPU
> units of the same generation, while the dpu_caps and dpu_mdp_cfg are
> much more stable. To ease configuration reuse move ubwc_swizzle and
> highest_bank_bit data to separate
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
> Fix several leftover _pp strutures and mark them as const, making all hw
> catalog fit into the rodata section.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6
On 29/03/2023 22:52, Rob Herring wrote:
On Tue, Mar 28, 2023 at 5:38 PM Dmitry Baryshkov
wrote:
On Mon, 09 Jan 2023 11:15:17 +0100, Neil Armstrong wrote:
This adds support for the MDSS/DPU/DSI on the Qualcomm SM8550 platform.
This patchset is based on the SM8450 display support serie at
From: Fabio Estevam
Marco's NXP email is no longer valid.
Marco told me offline that he has no interest to be listed as the
maintainer contact for this binding, so add my contact.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Use my contact instead of Marco's personal email.
Quoting Maxime Ripard (2023-03-29 12:50:49)
> On Wed, Mar 22, 2023 at 04:31:04PM -0700, Stephen Boyd wrote:
>
> > The clk_set_parent() path is valid for those cases. Probably nobody
> > cares about determine_rate because they don't set rates on these clks.
> > Some drivers even explicitly left
On 13/02/2023 13:18, Dmitry Baryshkov wrote:
On 13/02/2023 13:01, Konrad Dybcio wrote:
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
From: Konrad Dybcio
These blocks are of variable length on different SoCs. Set the
correct values where I was able to retrieve it from downstream
DTs and
On Tue, Mar 28, 2023 at 01:48:33AM +0200, Roman Beranek wrote:
> On Mon Mar 27, 2023 at 10:20 PM CEST, Maxime Ripard wrote:
> >
> > On Sat, Mar 25, 2023 at 12:40:04PM +0100, Frank Oltmanns wrote:
> > > Claiming to set the divider to a different value (bpp / lanes) than what
> > > we’re actually
Hi,
On Tue, Mar 28, 2023 at 09:28:19PM +0200, Frank Oltmanns wrote:
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> @@ -819,6 +819,34 @@ static void sun6i_dsi_encoder_disable(struct drm_encoder
> *encoder)
> regulator_disable(dsi->regulator);
On Tue, Mar 28, 2023 at 5:38 PM Dmitry Baryshkov
wrote:
>
>
> On Mon, 09 Jan 2023 11:15:17 +0100, Neil Armstrong wrote:
> > This adds support for the MDSS/DPU/DSI on the Qualcomm SM8550 platform.
> >
> > This patchset is based on the SM8450 display support serie at [1].
> >
> > In order to work,
Hi Stephen,
On Wed, Mar 22, 2023 at 04:31:04PM -0700, Stephen Boyd wrote:
> > It's also replacing one implicit behavior by another. The point of this
> > series was to raise awareness on that particular point, so I'm not sure
> > it actually fixes things. We'll see what Stephen thinks about it.
>
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
> DSC hw catalog data is not supposed to be changed, so mark it as const
> data.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
>
On Wed, 29 Mar 2023 at 18:48, Konrad Dybcio wrote:
>
>
>
> On 29.03.2023 16:37, Johan Hovold wrote:
> > On Wed, Mar 29, 2023 at 04:04:44PM +0200, Konrad Dybcio wrote:
> >> If we fail to initialize the GPU for whatever reason (say we don't
> >> embed the GPU firmware files in the initrd), the
On Sun, Mar 26, 2023 at 05:54:20PM +0200, Krzysztof Kozlowski wrote:
> There is nothing special in Innolux p120zdg-bf1 panel, so just like
> other Innolux panels it can be made part of panel-simple.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../display/panel/innolux,p120zdg-bf1.yaml|
On 3/29/23 14:05, Caio Novais wrote:
Compiling AMD GPU drivers displays a warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:294:6: warning: no
previous prototype for ‘optc3_wait_drr_doublebuffer_pending_clear’
[-Wmissing-prototypes]
Get rid of it by marking the function as
On Wed, Mar 29, 2023, Christian K�nig wrote:
> Am 29.03.23 um 19:39 schrieb Sean Christopherson:
> > On Wed, Mar 29, 2023, Christian K�nig wrote:
> > > Am 29.03.23 um 19:22 schrieb Sean Christopherson:
> > > > +David
> > > >
> > > > On Wed, Mar 29, 2023, Paolo Bonzini wrote:
> > > > > On
On Sat, Feb 18, 2023 at 4:47 PM Pin-yen Lin wrote:
>
> This series is developed for and tested on MT8173 board, and the layout is:
>
> /-- anx7688
> -- MT8173 HDMI bridge -- GPIO mux
> \-- native HDMI
What is the part number of
Compiling AMD GPU drivers displays a warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:294:6: warning: no
previous prototype for ‘optc3_wait_drr_doublebuffer_pending_clear’
[-Wmissing-prototypes]
Get rid of it by marking the function as static
Signed-off-by: Caio Novais
Compiling AMD GPU drivers displays a warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.c:
In function ‘dml_rq_dlg_get_dlg_params’:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.c:991:14:
warning: variable ‘scl_enable’ set but not
This patchset removes one unused variable and mark a function as static.
Caio Novais (2):
drm/amd/display: Remove unused variable 'scl_enable'
drm/amd/display: Mark function
'optc3_wait_drr_doublebuffer_pending_clear' as static
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
Am 29.03.23 um 19:39 schrieb Sean Christopherson:
On Wed, Mar 29, 2023, Christian K�nig wrote:
Am 29.03.23 um 19:22 schrieb Sean Christopherson:
+David
On Wed, Mar 29, 2023, Paolo Bonzini wrote:
On 3/29/23 18:43, Christian K�nig wrote:
3) other uses of kmap() must switch to MMU-notifier
On Wed, Mar 29, 2023, Christian K�nig wrote:
> Am 29.03.23 um 19:22 schrieb Sean Christopherson:
> > +David
> >
> > On Wed, Mar 29, 2023, Paolo Bonzini wrote:
> > > On 3/29/23 18:43, Christian K�nig wrote:
> > > > >
> > > > > 3) other uses of kmap() must switch to MMU-notifier protection.
>
Am 29.03.23 um 19:22 schrieb Sean Christopherson:
+David
On Wed, Mar 29, 2023, Paolo Bonzini wrote:
On 3/29/23 18:43, Christian K�nig wrote:
3) other uses of kmap() must switch to MMU-notifier protection.
I would rather suggest to return the page additionally to the pfn from
hva_to_pfn()
On 29.03.2023 19:30, Rob Clark wrote:
> On Wed, Mar 29, 2023 at 8:48 AM Konrad Dybcio
> wrote:
>>
>>
>>
>> On 29.03.2023 16:37, Johan Hovold wrote:
>>> On Wed, Mar 29, 2023 at 04:04:44PM +0200, Konrad Dybcio wrote:
If we fail to initialize the GPU for whatever reason (say we don't
On Wed, Mar 29, 2023 at 8:48 AM Konrad Dybcio wrote:
>
>
>
> On 29.03.2023 16:37, Johan Hovold wrote:
> > On Wed, Mar 29, 2023 at 04:04:44PM +0200, Konrad Dybcio wrote:
> >> If we fail to initialize the GPU for whatever reason (say we don't
> >> embed the GPU firmware files in the initrd), the
+David
On Wed, Mar 29, 2023, Paolo Bonzini wrote:
> On 3/29/23 18:43, Christian K�nig wrote:
> > >
> > >
> > > 3) other uses of kmap() must switch to MMU-notifier protection.
> >
> > I would rather suggest to return the page additionally to the pfn from
> > hva_to_pfn() when the function was
Hi Maxime
On Wed, 29 Mar 2023 at 17:46, Maxime Ripard wrote:
>
> On Wed, Mar 29, 2023 at 05:28:28PM +0100, Dave Stevenson wrote:
> > On Wed, 29 Mar 2023 at 14:19, Jagan Teki wrote:
> > >
> > > DSI sink devices typically send the MIPI-DCS commands to the DSI host
> > > via general MIPI_DSI_DCS
Smatch reports:
drivers/gpu/drm/pl111/pl111_drv.c:300
pl111_amba_probe() warn: missing unwind goto?
When devm_request_irq() returns non-zero value, we need to drop the
reference for drm device and also release reserved memory which is
done in "dev_put" label. So instead of
From: Ville Syrjälä
Include the device and connector information in the SCDC
debugs. Makes it easier to figure out who did what.
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Robert Foss
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: Thierry Reding
Cc: Emma Anholt
Cc: Maxime
The GSC notifies us of a proxy request via the HECI2 interrupt. The
interrupt must be enabled both in the HECI layer and in our usual gt irq
programming; for the latter, the interrupt is enabled via the same enable
register as the GSC CS, but it does have its own mask register. When the
interrupt
From: Alexander Usyskin
Add GSC proxy driver. It to allows messaging between GSC component
on Intel on board graphics card and CSE device.
Cc: Daniele Ceraolo Spurio
Cc: Alan Previn
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Acked-by: Greg Kroah-Hartman
---
The GSC uC needs to communicate with the CSME to perform certain
operations. Since the GSC can't perform this communication directly
on platforms where it is integrated in GT, i915 needs to transfer the
messages from GSC to CSME and back.
The proxy flow is as follow:
1 - i915 submits a request to
On platforms where the GSC is part of GT, it needs to communicate with
CSME for some of its operations. However, there is no direct HW
communication channel, so the i915 and mei drivers must carry the
messages back and forth between the 2 units. The protocol is fully
described in the i915 patch
From: Alexander Usyskin
GSC Proxy component is used for communication between the
Intel graphics driver and MEI driver.
Cc: Daniele Ceraolo Spurio
Cc: Alan Previn
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Acked-by: Greg Kroah-Hartman
---
include/drm/i915_component.h
On 3/29/23 18:43, Christian König wrote:
3) other uses of kmap() must switch to MMU-notifier protection.
I would rather suggest to return the page additionally to the pfn from
hva_to_pfn() when the function was able to grab a reference to it.
When the page is then not available you can't
On Wed, Mar 29, 2023 at 05:28:28PM +0100, Dave Stevenson wrote:
> On Wed, 29 Mar 2023 at 14:19, Jagan Teki wrote:
> >
> > DSI sink devices typically send the MIPI-DCS commands to the DSI host
> > via general MIPI_DSI_DCS read and write API.
> >
> > The classical DSI sequence mentioned that the
Am 29.03.23 um 17:51 schrieb Paolo Bonzini:
On 3/29/23 17:29, Christian König wrote:
First, is it a _host_ corruption or a guest corruption/crash? A
guest crash would be KVM doing exactly what it's meant to do: it
detects the non-reserved, non-refcounted page and refuses to map it
into
Hi Jagan
On Wed, 29 Mar 2023 at 14:19, Jagan Teki wrote:
>
> DSI sink devices typically send the MIPI-DCS commands to the DSI host
> via general MIPI_DSI_DCS read and write API.
>
> The classical DSI sequence mentioned that the DSI host receives MIPI-DCS
> commands from the DSI sink first in
On Wed, Mar 29, 2023 at 08:56:29PM +0530, Jagan Teki wrote:
> On Wed, Mar 29, 2023 at 8:33 PM Maxime Ripard wrote:
> >
> > On Wed, Mar 29, 2023 at 06:46:08PM +0530, Jagan Teki wrote:
> > > Implement a DRM-managed action helper that returns the next DSI bridge
> > > in the chain.
> > >
> > >
On Wed, Mar 29, 2023 at 09:08:17PM +0530, Jagan Teki wrote:
> On Wed, Mar 29, 2023 at 8:29 PM Maxime Ripard wrote:
> >
> > Hi,
> >
> > The patch prefix should be drm/sun4i:
>
> I did follow my previous prefix, I will update this.
>
> >
> > On Wed, Mar 29, 2023 at 06:49:29PM +0530, Jagan Teki
On 3/28/23 18:09, Caio Novais wrote:
Compiling AMD GPU drivers displays a warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:294:6: warning: no
previous prototype for ‘optc3_wait_drr_doublebuffer_pending_clear’
[-Wmissing-prototypes]
Get rid of it by adding a function
On 3/28/23 18:09, Caio Novais wrote:
Compiling AMD GPU drivers displays a warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.c:
In function ‘dml_rq_dlg_get_dlg_params’:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.c:991:14:
On mercoledì 29 marzo 2023 09:32:11 CEST Zhao Liu wrote:
> From: Zhao Liu
>
> Hi list,
>
> Sorry for a long delay since v1 [1]. This patchset is based on 197b6b6
> (Linux 6.3-rc4).
>
> Welcome and thanks for your review and comments!
>
>
> # Purpose of this patchset
>
> The purpose of this
On 3/29/23 17:29, Christian König wrote:
First, is it a _host_ corruption or a guest corruption/crash? A guest
crash would be KVM doing exactly what it's meant to do: it detects the
non-reserved, non-refcounted page and refuses to map it into the guest.
Yes I think that this is what happens.
From: Sui Jingfeng
Loongson display controller IP has been integrated in both Loongson
North Bridge chipset(ls7a1000 and ls7a2000) and Loongson SoCs(ls2k1000
and ls2k2000 etc), it even has been included in Loongson BMC products.
This display controller is a PCI device, it has two display pipe.
From: Sui Jingfeng
Loongson display controller IP has been integrated in both Loongson
North Bridge chipset(ls7a1000 and ls7a2000) and Loongson SoCs(ls2k1000
and ls2k2000 etc), it even has been included in Loongson BMC products.
This display controller is a PCI device, it has two display pipe.
From: Sui Jingfeng
This patch add myself as maintainer to drm loongson driver
Signed-off-by: Sui Jingfeng
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9736e04d3bd3..d258c5b54407 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@
On 29.03.2023 16:37, Johan Hovold wrote:
> On Wed, Mar 29, 2023 at 04:04:44PM +0200, Konrad Dybcio wrote:
>> If we fail to initialize the GPU for whatever reason (say we don't
>> embed the GPU firmware files in the initrd), the error path involves
>> pm_runtime_put_sync() which then calls
Hi,
On Wed, Mar 29, 2023 at 8:16 AM Vinod Polimera
wrote:
>
>
>
> > -Original Message-
> > From: Stephen Boyd
> > Sent: Monday, March 27, 2023 9:58 PM
> > To: Bjorn Andersson ; Vinod Polimera (QUIC)
> >
> > Cc: dri-devel@lists.freedesktop.org; linux-arm-...@vger.kernel.org;
> >
On Wed, Mar 29, 2023 at 8:12 PM Fabio Estevam wrote:
>
> From: Fabio Estevam
>
> The Samsung DSIM IP block allows the inversion of the clock and
> data lanes.
>
> Add an optional property called 'lane-polarities' that describes the
> polarities of the MIPI DSI clock and data lanes.
>
> This is
On Wed, Mar 29, 2023 at 8:12 PM Fabio Estevam wrote:
>
> From: Marek Vasut
>
> Implement support for DSI clock and data lane DN/DP polarity swap by
> means of decoding 'lane-polarities' DT property. The controller does
> support DN/DP swap of clock lane and all data lanes, the controller
> does
1 - 100 of 187 matches
Mail list logo
