Add a switcheroo variant to the struct drm_edid based EDID read
functions.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 29 +
include/drm/drm_edid.h | 2 ++
2 files changed, 31 insertions(+)
diff --git
Use the information stored in display info.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_sdvo.c | 20 +++-
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
Use the information stored in display info.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_sdvo.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
Use the information stored in display info.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 -
drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +++-
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git
Use the information stored in display info.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 8 +++-
drivers/gpu/drm/i915/display/intel_display_types.h | 1 -
drivers/gpu/drm/i915/display/intel_hdmi.c| 6 ++
Use the information stored in display info. Add intel_dp_has_hdmi_sink()
helper to access it.
v2: Rebased
Reviewed-by: Ankit Nautiyal
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi.c | 6 +++---
.../drm/i915/display/intel_display_types.h| 1 -
Use the information stored in display info.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_types.h | 1 -
drivers/gpu/drm/i915/display/intel_dp.c | 5 ++---
3
Caching the has_audio in struct drm_dp_mst_port seems odd, and oddly
placed. Defer audio handling to drivers, and use the info from the
connector display info. i915 was the only one using it anyway.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Jani Nikula
---
Since we already iterate everything that's needed for determining audio,
reduce the need to call drm_detect_monitor_audio() by storing has_audio
to connector info.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 6 ++
include/drm/drm_connector.h | 8
Rebase of https://patchwork.freedesktop.org/series/116813/
Move struct drm_edid conversions forward.
There are still some drm_edid_raw() stragglers, but this nudges things
forward nicely.
Jani Nikula (13):
drm/edid: parse display info has_audio similar to is_hdmi
drm/display/dp_mst: drop
Hi Sui,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm/drm-next drm-intel/for-linux-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.4-rc4
next-20230530]
[If your patch is applied
Am 29.05.23 um 11:28 schrieb Ma Jun:
Remove redundant assignment code for ttm->caching
The explanation is missing why this is redundant, e.g. something like
"this is overwritten just a few lines later"..
Apart from that looks good to me,
Christian.,
Signed-off-by: Ma Jun
---
On 2023-05-30 01:13:12, Dmitry Baryshkov wrote:
> On Tue, 30 May 2023 at 00:46, Marijn Suijten
> wrote:
> >
> > On 2023-05-26 12:09:45, Dmitry Baryshkov wrote:
> > > Currently the driver passes the PINGPONG index to
> > > dpu_hw_intf_ops::bind_pingpong_blk() callback and uses separate boolean
> >
The pll prediv calculus searchs for the smallest prediv that gets
the ns_hdmipll_ck in the range of 5 GHz to 12 GHz.
A typo in the upper bound test was testing for 5Ghz to 1Ghz
Fixes: 45810d486bb44 ("phy: mediatek: add support for phy-mtk-hdmi-mt8195")
Signed-off-by: Guillaume Ranquet
---
Hi Raphael
On 5/29/23 11:13, Raphael Gallais-Pou wrote:
This serie aims to reduce the number of device-tree warnings of
following boards :
- STM32F469-DISCO
- STM32MP15*
Those warnings were appearing either during build or when checking
dt-bindings and concern mostly LTDC and DSI IPs.
Add a motivation for and description of asynchronous VM_BIND operation
Signed-off-by: Thomas Hellström
---
Documentation/gpu/drm-vm-bind-async.rst | 138
1 file changed, 138 insertions(+)
create mode 100644 Documentation/gpu/drm-vm-bind-async.rst
diff --git
On 2023-05-30 09:24:24, Neil Armstrong wrote:
> Hi Marijn, Dmitry, Caleb, Jessica,
>
> On 29/05/2023 23:11, Marijn Suijten wrote:
> > On 2023-05-22 04:16:20, Dmitry Baryshkov wrote:
> >
> >>> + if (ctx->dsi->dsc) {
> >>
> >> dsi->dsc is always set, thus this condition can be dropped.
> >
> > I
On 30.05.23 04:42, Evan Quan wrote:
Due to electrical and mechanical constraints in certain platform designs there
may
be likely interference of relatively high-powered harmonics of the (G-)DDR
memory
clocks with local radio module frequency bands used by Wifi 6/6e/7. To mitigate
possible RFI
It would be better to replace the traditional ternary conditional
operator with max()
Signed-off-by: Lu Hongfei
---
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
mode change 100644 => 100755
On 2023-05-30 01:39:10, Dmitry Baryshkov wrote:
> On 30/05/2023 01:37, Marijn Suijten wrote:
> > On 2023-05-30 01:18:40, Dmitry Baryshkov wrote:
> >
> >>> +ret = mipi_dsi_dcs_set_display_on(dsi);
> >>> +if (ret < 0) {
> >>> +dev_err(dev, "Failed to turn display on:
On Tue 30 May 2023 at 09:38, Neil Armstrong wrote:
> In order to setup the DSI clock, let's make the unused VCLK2 clock path
> configuration via CCF.
>
> The nocache option is removed from following clocks:
> - vclk2_sel
> - vclk2_input
> - vclk2_div
> - vclk2
> - vclk_div1
> - vclk2_div2_en
>
On Tue 30 May 2023 at 09:38, Neil Armstrong wrote:
> Exposing should not be done in a single commit anymore due to
> dt-bindings enforced rules.
>
> Prepend PRIV to the private CLK IDs so we can add new clock to
> the bindings header and in a separate commit remove such private
> define and
On Tue 16 May 2023 at 11:00, Neil Armstrong wrote:
> On 16/05/2023 10:44, Arnd Bergmann wrote:
>> On Mon, May 15, 2023, at 18:22, neil.armstr...@linaro.org wrote:
>>> On 15/05/2023 18:15, Krzysztof Kozlowski wrote:
On 15/05/2023 18:13, Krzysztof Kozlowski wrote:
Also one more
Hi,
On Sun, 28 May 2023 08:27:27 -0500, Adam Ford wrote:
> In the event a device is connected to the samsung-dsim
> controller that doesn't support the burst-clock, the
> driver is able to get the requested pixel clock from the
> attached device or bridge. In these instances, the
>
On 26/05/2023 16:04, Adam Ford wrote:
On Fri, May 26, 2023 at 2:24 AM Neil Armstrong
wrote:
On 26/05/2023 09:22, Neil Armstrong wrote:
Hi,
On Thu, 25 May 2023 22:05:52 -0500, Adam Ford wrote:
This series fixes the blanking pack size and the PMS calculation. It then
adds support to allows
Add mediatek av1 decoder linux driver which use the stateless API in
MT8195.
Signed-off-by: Xiaoyong Lu
Tested-by: Nicolas Dufresne
Reviewed-by: Nicolas Dufresne
Tested-by: AngeloGioacchino Del Regno
Reviewed-by: AngeloGioacchino Del Regno
---
Changes from v10:
- fix conflict with new patch
On 28/05/2023 16:00, Adrián Larumbe wrote:
Signed-off-by: Adrián Larumbe
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 22 --
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
On 26/05/2023 21:30, Conor Dooley wrote:
> On Fri, May 26, 2023 at 02:24:21PM -0500, Adam Ford wrote:
>> On Fri, May 26, 2023 at 1:19 PM Conor Dooley wrote:
>>> On Thu, May 25, 2023 at 10:05:59PM -0500, Adam Ford wrote:
>
description:
- DSIM high speed burst mode frequency.
On 28/05/2023 15:59, Adrián Larumbe wrote:
Right now clocking value selection code is prioritising RGB, YUV444 modes
over YUV420 for HDMI2 sinks. However, because of the bus format selection
procedure in dw-hdmi, for HDMI2 sinks YUV420 is the format that will always
be picked during the drm
On 28/05/2023 16:00, Adrián Larumbe wrote:
The current output bus format selection logic is enforcing YUV420 even
when the drm mode allows for other bus formats as well.
Fix it by adding check for 420-only drm modes.
Signed-off-by: Adrián Larumbe
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is (mostly) ignored
and this typically results in resource leaks. To improve here there is a
quest
Add the MIPI DSI Analog & Digital PHY nodes and the DSI control
nodes with proper port endpoint to the VPU.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 70 +++
1 file changed, 70 insertions(+)
diff --git
Only DW-HDMI currently needs components since it reuses
the drm-meson driver context to access HHI registers (sic).
Once this is solved, we can get rid on components.
Until now, limit the components matching to the dw-hdmi compatibles
we know to require this hack, for other bridges simply use
This updates the panel timings to achieve a clean 60Hz refresh rate.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/panel-khadas-ts050.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-khadas-ts050.c
The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI
transceiver (ver 1.21a) with a custom glue managing the IP resets,
clock and data inputs similar to the DW-HDMI Glue on the same
Amlogic SoC families.
Signed-off-by: Neil Armstrong
Signed-off-by: Neil Armstrong
---
This adds an encoder bridge designed to drive a MIPI-DSI display
by using the ENCL encoder through the internal MIPI DSI transceiver
connected to the output of the ENCL pixel encoder.
Signed-off-by: Neil Armstrong
Reviewed-by: Jagan Teki
Signed-off-by: Neil Armstrong
---
This adds supports for the ENCL encoder connected to a MIPI-DSI transceiver on
the
Amlogic AXG, G12A, G12B & SM1 SoCs.
Signed-off-by: Neil Armstrong
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_registers.h | 25
drivers/gpu/drm/meson/meson_venc.c | 211
Exposing should not be done in a single commit anymore due to
dt-bindings enforced rules.
Prepend PRIV to the private CLK IDs so we can add new clock to
the bindings header and in a separate commit remove such private
define and switch to the public CLK IDs identifier.
This refers to a
This adds a basic devicetree for the MNT Reform2 DIY laptop when using a
CM4 adapter and a BPI-CM4 module.
Co-developed-by: Lukas F. Hartmann
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../meson-g12b-bananapi-cm4-mnt-reform2.dts| 388
If the case the HDMI controller fails to bind, we try to unbind
all components before calling drm_dev_put() which makes drm_bridge_detach()
crash because unbinding the HDMI controller frees the bridge memory.
The solution is the unbind all components at the end like in the remove
path.
The MNT Reform 2 CM4 adapter can be populated with any Raspberry Pi CM4
compatible module such as a BPI-CM4 Module, document that.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
The Amlogic G12A/G12B/SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver
(ver 1.21a), with a custom glue managing the IP resets, clock and data
inputs similar to the DW-HDMI Glue on other Amlogic SoCs.
This adds support for the Glue managing the transceiver, mimicing the init
flow provided by
This add nodes to support the Khadas TS050 panel on the
Khadas VIM3 & VIM3L boards.
Signed-off-by: Neil Armstrong
---
.../boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi | 2 +-
arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi | 76 ++
Now those CLK IDs were added to the public bindings header, switch
to use those defines and drop the PRIV defines.
Signed-off-by: Neil Armstrong
---
drivers/clk/meson/g12a.c | 18 +-
drivers/clk/meson/g12a.h | 3 ---
2 files changed, 9 insertions(+), 12 deletions(-)
diff --git
Add third port corresponding to the ENCL DPI encoder used to connect
to DSI or LVDS transceivers.
Signed-off-by: Neil Armstrong
Reviewed-by: Martin Blumenstingl
Reviewed-by: Rob Herring
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml | 5
Add new CLK ids for the VCLK2_SEL, CTS_ENCL and CTS_ENCL_SEL clocks
on G12A compatible SoCs.
Signed-off-by: Neil Armstrong
---
include/dt-bindings/clock/g12a-clkc.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/dt-bindings/clock/g12a-clkc.h
In order to setup the DSI clock, let's make the unused VCLK2 clock path
configuration via CCF.
The nocache option is removed from following clocks:
- vclk2_sel
- vclk2_input
- vclk2_div
- vclk2
- vclk_div1
- vclk2_div2_en
- vclk2_div4_en
- vclk2_div6_en
- vclk2_div12_en
- vclk2_div2
- vclk2_div4
Add new CTS_ENCL & CTS_ENCL_SEL clocks for the G12A compatible
SoCs, they are used to feed the VPU LCD Pixel encoder used for
DSI display purposes.
Signed-off-by: Neil Armstrong
---
drivers/clk/meson/g12a.c | 40
drivers/clk/meson/g12a.h | 4 +++-
2
The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver
(ver 1.21a),
with a custom glue managing the IP resets, clock and data input similar to the
DW-HDMI
glue on the same Amlogic SoCs.
This adds support for the glue managing the transceiver, mimicing the init flow
Hi Marijn, Dmitry, Caleb, Jessica,
On 29/05/2023 23:11, Marijn Suijten wrote:
On 2023-05-22 04:16:20, Dmitry Baryshkov wrote:
+ if (ctx->dsi->dsc) {
dsi->dsc is always set, thus this condition can be dropped.
I want to leave room for possibly running the panel without DSC (at a
On Tue, 30 May 2023 01:55:21 +0300
Dmitry Baryshkov wrote:
> On 24/05/2023 01:14, Melissa Wen wrote:
> > This series is a refined version of our RFC [1] for AMD driver-specific
> > color management properties. It is a collection of contributions from
> > Joshua, Harry and I to enhance AMD KMS
Hi
Am 29.05.23 um 21:36 schrieb Sam Ravnborg:
Hi Thomas,
On Wed, May 24, 2023 at 11:21:50AM +0200, Thomas Zimmermann wrote:
Implement dedicated fbdev helpers for framebuffer I/O instead
of using DRM's helpers. Use an fbdev generator macro for
deferred I/O to create the fbdev callbacks. i915
Il 04/04/23 12:47, AngeloGioacchino Del Regno ha scritto:
Hello CK,
Gentle ping for this series.
Thanks,
Angelo
Changes in v3:
- Added DPTX AUX block initialization before trying to communicate
to stop relying on the bootloader keeping it initialized before
booting Linux.
- Fixed
On Wed, May 10, 2023 at 9:12 AM Pin-yen Lin wrote:
>
> +Jagan who worked on a similar design and initiated the thread.
>
> Hi Stephen,
>
> On Sat, Apr 29, 2023 at 12:47 PM Stephen Boyd wrote:
> >
> > Quoting Pin-yen Lin (2023-04-20 02:10:46)
> > > On Thu, Apr 20, 2023 at 2:10 PM Stephen Boyd
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