On 2023-06-06 11:31:39, Kuogee Hsieh wrote:
> From: Abhinav Kumar
>
> Some platforms have DSC blocks which have not been declared in the catalog.
> Complete DSC 1.1 support for all platforms by adding the missing blocks to
> MSM8998 and SC8180X.
Still a NACK, as pointed out in v15 both the
Hi, I love your reviews
On 2023/6/7 00:56, Bjorn Helgaas wrote:
On Sat, Jun 03, 2023 at 06:59:43PM +0800, Sui Jingfeng wrote:
From: Sui Jingfeng
Loongson CPUs maintain cache coherency by hardware, which means that the
data in the CPU cache is identical to the data in main system memory. As
From: Abhinav Kumar
Some platforms have DSC blocks which have not been declared in the catalog.
Complete DSC 1.1 support for all platforms by adding the missing blocks to
MSM8998 and SC8180X.
Changes in v9:
-- add MSM8998 and SC8180x to commit title
Changes in v10:
-- fix grammar at commit
On 6/5/2023 20:00, Zhanjun Dong wrote:
This attemps to avoid circular locing dependency between flush delayed work and
intel_gt_reset.
locing -> locking
WARNING: possible circular locking dependency detected
6.4.0-rc1-drmtip_1340-g31e3463b0edb+ #1 Not tainted
On 6/6/2023 4:14 AM, Dmitry Baryshkov wrote:
On Tue, 6 Jun 2023 at 05:35, Abhinav Kumar wrote:
On 6/5/2023 6:03 PM, Dmitry Baryshkov wrote:
On 06/06/2023 03:55, Abhinav Kumar wrote:
On 6/3/2023 7:21 PM, Dmitry Baryshkov wrote:
On 31/05/2023 21:25, Abhinav Kumar wrote:
On
On Tue, Jun 06, 2023 at 10:59:14PM +0530, Siddh Raman Pant wrote:
> On Tue, 06 Jun 2023 20:35:45 +0530, Laurent Pinchart wrote:
> > This is a nice series, thank you for working on that.
> >
> > Now that the deprecated macros are used in drivers only, would it make
> > sense to move them to a
Maíra Canal writes:
Hello Maíra,
> Fix the following warnings:
>
> drivers/gpu/drm/vkms/vkms_composer.c:42: warning: Function parameter or
> member 'frame_info' not described in 'pre_mul_alpha_blend'
> drivers/gpu/drm/vkms/vkms_composer.c:42: warning: Excess function parameter
>
Maíra Canal writes:
Hello Maíra,
> The function vkms_compose_row() was introduced in the code without any
> documentation. In order to make the function more clear, add a
> kernel-doc to it.
>
> Suggested-by: Melissa Wen
> Signed-off-by: Maíra Canal
> ---
Reviewed-by: Javier Martinez
On 06/06, Melissa Wen wrote:
> On 06/02, Harry Wentland wrote:
> >
> >
> > On 5/23/23 18:14, Melissa Wen wrote:
> > > This series is a refined version of our RFC [1] for AMD driver-specific
> > > color management properties. It is a collection of contributions from
> > > Joshua, Harry and I to
On 06/02, Harry Wentland wrote:
>
>
> On 5/23/23 18:14, Melissa Wen wrote:
> > This series is a refined version of our RFC [1] for AMD driver-specific
> > color management properties. It is a collection of contributions from
> > Joshua, Harry and I to enhance AMD KMS color pipeline for Steam
> >
On Mon, May 29, 2023 at 03:52:26PM +0200, Konrad Dybcio wrote:
>
> Introduce a6xx_gpu_sw_reset() in preparation for adding GMU wrapper
> GPUs and reuse it in a6xx_gmu_force_off().
>
> This helper, contrary to the original usage in GMU code paths, adds
> a write memory barrier which together with
On 06/01, Harry Wentland wrote:
>
>
> On 5/23/23 18:14, Melissa Wen wrote:
> > Create and attach driver-private properties for plane color management.
> > First add plane degamma LUT properties that means user-blob and its
> > size. We will add more plane color properties in the next commits. In
On 06/01, Harry Wentland wrote:
>
>
> On 5/23/23 18:14, Melissa Wen wrote:
> > Hook up driver-specific atomic operations for managing AMD color
> > properties and create AMD driver-specific color management properties
> > and attach them according to HW capabilities defined by `struct
> >
On Tue, Jun 06, 2023 at 10:36:25PM +0530, Siddh Raman Pant wrote:
> On Tue, 06 Jun 2023 20:14:52 +0530, Laurent Pinchart wrote:
> > Hi Siddh,
> >
> > Thank you for the patch.
>
> Anytime :)
>
> > > if (!crtcs || !modes || !enabled || !offsets) {
> > > - DRM_ERROR("Memory
On Mon, May 29, 2023 at 03:52:25PM +0200, Konrad Dybcio wrote:
>
> Unify the indentation and explain the cryptic 0xF value.
>
> Signed-off-by: Konrad Dybcio
Reviewed-by: Akhil P Oommen
-Akhil
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 +
> 1 file changed, 5 insertions(+), 4
O 06/01, Harry Wentland wrote:
>
>
> On 5/23/23 18:15, Melissa Wen wrote:
> > Wire up DC 3D LUT to DM CRTC color management (post-blending). On AMD
> > display HW, we have to set a shaper LUT to delinearize or normalize the
> > color space before applying a 3D LUT (since we have a reduced number
On 06/06, Sebastian Wick wrote:
> On Tue, Jun 6, 2023 at 6:19 PM Joshua Ashton wrote:
> >
> >
> >
> > On 6/1/23 20:17, Harry Wentland wrote:
> > >
> > >
> > > On 5/23/23 18:14, Melissa Wen wrote:
> > >> Hook up driver-specific atomic operations for managing AMD color
> > >> properties and create
On Sat, Jun 03, 2023 at 06:59:43PM +0800, Sui Jingfeng wrote:
> From: Sui Jingfeng
>
> Loongson CPUs maintain cache coherency by hardware, which means that the
> data in the CPU cache is identical to the data in main system memory. As
> for the peripheral device, most of Loongson chips chose to
drm/logicvc driver is depend on REGMAP and REGMAP_MMIO, should select this
two kconfig option, otherwise the driver failed to compile on platform
without REGMAP_MMIO selected:
ERROR: modpost: "__devm_regmap_init_mmio_clk"
[drivers/gpu/drm/logicvc/logicvc-drm.ko] undefined!
make[1]: ***
On Tue, Jun 6, 2023 at 6:19 PM Joshua Ashton wrote:
>
>
>
> On 6/1/23 20:17, Harry Wentland wrote:
> >
> >
> > On 5/23/23 18:14, Melissa Wen wrote:
> >> Hook up driver-specific atomic operations for managing AMD color
> >> properties and create AMD driver-specific color management properties
> >>
On 6/1/23 20:17, Harry Wentland wrote:
On 5/23/23 18:14, Melissa Wen wrote:
Hook up driver-specific atomic operations for managing AMD color
properties and create AMD driver-specific color management properties
and attach them according to HW capabilities defined by `struct
dc_color_caps`.
On Mon, May 29, 2023 at 03:52:30PM +0200, Konrad Dybcio wrote:
>
> A610 and A619_holi don't support the feature. Disable it to make the GPU stop
> crashing after almost each and every submission - the received data on
> the GPU end was simply incomplete in garbled, resulting in almost nothing
>
On Mon, May 29, 2023 at 03:52:24PM +0200, Konrad Dybcio wrote:
>
> This function is responsible for telling the GPU to halt transactions
> on all of its relevant buses, drain them and leave them in a predictable
> state, so that the GPU can be e.g. reset cleanly.
>
> Move the function to
On Mon, May 29, 2023 at 03:52:23PM +0200, Konrad Dybcio wrote:
>
> As pointed out by Akhil during the review process of GMU wrapper
> introduction [1], it makes sense to move this write into the function
> that's responsible for forcibly shutting the GMU off.
>
> It is also very convenient to
Hi,
On Tue, Jun 6, 2023 at 12:56 AM Su Hui wrote:
>
> Smatch error:buffer overflow 'ti_sn_bridge_refclk_lut' 5 <= 5.
>
> Fixes: cea86c5bb442 ("drm/bridge: ti-sn65dsi86: Implement the pwm_chip")
> Signed-off-by: Su Hui
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 3 ++-
> 1 file changed, 2
Hi Alexander,
Thank you for the patch.
On Tue, Jun 06, 2023 at 04:48:33PM +0200, Alexander Stein wrote:
> When -EPROBE_DEFER is returned do not raise an error, but silently return
> this error instead. Fixes error like this:
> [drm:drm_bridge_attach] *ERROR* failed to attach bridge
>
Hi Siddh,
On Tue, Jun 06, 2023 at 04:15:14PM +0530, Siddh Raman Pant wrote:
> This patchset aims to remove usages of deprecated DRM_* macros from the
> files residing in drivers/gpu/drm root.
>
> In process, I found out that NULL as first argument of drm_dbg_* wasn't
> working, but it was listed
Hi Siddh,
Thank you for the patch.
On Tue, Jun 06, 2023 at 04:15:22PM +0530, Siddh Raman Pant wrote:
> drm_print.h says DRM_DEBUG_KMS is deprecated in favor of
> drm_dbg_kms().
> ---
> drivers/gpu/drm/drm_client_modeset.c | 112 +++
> drivers/gpu/drm/drm_color_mgmt.c
Hi Siddh,
Thank you for the patch.
On Tue, Jun 06, 2023 at 04:15:20PM +0530, Siddh Raman Pant wrote:
> drm_print.h says DRM_DEBUG is deprecated in favor of drm_dbg_core().
>
> Signed-off-by: Siddh Raman Pant
> ---
> drivers/gpu/drm/drm_agpsupport.c | 4 +-
> drivers/gpu/drm/drm_bufs.c
On 06/06/2023 09:36, Paulo Pavacic wrote:
>>> +
>>> + if (IS_ERR(panel_data->reset)) {
>>> + ret = PTR_ERR(panel_data->reset);
>>> + dev_err(dev,
>>> + "error: probe: get reset GPIO: (%d) Check the fdt\n",
>>> + ret);
>>
>> return
On 06/06/2023 11:53, Paulo Pavacic wrote:
>>> +#include
>>> +dsi {
>>> +#address-cells = <1>;
>>> +#size-cells = <0>;
>>> +panel@0 {
>>> +compatible = "fannal,c3004";
>>> +reg = <0>;
>>> +pinctrl-0 = <_mipi_dsi_rst>;
>>> +
On 6/6/2023 7:44 AM, Stanislaw Gruszka wrote:
Hi
On Fri, Jun 02, 2023 at 11:30:31AM -0600, Jeffrey Hugo wrote:
On 5/25/2023 4:38 AM, Stanislaw Gruszka wrote:
If we get signal when waiting for the mmu->lock we do not invalidate
current MMU configuration what might result on undefined behavior.
When -EPROBE_DEFER is returned do not raise an error, but silently return
this error instead. Fixes error like this:
[drm:drm_bridge_attach] *ERROR* failed to attach bridge
/soc@0/bus@3080/mipi-dsi@30a0 to encoder None-34: -517
[drm:drm_bridge_attach] *ERROR* failed to attach bridge
On Tue, Jun 06, 2023 at 08:04:39PM +0530, Siddh Raman Pant wrote:
> On Tue, 06 Jun 2023 19:35:12 +0530, Laurent Pinchart wrote:
> > Hi Siddh,
> >
> > Thank you for the patch.
>
> Anytime :)
>
> > On Tue, Jun 06, 2023 at 04:15:16PM +0530, Siddh Raman Pant wrote:
> > > Comments say macros
On Tue, Jun 06, 2023 at 08:08:27PM +0530, Siddh Raman Pant wrote:
> On Tue, 06 Jun 2023 19:53:22 +0530, Laurent Pinchart wrote:
> > Hi Siddh,
> >
> > Thank you for the patch.
>
> Anytime :)
>
> > Any plan to remove it from drivers as well ? If not you should mention
> > in the commit message
On 06/06/2023 16:07, Paulo Pavacic wrote:
> Fannal C3004 is a 480x800 display made by fannal that requires
> DCS initialization sequences.
>
> Signed-off-by: Paulo Pavacic
> ---
> v4 changelog:
> - formatting and style changes
Are you sure? I see other changes - removal of some code, handling
Hi Siddh,
Thank you for the patch.
On Tue, Jun 06, 2023 at 04:15:19PM +0530, Siddh Raman Pant wrote:
> drm_print.h says DRM_ERROR is deprecated in favor of drm_err().
>
> Signed-off-by: Siddh Raman Pant
> ---
> drivers/gpu/drm/drm_bridge.c | 8
> drivers/gpu/drm/drm_bufs.c
On 06/06/2023 16:07, Paulo Pavacic wrote:
> Added fannal to vendor-prefixes and dt bindings for Fannal C3004.
> Fannal C3004 is a 480x800 MIPI DSI Panel which requires
> DCS initialization sequences with certain delays between certain
> commands.
>
> Signed-off-by: Paulo Pavacic
> ---
> v4
On 06/06/2023 16:07, Paulo Pavacic wrote:
> Fannal is a one-stop-solution provider for touch displays in industrial
> application, committed to delivering a variety of professional high-quality
> products and technical services globally.
>
> Website: www.fannal.com
>
> Signed-off-by: Paulo
Hi Siddh,
Thank you for the patch.
On Tue, Jun 06, 2023 at 04:15:18PM +0530, Siddh Raman Pant wrote:
> drm_print.h says DRM_NOTE is deprecated in favor of drm_notice().
>
> Signed-off-by: Siddh Raman Pant
With the commit message fixed as mentioned in the review of an earlier
patch in this
Hi Siddh,
Thank you for the patch.
On Tue, Jun 06, 2023 at 04:15:21PM +0530, Siddh Raman Pant wrote:
> drm_print.h says DRM_DEBUG_DRIVER is deprecated.
> Thus, use newer drm_dbg_driver().
>
> Also fix the deprecation comment in drm_print.h which
> mentions drm_dbg() instead of drm_dbg_driver().
The drm sched entity must be flushed before finishing, to account for
jobs potentially still in flight at that time.
Lima did not do this flush until now, so switch the destroy call to the
drm_sched_entity_destroy() wrapper which will take care of that.
This fixes a regression on lima which
Hi Siddh,
Thank you for the patch.
On Tue, Jun 06, 2023 at 04:15:17PM +0530, Siddh Raman Pant wrote:
> drm_print.h says DRM_INFO is deprecated in favor of drm_info().
>
> Signed-off-by: Siddh Raman Pant
> ---
> drivers/gpu/drm/drm_client_modeset.c | 2 +-
> drivers/gpu/drm/drm_connector.c
Fannal C3004 is a 480x800 display made by fannal that requires
DCS initialization sequences.
Signed-off-by: Paulo Pavacic
---
v4 changelog:
- formatting and style changes
- change community room
v3 changelog:
- using generic mipi_dsi_dcs_write_seq
- removed success prints
- removed some
Added fannal to vendor-prefixes and dt bindings for Fannal C3004.
Fannal C3004 is a 480x800 MIPI DSI Panel which requires
DCS initialization sequences with certain delays between certain
commands.
Signed-off-by: Paulo Pavacic
---
v4 changelog:
- add spaces between properties
v3 changelog:
-
Fannal is a one-stop-solution provider for touch displays in industrial
application, committed to delivering a variety of professional high-quality
products and technical services globally.
Website: www.fannal.com
Signed-off-by: Paulo Pavacic
---
Fannal C3004 is a 2 lane MIPI DSI 480x800 panel which requires initialization
with DSI DCS
commands. After few initialization commands delay is required.
Paulo Pavacic (3):
dt-bindings: add fannal vendor prefix
dt-bindings: display: panel: add fannal,c3004
drm/panel-fannal-c3004: Add
Hi Siddh,
Thank you for the patch.
On Tue, Jun 06, 2023 at 04:15:16PM +0530, Siddh Raman Pant wrote:
> Comments say macros DRM_DEBUG_* are deprecated in favor of
> drm_dbg_*(NULL, ...), but they have broken support for it,
> as the macro will result in `(NULL) ? (NULL)->dev : NULL`.
What's the
On 05/06/2023 20:18, Iddamsetty, Aravind wrote:
>
> On 04-06-2023 22:37, Tomer Tayar wrote:
>> On 26/05/2023 19:20, Aravind Iddamsetty wrote:
>>> Define the netlink commands and attributes that can be commonly used
>>> across by drm drivers.
>>>
>>> Signed-off-by: Aravind Iddamsetty
>>> ---
>>>
Series is:
Acked-by: Alex Deucher
On Mon, Jun 5, 2023 at 2:30 PM Hamza Mahfooz wrote:
>
> clang reports:
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.c:3892:6:
> error: stack frame size (2632) exceeds limit (2048) in
>
Hi
On Fri, Jun 02, 2023 at 11:30:31AM -0600, Jeffrey Hugo wrote:
> On 5/25/2023 4:38 AM, Stanislaw Gruszka wrote:
> > If we get signal when waiting for the mmu->lock we do not invalidate
> > current MMU configuration what might result on undefined behavior.
>
> "that might result in"
>
> >
This patch replace the leading spaces with tab, make them keep aligned with
the rest of the config options. No functional change.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/amd/display/Kconfig | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git
On Tue, 06 Jun 2023, Laurent Pinchart wrote:
> Hi Siddh,
>
> Thank you for the patch.
>
> On Tue, Jun 06, 2023 at 04:15:15PM +0530, Siddh Raman Pant wrote:
>> This reverts commit 1040e424353f5f4d39f6f3aa8723eb3bd6ea6446.
>>
>> It used an incorrect way to use drm_* functions. Only drm_device ptrs
Hi Siddh,
Thank you for the patch.
On Tue, Jun 06, 2023 at 04:15:15PM +0530, Siddh Raman Pant wrote:
> This reverts commit 1040e424353f5f4d39f6f3aa8723eb3bd6ea6446.
>
> It used an incorrect way to use drm_* functions. Only drm_device ptrs
> should be passed, but the mentioned commit passed
On Thu, Apr 13, 2023 at 08:38:10AM +0200, Stanislaw Gruszka wrote:
> Use DMA_RESV_USAGE_BOOKKEEP reservation for buffer objects, except for
> command buffers for which we use DMA_RESV_USAGE_WRITE (since VPU can
> write to command buffer context save area).
>
> Fixes: 0ec8671837a6 ("accel/ivpu:
Add support for MDSS on SM6375.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Marijn Suijten
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/msm_mdss.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
Add basic SM6375 support to the DPU1 driver to enable display output.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Marijn Suijten
Signed-off-by: Konrad Dybcio
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h | 139 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c |
Add the SM6375 DPU compatible to clients compatible list, as it also
needs the workarounds.
Acked-by: Dmitry Baryshkov
Signed-off-by: Konrad Dybcio
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
From: Konrad Dybcio
Add the SM6350 DPU compatible to clients compatible list, as it also
needs the workarounds.
Signed-off-by: Konrad Dybcio
Acked-by: Dmitry Baryshkov
Signed-off-by: Konrad Dybcio
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff
It got broken at some point, fix it up.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Konrad Dybcio
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
Add SM6350 support to the DPU1 driver to enable display output.
It's worth noting that one entry dpu_qos_lut_entry was trimmed off:
{.fl = 0, .lut = 0x0011223344556677 },
due to the lack of support for selecting between portrait and landscape
LUT settings (for danger and safe LUTs) and no full
Document the SM6350 MDSS.
Signed-off-by: Konrad Dybcio
---
.../bindings/display/msm/qcom,sm6350-mdss.yaml | 213 +
1 file changed, 213 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
Add support for MDSS on SM6350.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Marijn Suijten
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/msm_mdss.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
Document the SM6375 MDSS.
Signed-off-by: Konrad Dybcio
---
.../bindings/display/msm/qcom,sm6375-mdss.yaml | 215 +
1 file changed, 215 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml
SC7180, SM6350 and SM6375 use a rather similar hw setup for DPU, with
the main exception being that the last one requires an additional
throttle clock.
It is not well understood yet, but failing to toggle it on makes the
display hardware stall and not output any frames.
Document SM6350 and
v5 -> v6:
- Drop unnecessary items: level in bindings
- Use INTF_SC7180_MASK for 6375 to avoid enabling DPU_INTF_DATA_COMPRESS on DPU6
- Pick up tags
v5:
https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v5-0-998b4d2f7...@linaro.org
v4 -> v5:
- Rebase on next-20230522 (drop regdma,
Add the DSI host found on SM6375.
Acked-by: Rob Herring
Signed-off-by: Konrad Dybcio
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
Add the DSI host found on SM6350.
Acked-by: Rob Herring
Signed-off-by: Konrad Dybcio
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
On Thu, May 25, 2023 at 09:45:19PM -0700, Randy Dunlap wrote:
> Drivers that use the gen_pool*() family of functions should
> select GENERIC_ALLOCATOR to prevent build errors like these:
>
> ld: drivers/accel/ivpu/ivpu_ipc.o: in function `gen_pool_free':
> include/linux/genalloc.h:172: undefined
>-Original Message-
>From: dri-devel On Behalf Of
>Thomas Zimmermann
>Sent: Tuesday, June 6, 2023 6:41 AM
>To: del...@gmx.de; david.lai...@aculab.com
>Cc: linux-fb...@vger.kernel.org; Thomas Zimmermann
>; dri-devel@lists.freedesktop.org; linux-
>s...@vger.kernel.org
>Subject: [PATCH 0/3]
On 05-06-2023 22:17, Alex Deucher wrote:
> Adding the relevant AMD folks for RAS. We currently expose RAS via
> sysfs, but also have an event interface in KFD which may be somewhat
> similar to this.
>
> If we were to converge on a common RAS interface, would we want to
> look at any
On Tue, 06 Jun 2023, Siddh Raman Pant wrote:
> This patchset aims to remove usages of deprecated DRM_* macros from the
> files residing in drivers/gpu/drm root.
>
> In process, I found out that NULL as first argument of drm_dbg_* wasn't
> working, but it was listed as the alternative in
> > > > To comply with the design that buffer objects shall have immutable
> > > > cache setting through out their life cycle, {set, get}_caching ioctl's
> > > > are no longer supported from MTL onward. With that change caching
> > > > policy can only be set at object creation time. The current
On Tue, 6 Jun 2023 at 05:35, Abhinav Kumar wrote:
>
>
>
> On 6/5/2023 6:03 PM, Dmitry Baryshkov wrote:
> > On 06/06/2023 03:55, Abhinav Kumar wrote:
> >>
> >>
> >> On 6/3/2023 7:21 PM, Dmitry Baryshkov wrote:
> >>> On 31/05/2023 21:25, Abhinav Kumar wrote:
>
>
> On 5/31/2023 3:07
Quoting Andi Shyti (2023-06-06 13:18:06)
> On Tue, Jun 06, 2023 at 11:10:04AM +0100, Tvrtko Ursulin wrote:
> >
> > On 06/06/2023 11:00, Andi Shyti wrote:
> > > From: Fei Yang
> > >
> > > To comply with the design that buffer objects shall have immutable
> > > cache setting through out their
On 06/06/2023 10:47, Tvrtko Ursulin wrote:
On 05/06/2023 23:22, Andi Shyti wrote:
Hi Tvrtko,
On Mon, Jun 05, 2023 at 03:37:20PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver
Hi Sui,
On Tue, Jun 06, 2023 at 06:27:05PM +0800, Sui Jingfeng wrote:
> Hi,
>
> On 2023/6/6 10:06, Sui Jingfeng wrote:
> > Originally, I also want to express the opinion.
>
>
> Originally, I want to express the same opinion as you told me.
>
> Because vga_iostate_to_str() function is taking
Fix the type casting from unsigned long to char __iomem *. Resolves
the following warning:
../drivers/video/fbdev/hitfb.c:411:27: warning: incorrect type in assignment
(different address spaces)
../drivers/video/fbdev/hitfb.c:411:27:expected char [noderef] __iomem
*screen_base
Fixes the following warnings:
../drivers/video/fbdev/hitfb.c:186:5: warning: no previous prototype for
'hitfb_blank' [-Wmissing-prototypes]
186 | int hitfb_blank(int blank_mode, struct fb_info *info)
| ^~~
../drivers/video/fbdev/hitfb.c:186:5: warning: symbol 'hitfb_blank'
Fix a number of minor warnings in the hitfb driver. I discovered
them while working on bb47f218fd01 ("fbdev/hitfb: Cast I/O offset
to address").
Thomas Zimmermann (3):
fbdev/hitfb: Declare hitfb_blank() as static
fbdev/hitfb: Fix integer-to-pointer cast
fbdev/hitfb: Use NULL for pointers
Replace integer constants with NULL. Resolves the following
warnings:
../drivers/video/fbdev/hitfb.c:447:23: warning: Using plain integer as NULL
pointer
../drivers/video/fbdev/hitfb.c:465:23: warning: Using plain integer as NULL
pointer
Signed-off-by: Thomas Zimmermann
---
On Fri, May 26, 2023 at 5:21 PM Ilia Mirkin wrote:
>
> On Fri, May 26, 2023 at 5:11 AM Karol Herbst wrote:
> >
> > 1ba6113a90a0 removed a lot of the kernel GPU channel, but method 0x128
> > was important as otherwise the GPU spams us with `CACHE_ERROR` messages.
> >
> > We use the blit
On 05.06.23 12:18, Johan Hovold wrote:
> On Mon, Jun 05, 2023 at 01:05:36PM +0300, Dmitry Baryshkov wrote:
>> On Mon, 5 Jun 2023 at 13:02, Johan Hovold wrote:
>
>>> Virtual terminals are still broken with 6.4-rc5 on the Lenovo ThinkPad
>>> X13s two weeks after I reported this, and there has
Hi,
On 2023/6/6 10:06, Sui Jingfeng wrote:
Originally, I also want to express the opinion.
Originally, I want to express the same opinion as you told me.
Because vga_iostate_to_str() function is taking unsigned int parameter.
so, I think, using 'unsigned int *' type as the third parameter
On Tue, Jun 06, 2023 at 11:10:04AM +0100, Tvrtko Ursulin wrote:
>
> On 06/06/2023 11:00, Andi Shyti wrote:
> > From: Fei Yang
> >
> > To comply with the design that buffer objects shall have immutable
> > cache setting through out their life cycle, {set, get}_caching ioctl's
> > are no longer
On 06/06/2023 11:00, Andi Shyti wrote:
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a
From: Fei Yang
This series introduce a new extension for GEM_CREATE,
1. end support for set caching ioctl [PATCH 1/2]
2. add set_pat extension for gem_create [PATCH 2/2]
v2: drop one patch that was merged separately
commit 341ad0e8e254 ("drm/i915/mtl: Add PTE encode function")
v3: rebased
Hello Krzysztof,
uto, 6. lip 2023. u 09:10 Krzysztof Kozlowski
napisao je:
>
> On 05/06/2023 17:35, Paulo Pavacic wrote:
> > Added fannal to vendor-prefixes and dt bindings for Fannal C3004.
> > Fannal C3004 is a 480x800 MIPI DSI Panel which requires
> > DCS initialization sequences with certain
On 06/06/2023 11:46, Aradhya Bhatia wrote:
Hi Neil,
Thank you for reviewing the previous patches!
On 06-Jun-23 14:37, Neil Armstrong wrote:
Hi,
On 06/06/2023 10:21, Aradhya Bhatia wrote:
Hi all,
I have picked up this long standing series from Nikhil Devshatwar[1].
This series moves the
Hi Neil,
Thank you for reviewing the previous patches!
On 06-Jun-23 14:37, Neil Armstrong wrote:
> Hi,
>
> On 06/06/2023 10:21, Aradhya Bhatia wrote:
>> Hi all,
>>
>> I have picked up this long standing series from Nikhil Devshatwar[1].
>>
>> This series moves the tidss to using new connectoe
On 05/06/2023 23:22, Andi Shyti wrote:
Hi Tvrtko,
On Mon, Jun 05, 2023 at 03:37:20PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver specific fdinfo output.
To collect the stats we
On 05/06/2023 14:47, Andi Shyti wrote:
Hi Tvrtko,
Add some missing error propagation in live_parallel_switch.
To avoid needlessly burdening the various backport processes, note I am
not marking it as a fix against any patches and not copying stable since
it is debug/selftests only code.
On 05/06/2023 23:07, Andi Shyti wrote:
Hi Tvrtko,
On Mon, Jun 05, 2023 at 01:32:24PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Use the common fdinfo helper for printing the basics. Remove now unused
client id allocation code.
Signed-off-by: Tvrtko Ursulin
Cc: Rob Clark
looks
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a
From: Fei Yang
This series introduce a new extension for GEM_CREATE,
1. end support for set caching ioctl [PATCH 1/2]
2. add set_pat extension for gem_create [PATCH 2/2]
v2: drop one patch that was merged separately
commit 341ad0e8e254 ("drm/i915/mtl: Add PTE encode function")
v3: rebased
Hi,
On 06/06/2023 10:21, Aradhya Bhatia wrote:
Hi all,
I have picked up this long standing series from Nikhil Devshatwar[1].
This series moves the tidss to using new connectoe model, where the SoC
driver (tidss) creates the connector and all the bridges are attached
with the flag
On 6/5/2023 10:27 PM, Andi Shyti wrote:
Hi Nirmoy,
On Mon, Jun 05, 2023 at 10:10:21PM +0200, Nirmoy Das wrote:
Ensure correct handling of closed VMAs on multi-gt platforms to prevent
Use-After-Free. Currently, when GT0 goes idle, closed VMAs that are
exclusively added to GT0's closed_vma
On 06/06/2023 10:21, Aradhya Bhatia wrote:
From: Nikhil Devshatwar
With new connector model, tfp410 will not create the connector and
SoC driver will rely on format negotiation to setup the encoder format.
Support format negotiations hooks in the drm_bridge_funcs.
Use helper functions for
On 06/06/2023 10:21, Aradhya Bhatia wrote:
From: Nikhil Devshatwar
With new connector model, mhdp bridge will not create the connector and
SoC driver will rely on format negotiation to setup the encoder format.
Support minimal format negotiations hooks in the drm_bridge_funcs.
Complete format
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