On 8/22/2023 5:41 PM, Yadav, Arvind wrote:
Hi Lijo,
The *_set function will set the GPU power profile and the *_put function
will schedule the
smu_delayed_work task after 100ms delay. This smu_delayed_work task will
clear a GPU
power profile if any new jobs are not scheduled within 100
, drm, args->size, 0,
>> >handle);
>> - if (IS_ERR(bo))
>> - return PTR_ERR(bo);
>> -
>> - return 0;
>> + return PTR_ERR_OR_ZERO(bo);
>> }
>> static vm_fault_t tegra_bo_fault(struct vm_fault *vmf)
>
> NAK. See
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20230822=b784c77075023e1a71bc06e6b4f711acb99e9c73
Thank you! It is right.
>
> Mikko
On 8/22/2023 11:55 AM, Lazar, Lijo wrote:
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a function which will change the GPU
power profile based on a submitted job. This can optimize
the power performance when the workload is on.
v2:
- Splitting workload_profile_set and
On Thu, Aug 17, 2023 at 05:55:16PM +0300, Dmitry Baryshkov wrote:
> Switch to using the new DRM_AUX_BRIDGE helper to create the
> transparent DRM bridge device instead of handcoding corresponding
> functionality.
>
> Reviewed-by: Heikki Krogerus
> Signed-off-by: Dmitry Baryshkov
> ---
>
kernel/git/next/linux-next.git/commit/?h=next-20230822=b784c77075023e1a71bc06e6b4f711acb99e9c73
Mikko
On Thu, 10 Aug 2023 15:03:11 -0100
Melissa Wen wrote:
> dc->caps.color.mpc.gamut_remap says there is a post-blending color block
> for gamut remap matrix for DCN3 HW family and newer versions. However,
> those drivers still follow DCN10 programming that remap stream
> gamut_remap_matrix to DPP
On 22/08/2023 08.05, Mina Almasry wrote:
On Sat, Aug 19, 2023 at 2:51 AM Jesper Dangaard Brouer
wrote:
On 10/08/2023 03.57, Mina Almasry wrote:
Overload the LSB of struct page* to indicate that it's a page_pool_iov.
Refactor mm calls on struct page * into helpers, and add page_pool_iov
On Tue, Aug 22, 2023 at 05:36:56AM +, Kasireddy, Vivek wrote:
> Hi Jason,
>
> > > This patch series adds support for migrating pages associated with
> > > a udmabuf out of the movable zone or CMA to avoid breaking features
> > > such as memory hotunplug.
> > >
> > > The first patch exports
On 8/22/2023 12:01 PM, Lazar, Lijo wrote:
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a suspend function that will clear the GPU
power profile before going into suspend state.
v2:
- Add the new suspend function based on review comment.
Cc: Shashank Sharma
Cc: Christian
Hi Lijo,
The *_set function will set the GPU power profile and the *_put function
will schedule the
smu_delayed_work task after 100ms delay. This smu_delayed_work task will
clear a GPU
power profile if any new jobs are not scheduled within 100 ms. But if
any new job comes within 100ms
then
On Thu, 10 Aug 2023 15:02:59 -0100
Melissa Wen wrote:
> The next patch adds pre-blending degamma to AMD color mgmt pipeline, but
> pre-blending degamma caps (DPP) is currently in use to provide DRM CRTC
> atomic degamma or implict degamma on legacy gamma. Detach degamma usage
> regarging CRTC
On Tue, 22 Aug 2023, Jani Nikula wrote:
> This reverts commit 0ba4a784a14592abed41873e339eab78ceb6e230.
>
> drm_edid_override_connector_update() is *not* supposed to be used by
> drivers directly.
>
> From the documentation:
>
> Only to be used from drm_helper_probe_single_connector_modes() as
Over the past years I've been trying to unify the override and firmware
EDID handling as well as EDID property updates. It won't work if drivers
do their own random things.
BR,
Jani.
Cc: Alex Deucher
Cc: Alex Hung
Cc: Chao-kai Wang
Cc: Daniel Wheeler
Cc: Harry Wentland
Cc: Hersen Wu
Cc:
This reverts commit 0ba4a784a14592abed41873e339eab78ceb6e230.
drm_edid_override_connector_update() is *not* supposed to be used by
drivers directly.
>From the documentation:
Only to be used from drm_helper_probe_single_connector_modes() as a
fallback for when DDC probe failed during
This reverts commit dae343b343ff741d727312b2a9b03d86e64b31c5.
Dependency for reverting the next commit cleanly.
Cc: Alex Deucher
Cc: Alex Hung
Cc: Chao-kai Wang
Cc: Daniel Wheeler
Cc: Harry Wentland
Cc: Hersen Wu
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Wenchieh Chien
Cc: David Airlie
Cc:
This reverts commit 550e5d23f14784e2a625c25fe0c9d498589c9256.
drm_edid_override_connector_update() is *not* supposed to be used by
drivers directly.
>From the documentation:
Only to be used from drm_helper_probe_single_connector_modes() as a
fallback for when DDC probe failed during
This reverts commit 8789989b476b5f3bb0bf1a63b5223f6e76cfd13d.
Dependency for reverting the next commit cleanly.
Cc: Alex Deucher
Cc: Alex Hung
Cc: Chao-kai Wang
Cc: Daniel Wheeler
Cc: Harry Wentland
Cc: Hersen Wu
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Wenchieh Chien
Cc: David Airlie
Cc:
On Thu, 10 Aug 2023 15:02:49 -0100
Melissa Wen wrote:
> From: Joshua Ashton
>
> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier =
When -EPROBE_DEFER is returned do not raise an error, but silently return
this error instead. Fixes error like this:
[drm:drm_bridge_attach] *ERROR* failed to attach bridge
/soc@0/bus@3080/mipi-dsi@30a0 to encoder None-34: -517
[drm:drm_bridge_attach] *ERROR* failed to attach bridge
Hi,
On Tue, Aug 22, 2023 at 04:59:44PM +0800, Liu Ying wrote:
> This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
>
> Reviewed-by: Rob Herring
> Signed-off-by: Liu Ying
> ---
> v7->v14:
> * No change.
>
> v6->v7:
> * Add Rob's R-b tag back.
>
> v5->v6:
> * Use graph schema.
On Thu, 10 Aug 2023 15:02:48 -0100
Melissa Wen wrote:
> Brief documentation about pre-defined transfer function usage on AMD
> display driver and standardized EOTFs and inverse EOTFs.
>
> Co-developed-by: Harry Wentland
> Signed-off-by: Harry Wentland
> Signed-off-by: Melissa Wen
> ---
>
On Wed, 17 May 2023, Hamza Mahfooz wrote:
> Since, we are only interested in having
> drm_edid_override_connector_update(), update the value of
> connector->edid_blob_ptr. We don't care about the return value of
> drm_edid_override_connector_update() here. So, drop count.
>
> Fixes: 068553e14f86
>-Original Message-
>From: Felix Kuehling
>Sent: Monday, August 21, 2023 4:57 PM
>To: Zeng, Oak ; Dave Airlie
>Cc: Brost, Matthew ; Thomas Hellström
>; Philip Yang ;
>Welty, Brian ; dri-devel@lists.freedesktop.org;
>Christian König ; Vishwanathapura, Niranjana
>;
From: Alex Deucher
[ Upstream commit a6dea2d64ff92851e68cd4e20a35f6534286e016 ]
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Reviewed-by: Felix Kuehling
Acked-by: Christian König
Tested-by: Mike Lothian
Signed-off-by: Alex
From: Alex Deucher
[ Upstream commit a6dea2d64ff92851e68cd4e20a35f6534286e016 ]
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Reviewed-by: Felix Kuehling
Acked-by: Christian König
Tested-by: Mike Lothian
Signed-off-by: Alex
From: Lijo Lazar
[ Upstream commit d3de41ee5febe5c2d9989fe9810bce2bb54a3a8e ]
On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the
least significant bits for any command submission. Hence match against
the exact register value, otherwise a register value of all 0xFFs also
From: Alex Deucher
[ Upstream commit 091ae5473f96ced844af6ba39b94757359b12348 ]
Use the dGPU path instead. There were a lot of platform
issues with IOMMU in general on these chips due to windows
not enabling IOMMU at the time. The dGPU path has been
used for a long time with newer APUs and
From: Alex Deucher
[ Upstream commit 616f92d188ee7142a95a52068efdbea82645f859 ]
Use the dGPU path instead. There were a lot of platform
issues with IOMMU in general on these chips due to windows
not enabling IOMMU at the time. The dGPU path has been
used for a long time with newer APUs and
From: Alex Deucher
[ Upstream commit a6dea2d64ff92851e68cd4e20a35f6534286e016 ]
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Reviewed-by: Felix Kuehling
Acked-by: Christian König
Tested-by: Mike Lothian
Signed-off-by: Alex
From: Lijo Lazar
[ Upstream commit d3de41ee5febe5c2d9989fe9810bce2bb54a3a8e ]
On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the
least significant bits for any command submission. Hence match against
the exact register value, otherwise a register value of all 0xFFs also
From: Tim Huang
[ Upstream commit 730d44e1fa306a20746ad4a85da550662aed9daa ]
For SMU v13.0.4/11, driver does not need to stop RLC for S0i3,
the firmwares will handle that properly.
Signed-off-by: Tim Huang
Reviewed-by: Mario Limonciello
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Alex Deucher
[ Upstream commit 091ae5473f96ced844af6ba39b94757359b12348 ]
Use the dGPU path instead. There were a lot of platform
issues with IOMMU in general on these chips due to windows
not enabling IOMMU at the time. The dGPU path has been
used for a long time with newer APUs and
From: Alex Deucher
[ Upstream commit 616f92d188ee7142a95a52068efdbea82645f859 ]
Use the dGPU path instead. There were a lot of platform
issues with IOMMU in general on these chips due to windows
not enabling IOMMU at the time. The dGPU path has been
used for a long time with newer APUs and
From: Lijo Lazar
[ Upstream commit d3de41ee5febe5c2d9989fe9810bce2bb54a3a8e ]
On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the
least significant bits for any command submission. Hence match against
the exact register value, otherwise a register value of all 0xFFs also
From: Alex Deucher
[ Upstream commit a6dea2d64ff92851e68cd4e20a35f6534286e016 ]
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Reviewed-by: Felix Kuehling
Acked-by: Christian König
Tested-by: Mike Lothian
Signed-off-by: Alex
From: Tim Huang
[ Upstream commit 730d44e1fa306a20746ad4a85da550662aed9daa ]
For SMU v13.0.4/11, driver does not need to stop RLC for S0i3,
the firmwares will handle that properly.
Signed-off-by: Tim Huang
Reviewed-by: Mario Limonciello
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
After the commit in the Fixes: line below, HPD polling stopped working
on i915, since after that change calling drm_kms_helper_poll_enable()
doesn't restart drm_mode_config::output_poll_work if the work was
stopped (no connectors needing polling) and enabling polling for a
connector (during
Add a helper to reschedule drm_mode_config::output_poll_work after
polling has been enabled for a connector (and needing a reschedule,
since previously polling was disabled for all connectors and hence
output_poll_work was not running).
This is needed by the next patch fixing HPD polling on i915.
Am Montag, 21. August 2023, 19:14:39 CEST schrieb Rob Herring:
> On Thu, 10 Aug 2023 16:44:49 +0200, Alexander Stein wrote:
> > MAC address can be provided by a nvmem-cell, thus allow referencing a
> > source for the address. Fixes the warning:
> > arch/arm/boot/dts/nxp/imx/imx6q-mba6a.dtb:
Hello
I would like to introduce a usage of SHMEM slimier to DMA-buf, the major
purpose of that is sharing metadata or just a pure container for cross
drivers.
We need to exchange some sort of metadata between drivers, likes dynamic
HDR data between video4linux2 and DRM. Or the graphics
On Thu, 10 Aug 2023 15:02:47 -0100
Melissa Wen wrote:
> Instead of relying on color block names to get the transfer function
> intention regarding encoding pixel's luminance, define supported
> Electro-Optical Transfer Functions (EOTFs) and inverse EOTFs, that
> includes pure gamma or
On Fri, Aug 18, 2023 at 05:06:42PM -0300, André Almeida wrote:
> Create a section that specifies how to deal with DRM device resets for
> kernel and userspace drivers.
>
> Signed-off-by: André Almeida
>
> ---
>
> v7 changes:
> - s/application/graphical API contex/ in the robustness part
On 8/21/23 22:02, André Almeida wrote:
> Em 17/08/2023 07:37, Michel Dänzer escreveu:
>> On 8/15/23 20:57, André Almeida wrote:
>>> From: Pekka Paalanen
>>>
>>> Specify how the atomic state is maintained between userspace and
>>> kernel, plus the special case for async flips.
>>>
>>>
Hello All,
I am a usual kernel developer, and wanted to contribute to the open source.
I saw a small TODO list in the DRM graphics subsystem, with some tasks.
So, just wanted to ask, is anyone working on the task:
*Replace drm_detect_hdmi_monitor() with drm_display_info.is_hdmi*
Its on the TODO
On Tue, Aug 15, 2023 at 03:57:09PM -0300, André Almeida wrote:
> Given that prop changes may lead to modesetting, which would defeat the
> fast path of the async flip, refuse any atomic prop change for async
> flips in atomic API. The only exceptions are the framebuffer ID to flip
> to and the
From: Karol Wachowski
Buttress spec requires that the interrupt status is cleared at
the source first (before clearing MTL_BUTTRESS_INTERRUPT_STAT),
that implies that we have to mask out the global interrupt while
handling buttress interrupts.
Fixes: 79cdc56c4a54 ("accel/ivpu: Add initial
Am 21.08.23 um 21:46 schrieb Faith Ekstrand:
On Mon, Aug 21, 2023 at 1:13 PM Christian König
wrote:
[SNIP]
So as long as nobody from userspace comes and says we absolutely
need to
optimize this use case I would rather not do it.
This is a place where nouveau's needs are
Am 21.08.23 um 22:02 schrieb Philip Yang:
Without unsigned long typecast, the size is passed in as zero if page
array size >= 4GB, nr_pages >= 0x10, then sg list converted will
have the first and the last chunk lost.
Good catch, but I'm not sure if this is enough to make it work.
On 27.04.23 12:51, Raj J Putari wrote:
id write it but im an amatuer and i dont have time to read the kernel
source and experiment, we're talking about nvidia and amd video cards
assisting in processing heavy data.
obviously not w/ NVidia (except for some old, already reverse-engineered
Signed-off-by: Vinayak Hegde
---
include/uapi/linux/sync_file.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/uapi/linux/sync_file.h b/include/uapi/linux/sync_file.h
index 7e42a5b7558b..ff0a931833e2 100644
--- a/include/uapi/linux/sync_file.h
+++
Fix formatting warnings when run "make htmldocs":
./drivers/gpu/drm/i915/gt/uc/intel_huc.c:29: WARNING: Unexpected indentation.
./drivers/gpu/drm/i915/gt/uc/intel_huc.c:30: WARNING: Block quote ends without
a blank line; unexpected unindent.
./drivers/gpu/drm/i915/gt/uc/intel_huc.c:35: WARNING:
Hi Tomi,
On 16.08.23 13:25, Tomi Valkeinen wrote:
> The driver has a few places where it does:
>
> if (thing_is_enabled_in_config)
> update_thing_bit_in_hw()
>
> This means that if the thing is _not_ enabled, the bit never gets
> cleared. This affects the h/vsyncs and continuous DSI clock
This patch fixes the following sphinx warnings in the htmldocs make target:
Documentation/gpu/i915:546: ./drivers/gpu/drm/i915/gt/uc/intel_huc.c:29: ERROR:
Unexpected indentation.
Documentation/gpu/i915:546: ./drivers/gpu/drm/i915/gt/uc/intel_huc.c:30:
WARNING: Block quote ends without a blank
nice read!
i was thinking of a kernel module that does stuff like offload some
work to the gpu.. like we can have like gpuaccel.ko that does stuff
like wrap gpu calls to stuff like compiles or low level stuff like
heavy computes, just looked up a few apis and it looks like opencl and
cuda are
Am 21.08.23 um 21:07 schrieb Danilo Krummrich:
On 8/21/23 20:12, Christian König wrote:
Am 21.08.23 um 20:01 schrieb Danilo Krummrich:
On 8/21/23 16:07, Christian König wrote:
Am 18.08.23 um 13:58 schrieb Danilo Krummrich:
[SNIP]
I only see two possible outcomes:
1. You return -EBUSY (or
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Acked-by: Laurentiu Palcu
Signed-off-by: Liu Ying
---
v11->v14:
* No change.
v10->v11:
* Rebase upon v6.0-rc1.
v9->v10:
* Add Laurentiu's A-b tag.
v1->v9:
* No change.
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v10->v14:
* No change.
v9->v10:
* Add Rob's R-b tag.
v8->v9:
* Reference 'interrupts-extended' schema instead of 'interrupts' to require
an additional
Artificially use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Acked-by: Daniel Vetter
Signed-off-by: Liu Ying
---
v6->v14:
* No change.
v5->v6:
* Fix commit message typo - s/Artifically/Artificially/
v4->v5:
*
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v4->v14:
* No change.
v3->v4:
* Improve compatible property by using enum instead of oneOf+const. (Rob)
* Add Rob's R-b tag.
v2->v3:
* No change.
v1->v2:
* Use new
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v7->v14:
* No change.
v6->v7:
* Add Rob's R-b tag back.
v5->v6:
* Use graph schema. So, drop Rob's R-b tag as review is needed.
v4->v5:
* No change.
v3->v4:
* Improve
Hi,
This is the v14 series to introduce i.MX8qm/qxp Display Processing Unit(DPU)
DRM support.
DPU is comprised of a blit engine for 2D graphics, a display controller
and a command sequencer. Outside of DPU, optional prefetch engines can
fetch data from memory prior to some DPU fetchunits of
On 8/20/23 05:54, Matthew Brost wrote:
On Fri, Aug 18, 2023 at 05:08:45PM +0200, Thomas Hellström wrote:
Support pinning of vmas using XE_VM_BIND_FLAG_PIN, initially for userptr
only. Pinned memory becomes accounted against RLIMIT_MEMLOCK and processes
with CAP_IPC_LOCK will not apply the
On Tuesday, August 22, 2023 4:06 PM Maxime wrote:
>
> Hi,
Hi,
>
> On Tue, Aug 22, 2023 at 05:36:14AM +, Ying Liu wrote:
> > Hi,
> >
> > > On Friday, January 6, 2023 1:50 PM Ying Liu wrote:
> > >
> > > Hi,
> > >
> > >
> > > This is the v14 series to introduce i.MX8qm/qxp Display
On 8/20/23 06:06, Matthew Brost wrote:
On Fri, Aug 18, 2023 at 05:08:43PM +0200, Thomas Hellström wrote:
Implement pinning of userptrs between VM_BIND and VM_UNBIND, which will
facilitate avoiding long hangs on non-preemptible workloads. But don't
hook it up to userspace just yet.
On Mon, 21 Aug 2023 17:55:33 +0200
Maxime Ripard wrote:
> Hi Pekka,
>
> Thanks for answering
>
> On Fri, Aug 18, 2023 at 04:24:15PM +0300, Pekka Paalanen wrote:
> > On Thu, 10 Aug 2023 09:45:27 +0200
> > Maxime Ripard wrote:
> > > On Mon, Aug 07, 2023 at 03:45:15PM +0200, Jocelyn Falempe
"Kasireddy, Vivek" writes:
> Hi Alistair,
>
>> >> > > > No, adding HMM_PFN_REQ_WRITE still doesn't help in fixing the
>> issue.
>> >> > > > Although, I do not have THP enabled (or built-in), shmem does not
>> evict
>> >> > > > the pages after hole punch as noted in the comment in
>> >>
On 8/20/23 05:43, Matthew Brost wrote:
On Fri, Aug 18, 2023 at 05:08:44PM +0200, Thomas Hellström wrote:
Account these pages against RLIMIT_MEMLOCK following how RDMA does this
with CAP_IPC_LOCK bypassing the limit.
Signed-off-by: Thomas Hellström
Patch LGTM but nits on naming + possible
Hi,
On Tue, Aug 22, 2023 at 05:36:14AM +, Ying Liu wrote:
> Hi,
>
> > On Friday, January 6, 2023 1:50 PM Ying Liu wrote:
> >
> > Hi,
> >
> >
> > This is the v14 series to introduce i.MX8qm/qxp Display Processing Unit(DPU)
> > DRM support.
> >
> > DPU is comprised of a blit engine for 2D
On Tuesday, August 22, 2023 3:20 PM Marcel Ziswiler
wrote:
>
> Hi Liu Ying
Hi Marcel,
>
> On Tue, 2023-08-22 at 05:36 +, Ying Liu wrote:
> > Hi,
> >
> > > On Friday, January 6, 2023 1:50 PM Ying Liu wrote:
> > >
> > > Hi,
> > >
> > >
> > > This is the v14 series to introduce i.MX8qm/qxp
On 2023/8/17 19:23, Qi Zheng wrote:
Hi all,
To make reviewing and updating easier, I've chosen to split the previous
patchset[1] into the following three parts:
part 1: some cleanups and preparations
part 2: introduce new APIs and convert all shrinnkers to use these
part 3: implement
On Mon, 21 Aug 2023 17:30:21 +0300
Dmitry Baryshkov wrote:
> On Fri, 18 Aug 2023 at 16:55, Pekka Paalanen wrote:
> >
> > On Fri, 18 Aug 2023 14:03:14 +0300
> > Dmitry Baryshkov wrote:
> >
> > > On 18/08/2023 13:51, Pekka Paalanen wrote:
> > > > On Fri, 4 Aug 2023 16:59:00 +0300
> > > >
Hi Liu Ying
On Tue, 2023-08-22 at 05:36 +, Ying Liu wrote:
> Hi,
>
> > On Friday, January 6, 2023 1:50 PM Ying Liu wrote:
> >
> > Hi,
> >
> >
> > This is the v14 series to introduce i.MX8qm/qxp Display Processing Unit(DPU)
> > DRM support.
[snip]
> This patch series has been submitted
Return PTR_ERR_OR_ZERO() instead of return 0 or PTR_ERR() to
simplify code.
Signed-off-by: Jinjie Ruan
---
drivers/gpu/drm/tegra/drm.c | 5 +
drivers/gpu/drm/tegra/gem.c | 5 +
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/tegra/drm.c
PTR_ERR_OR_ZERO() return the error code within @ptr if it is
an error pointer, otherwise return 0. So use it to simplify code.
Jinjie Ruan (2):
drm/bridge: Use PTR_ERR_OR_ZERO() to simplify code
drm/tegra: Use PTR_ERR_OR_ZERO() to simplify code
drivers/gpu/drm/bridge/tc358762.c | 10
Return PTR_ERR_OR_ZERO() instead of return 0 or PTR_ERR() to
simplify code.
Signed-off-by: Jinjie Ruan
---
drivers/gpu/drm/bridge/tc358762.c | 10 ++
drivers/gpu/drm/bridge/tc358764.c | 5 +
2 files changed, 3 insertions(+), 12 deletions(-)
diff --git
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a suspend function that will clear the GPU
power profile before going into suspend state.
v2:
- Add the new suspend function based on review comment.
Cc: Shashank Sharma
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Arvind
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a function which will change the GPU
power profile based on a submitted job. This can optimize
the power performance when the workload is on.
v2:
- Splitting workload_profile_set and workload_profile_put
into two separate patches.
Hi Alistair,
> >> > > > No, adding HMM_PFN_REQ_WRITE still doesn't help in fixing the
> issue.
> >> > > > Although, I do not have THP enabled (or built-in), shmem does not
> evict
> >> > > > the pages after hole punch as noted in the comment in
> >> shmem_fallocate():
> >> > >
> >> > > This is
On 8/21/2023 11:40 PM, Alex Deucher wrote:
On Mon, Aug 21, 2023 at 1:54 PM Yadav, Arvind wrote:
On 8/21/2023 9:52 PM, Alex Deucher wrote:
On Mon, Aug 21, 2023 at 2:55 AM Arvind Yadav wrote:
This patch adds a function which will change the GPU
power profile based on a submitted job. This
On Sat, Aug 19, 2023 at 2:51 AM Jesper Dangaard Brouer
wrote:
>
>
>
> On 10/08/2023 03.57, Mina Almasry wrote:
> > Overload the LSB of struct page* to indicate that it's a page_pool_iov.
> >
> > Refactor mm calls on struct page * into helpers, and add page_pool_iov
> > handling on those helpers.
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