> -Original Message-
> From: Manna, Animesh
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> ; Hogander, Jouni ;
> Murthy, Arun R ; Nikula, Jani
>
> Subject: [PATCH v7 6/6] drm/i915/panelreplay:
> -Original Message-
> From: Manna, Animesh
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> ; Hogander, Jouni ;
> Murthy, Arun R ; Nikula, Jani
>
> Subject: [PATCH v7 5/6] drm/i915/panelreplay:
> -Original Message-
> From: Manna, Animesh
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> ; Hogander, Jouni ;
> Murthy, Arun R ; Nikula, Jani
>
> Subject: [PATCH v7 4/6] drm/i915/panelreplay:
Hi,
For testing we wanted to generate and send some error DisplayPort frames
packets (send some invalid DisplayPort video stream data packets) to the
DisplayPort sink device to check if the sink device is behaving correctly
to DisplayPort error stream data frames received.
Could you please
> -Original Message-
> From: Manna, Animesh
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> ; Hogander, Jouni ;
> Murthy, Arun R ; Nikula, Jani
>
> Subject: [PATCH v7 3/6] drm/i915/panelreplay:
Hi Alexander,
Thanks your comments,
>
>
> Hi Sandor,
>
> thanks for the updated series.
>
> Am Freitag, 13. Oktober 2023, 05:24:23 CEST schrieb Sandor Yu:
> > Add a new DRM DisplayPort and HDMI bridge driver for Candence
> MHDP8501
> > used in i.MX8MQ SOC. MHDP8501 could support HDMI or
Hi Alexander,
Thanks your comments,
>
> Hi Sandor,
>
> thanks for the updated series.
>
> Am Freitag, 13. Oktober 2023, 05:24:20 CEST schrieb Sandor Yu:
> > MHDP8546 mailbox access functions will be share to other mhdp driver
> > and Cadence HDP-TX HDMI/DP PHY drivers.
> > Create a new mhdp
From: Alvin Šipraga
The adv7511 driver is solely responsible for setting the physical
address of its CEC adapter. To do this, it must read the EDID. However,
EDID is only read when either the drm_bridge_funcs :: get_edid or
drm_connector_helper_funcs :: get_modes ops are called. Without loss of
From: Mads Bligaard Nielsen
Moved IRQ registration down to end of adv7511_probe().
If an IRQ already is pending during adv7511_probe
(before adv7511_cec_init) then cec_received_msg_ts
could crash using uninitialized data:
Unable to handle kernel read from unreadable memory at virtual
Since format specifier %pr refers to a 'struct resource *', there is no
need to take the address of the 'res' variable since it is already of
type 'struct resource *'.
Signed-off-by: Yussef Dalton
---
drivers/gpu/drm/tiny/ofdrm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
This is a note to let you know that I've just added the patch titled
drm/tiny: correctly print `struct resource *` on error
to the 6.5-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
On Tuesday, August 15th, 2023 at 20:57, André Almeida
wrote:
> Given that prop changes may lead to modesetting, which would defeat the
> fast path of the async flip, refuse any atomic prop change for async
> flips in atomic API. The only exceptions are the framebuffer ID to flip
> to and the
On 10/15/23 06:11, Yussef Dalton wrote:
> Since format specifier %pr refers to a 'struct resource *', there is no
> need to take the address of the 'res' variable since it is already of
> type 'struct resource *'.
>
> Signed-off-by: Yussef Dalton
Reviewed-by: Randy Dunlap
Thanks.
> ---
>
Currently drm_client_buffer_addfb() uses the legacy drm_mode_addfb(),
which uses bpp and depth to guess the wanted buffer format.
However, drm_client_buffer_addfb() already knows the exact buffer
format, so there is no need to convert back and forth between buffer
format and bpp/depth, and the
Hi,
On Mon, Feb 13, 2023 at 01:32:38PM +0100, Frank Oltmanns wrote:
> Fix flickering of the pinephone's XDB599 panel that happens after
> resume.
>
> Extend the delay after issuing the command to exit sleep mode from 60 to
> 120 msec as per the controller's specification.
>
> Introduce a 120
Hi,
On Sat, Feb 11, 2023 at 06:17:48PM +0100, Frank Oltmanns wrote:
> From: Ondrej Jirman
>
> Switching to a different reset sequence, enabling IOVCC before enabling
> VCC.
>
> There also needs to be a delay after enabling the supplies and before
> deasserting the reset. The datasheet specifies
https://bugzilla.kernel.org/show_bug.cgi?id=205089
--- Comment #60 from nintyfa...@gmail.com (nintyfa...@gmail.com) ---
Memory info (GL_NVX_gpu_memory_info):
Dedicated video memory: 512 MB
Total available memory: 8210 MB
Currently available dedicated video memory: 19 MB
This makes
Hi,
On Sat, Feb 11, 2023 at 06:17:48PM +0100, Frank Oltmanns wrote:
> From: Ondrej Jirman
>
> Switching to a different reset sequence, enabling IOVCC before enabling
> VCC.
>
> There also needs to be a delay after enabling the supplies and before
> deasserting the reset. The datasheet specifies
/hid.git for-next
patch link:
https://lore.kernel.org/r/20231010125917.138225-10-Shyam-sundar.S-k%40amd.com
patch subject: [PATCH v3 09/16] platform/x86/amd/pmf: Add facility to dump TA
inputs
config: x86_64-allyesconfig
(https://download.01.org/0day-ci/archive/20231015/202310151704.ofb4hsxk
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