On 27.10.2023 16:07, Harshit Mogalapalli wrote:
When i915 perf interface is not available dereferencing it will lead to
NULL dereferences.
Fix this by using DRM_DEBUG() which the scenario before the commit in
the Fixes tag.
Fixes: 2fec539112e8 ("i915/perf: Replace DRM_DEBUG with driver
Add helpers drivers can use to calculate the BW allocation overhead -
due to SSC, FEC, DSC and data alignment on symbol cycles - and the
channel coding efficiency - due to the 8b/10b, 128b/132b encoding. On
128b/132b links the FEC overhead is part of the coding efficiency, so
not accounted for in
When i915 perf interface is not available dereferencing it will lead to
NULL dereferences.
Fix this by using DRM_DEBUG() which the scenario before the commit in
the Fixes tag.
Fixes: 2fec539112e8 ("i915/perf: Replace DRM_DEBUG with driver specific drm_dbg
call")
Signed-off-by: Harshit
On Fri, Oct 20, 2023 at 05:11:24PM +0300, Dan Carpenter wrote:
> On Fri, Oct 20, 2023 at 02:55:37PM +0300, Ville Syrjälä wrote:
> > On Fri, Oct 20, 2023 at 02:39:04PM +0300, Dan Carpenter wrote:
> > > On Wed, Oct 18, 2023 at 05:17:42PM +0300, Dan Carpenter wrote:
> > > > drivers/gpu/drm/drm_rect.c
I'm afraid that would not be very useful. It indeed depends on the refresh
rate, but also on how close to vblank the compositor does its commits / on
what the latency requirements for the currently shown content are.
When the compositor presents a fullscreen video with frames that are queued
up in
On 25/10/2023 09:35, Neil Armstrong wrote:
> Document the Mobile Display Subsystem (MDSS) on the SM8650 Platform.
>
> Signed-off-by: Neil Armstrong
> ---
> .../bindings/display/msm/qcom,sm8650-mdss.yaml | 322
> +
> 1 file changed, 322 insertions(+)
>
Reviewed-by:
On 25/10/2023 09:35, Neil Armstrong wrote:
> Document the DPU Display Controller on the SM8650 Platform.
>
> Signed-off-by: Neil Armstrong
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 25/10/2023 09:35, Neil Armstrong wrote:
> Document the DSI Controller on the SM8650 Platform.
>
> Signed-off-by: Neil Armstrong
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 25/10/2023 09:34, Neil Armstrong wrote:
> Document the DSI PHY on the SM8650 Platform.
>
> Signed-off-by: Neil Armstrong
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Fri, Oct 27, 2023 at 12:51:07PM +0300, Jani Nikula wrote:
> On Thu, 26 Oct 2023, Emil Abildgaard Svendsen wrote:
> > Currently reading EDID only works because usually only two EDID blocks
> > of 128 bytes is used. Where an EDID segment holds 256 bytes or two EDID
> > blocks. And the first EDID
Am Fr., 27. Okt. 2023 um 12:01 Uhr schrieb Sebastian Wick <
sebastian.w...@redhat.com>:
> On Fri, Oct 27, 2023 at 10:59:25AM +0200, Michel Dänzer wrote:
> > On 10/26/23 21:25, Alex Goins wrote:
> > > On Thu, 26 Oct 2023, Sebastian Wick wrote:
> > >> On Thu, Oct 26, 2023 at 11:57:47AM +0300, Pekka
On Fri, Oct 27, 2023 at 05:19:12PM +0800, Peng Hao wrote:
> Since drm_get_format_info() may return NULL,
Not in this case since we already checked it earlier.
> so a judgement of return
> value is needed to add.
>
> Signed-off-by: Peng Hao
> ---
> drivers/gpu/drm/drm_framebuffer.c | 4
>
Hi Doug,
Many thanks for your reply.
> Hi,
>
> On Thu, Oct 26, 2023 at 7:37 AM Jonas Mark (BT-FS/ENG1-GRB)
> wrote:
> >
> > Hi,
> >
> > We have a parallel LCD panel which is driven by panel/panel-simple.
> The power-off sequence specified in the datasheet requires that the
> enable-gpio must
Change check of DDC status. Instead of silently not reading EDID when in
"IDLE" state [1]. Always read EDID but add a debug log when DDC
controller is in reset.
[1]
ADV7511 Programming Guide: Table 11: DDCController Status:
0xC8 [3:0] DDC Controller State
In Reset (No Hot Plug
Currently reading EDID only works because usually only two EDID blocks
of 128 bytes is used. Where an EDID segment holds 256 bytes or two EDID
blocks. And the first EDID segment read works fine but E-EDID specifies
up to 128 segments.
The logic is broken so change EDID segment index to multiple
On Tue, Oct 24, 2023 at 01:22:17PM +0300, Imre Deak wrote:
> Add helpers drivers can use to calculate the BW allocation overhead -
> due to SSC, FEC, DSC and data alignment on symbol cycles - and the
> channel coding efficiency - due to the 8b/10b, 128b/132b encoding. On
> 128b/132b links the FEC
I've re-written the error handling but the bug is that if init_imstt()
fails we need to call iounmap(par->cmap_regs).
Fixes: c75f5a550610 ("fbdev: imsttfb: Fix use after free bug in imsttfb_probe")
Signed-off-by: Dan Carpenter
---
drivers/video/fbdev/imsttfb.c | 29 -
The init_imstt() function calls framebuffer_release() on error and then
the probe() function calls it again. It should only be done in probe.
Fixes: 518ecb6a209f ("fbdev: imsttfb: Fix error path of imsttfb_probe()")
Signed-off-by: Dan Carpenter
---
drivers/video/fbdev/imsttfb.c | 6 +-
1
On Fri, 27 Oct 2023 12:01:32 +0200
Sebastian Wick wrote:
> On Fri, Oct 27, 2023 at 10:59:25AM +0200, Michel Dänzer wrote:
> > On 10/26/23 21:25, Alex Goins wrote:
> > > On Thu, 26 Oct 2023, Sebastian Wick wrote:
> > >> On Thu, Oct 26, 2023 at 11:57:47AM +0300, Pekka Paalanen wrote:
> > >>>
Since drm_get_format_info() may return NULL, so a judgement of return
value is needed to add.
Signed-off-by: Peng Hao
---
drivers/gpu/drm/drm_framebuffer.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/drm_framebuffer.c
b/drivers/gpu/drm/drm_framebuffer.c
index
On 10/26/23 22:44, chentao wrote:
From: Kunwu Chan
There is a typo in the kernel documentation for function
drm_atomic_helper_wait_for_dependencies. Fix it.
Signed-off-by: Kunwu Chan
Applied, thanks!
---
drivers/gpu/drm/drm_atomic_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2
Hi Christian,
On Fri, 27 Oct 2023 11:06:44 +0200
Christian König wrote:
> Am 27.10.23 um 10:22 schrieb Boris Brezillon:
> > On Fri, 27 Oct 2023 09:44:13 +0200
> > Christian König wrote:
> >
> >> Am 27.10.23 um 09:39 schrieb Boris Brezillon:
> >>> On Fri, 27 Oct 2023 09:35:01 +0200
> >>>
On Fri, Oct 27, 2023 at 10:59:25AM +0200, Michel Dänzer wrote:
> On 10/26/23 21:25, Alex Goins wrote:
> > On Thu, 26 Oct 2023, Sebastian Wick wrote:
> >> On Thu, Oct 26, 2023 at 11:57:47AM +0300, Pekka Paalanen wrote:
> >>> On Wed, 25 Oct 2023 15:16:08 -0500 (CDT)
> >>> Alex Goins wrote:
> >>>
>
On Thu, 26 Oct 2023, Emil Abildgaard Svendsen wrote:
> Currently reading EDID only works because usually only two EDID blocks
> of 128 bytes is used. Where an EDID segment holds 256 bytes or two EDID
> blocks. And the first EDID segment read works fine but E-EDID specifies
> up to 128 segments.
>
On Thu, Oct 26, 2023 at 11:49:00AM -0300, Fabio Estevam wrote:
> Hi Emil,
>
> On Thu, Oct 26, 2023 at 11:47 AM Emil Abildgaard Svendsen
> wrote:
> >
> > Currently reading EDID only works because usually only two EDID blocks
> > of 128 bytes is used. Where an EDID segment holds 256 bytes or two
On Thu, Oct 26, 2023 at 09:11:53PM +0200, Frieder Schrempf wrote:
> [You don't often get email from frieder.schre...@kontron.de. Learn why this
> is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> On 26.10.23 13:30, Emil Abildgaard Svendsen wrote:
> > [Sie erhalten nicht häufig
Jocelyn Falempe writes:
> Hi,
>
> On 21/10/2023 00:52, Javier Martinez Canillas wrote:
>> Avoid a possible uninitialized use of the crtc_state variable in function
>> ssd132x_primary_plane_atomic_check() and avoid the following Smatch warn:
>>
>> drivers/gpu/drm/solomon/ssd130x.c:921
>>
Rob Herring writes:
> On Sat, 21 Oct 2023 00:30:17 +0200, Javier Martinez Canillas wrote:
>> This is a leftover from when the binding schema had the compatible string
>> property enum as a 'oneOf' child and the '-' was not removed when 'oneOf'
>> got dropped during the binding review process.
>>
In order to introduce a pwm api which can be used from atomic context,
we will need two functions for applying pwm changes:
int pwm_apply_cansleep(struct pwm *, struct pwm_state *);
int pwm_apply_atomic(struct pwm *, struct pwm_state *);
This commit just deals with renaming
Am 27.10.23 um 10:22 schrieb Boris Brezillon:
On Fri, 27 Oct 2023 09:44:13 +0200
Christian König wrote:
Am 27.10.23 um 09:39 schrieb Boris Brezillon:
On Fri, 27 Oct 2023 09:35:01 +0200
Christian König wrote:
Am 27.10.23 um 09:32 schrieb Boris Brezillon:
On Fri, 27 Oct 2023 09:22:12
On 10/26/23 21:25, Alex Goins wrote:
> On Thu, 26 Oct 2023, Sebastian Wick wrote:
>> On Thu, Oct 26, 2023 at 11:57:47AM +0300, Pekka Paalanen wrote:
>>> On Wed, 25 Oct 2023 15:16:08 -0500 (CDT)
>>> Alex Goins wrote:
>>>
Despite being programmable, the LUTs are updated in a manner that is
Hi Danilo,
On Thu, 26 Oct 2023 18:13:00 +0200
Danilo Krummrich wrote:
> Currently, job flow control is implemented simply by limiting the number
> of jobs in flight. Therefore, a scheduler is initialized with a credit
> limit that corresponds to the number of jobs which can be sent to the
>
On Fri, 27 Oct 2023 09:44:13 +0200
Christian König wrote:
> Am 27.10.23 um 09:39 schrieb Boris Brezillon:
> > On Fri, 27 Oct 2023 09:35:01 +0200
> > Christian König wrote:
> >
> >> Am 27.10.23 um 09:32 schrieb Boris Brezillon:
> >>> On Fri, 27 Oct 2023 09:22:12 +0200
> >>> Christian König
Hi,
On 21/10/2023 00:52, Javier Martinez Canillas wrote:
Avoid a possible uninitialized use of the crtc_state variable in function
ssd132x_primary_plane_atomic_check() and avoid the following Smatch warn:
drivers/gpu/drm/solomon/ssd130x.c:921 ssd132x_primary_plane_atomic_check()
Hi David, Daniel,
On Tue, Oct 24, 2023 at 12:08 PM Geert Uytterhoeven
wrote:
> On Mon, Oct 16, 2023 at 11:59 AM Geert Uytterhoeven
> wrote:
> > The following changes since commit 389af786f92ecdff35883551d54bf4e507ffcccb:
> >
> > Merge tag 'drm-intel-next-2023-09-29' of
> >
On Thu, 2023-10-26 at 10:18 +0530, Vijayanand Jitta wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>
>
> On 10/20/2023 3:29 PM, Yong Wu (吴勇) wrote:
> > On Thu, 2023-10-19 at 10:15 +0530, Vijayanand Jitta
Am 27.10.23 um 09:39 schrieb Boris Brezillon:
On Fri, 27 Oct 2023 09:35:01 +0200
Christian König wrote:
Am 27.10.23 um 09:32 schrieb Boris Brezillon:
On Fri, 27 Oct 2023 09:22:12 +0200
Christian König wrote:
+
+ /**
+* @update_job_credits: Called once the scheduler is
On Fri, 27 Oct 2023 09:35:01 +0200
Christian König wrote:
> Am 27.10.23 um 09:32 schrieb Boris Brezillon:
> > On Fri, 27 Oct 2023 09:22:12 +0200
> > Christian König wrote:
> >
> >>> +
> >>> + /**
> >>> + * @update_job_credits: Called once the scheduler is considering this
> >>> + * job for
Am 27.10.23 um 09:32 schrieb Boris Brezillon:
On Fri, 27 Oct 2023 09:22:12 +0200
Christian König wrote:
+
+ /**
+* @update_job_credits: Called once the scheduler is considering this
+* job for execution.
+*
+* Drivers may use this to update the job's
On Fri, 27 Oct 2023 09:22:12 +0200
Christian König wrote:
> > +
> > + /**
> > +* @update_job_credits: Called once the scheduler is considering this
> > +* job for execution.
> > +*
> > +* Drivers may use this to update the job's submission credits, which is
> > +* useful to
Add panel identification entry for
- AUO B116XTN02 family (product ID:0x235c)
- BOE NT116WHM-N21,836X2 (product ID:0x09c3)
- BOE NV116WHM-N49 V8.0 (product ID:0x0979)
Signed-off-by: Sheng-Liang Pan
---
drivers/gpu/drm/panel/panel-edp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
Am 26.10.23 um 18:13 schrieb Danilo Krummrich:
Currently, job flow control is implemented simply by limiting the number
of jobs in flight. Therefore, a scheduler is initialized with a credit
limit that corresponds to the number of jobs which can be sent to the
hardware.
This implies that for
drm-misc-next-2023-10-27:
drm-misc-next for v6.7-rc1:
drm-misc-next-2023-10-19 + following:
UAPI Changes:
Cross-subsystem Changes:
- Convert fbdev drivers to use fbdev i/o mem helpers.
Core Changes:
- Use cross-references for macros in docs.
- Make drm_client_buffer_addb use addfb2.
- Add
Hi Danilo,
On Thu, 26 Oct 2023 18:13:00 +0200
Danilo Krummrich wrote:
> +
> + /**
> + * @update_job_credits: Called once the scheduler is considering this
> + * job for execution.
> + *
> + * Drivers may use this to update the job's submission credits, which is
> +
Hi Danilo,
On Tue, 24 Oct 2023 00:57:47 +0200
Danilo Krummrich wrote:
> > > +
> > > + /**
> > > + * @update_job_credits: Called once the scheduler is considering this
> > > + * job for execution.
> > > + *
> > > + * Drivers may use this to update the job's submission credits, which is
> > >
On Thu, 26 Oct 2023, Zhanjun Dong wrote:
> gt wedged is fatal error, skip the pxp init on this situation.
More information is needed in the commit message. When do you encounter
this situation?
I'll note that nobody checks intel_pxp_init() return status, so this
silently skips PXP.
BR,
Jani.
Am 26.10.23 um 21:32 schrieb Alex Deucher:
On Thu, Oct 26, 2023 at 1:45 PM Luben Tuikov wrote:
Update the GPU Scheduler maintainer email.
Cc: Alex Deucher
Cc: Christian König
Cc: Daniel Vetter
Cc: Dave Airlie
Cc: AMD Graphics
Cc: Direct Rendering Infrastructure - Development
The pull request you sent on Fri, 27 Oct 2023 16:15:45 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2023-10-27
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/750b95887e567848ac2c851dae47922cac6db946
Thank you!
--
Deet-doot-dot, I am a bot.
Hi Linus,
This is the final set of fixes for 6.6, just misc bits mainly in
amdgpu and i915, nothing too noteworthy.
Dave.
drm-fixes-2023-10-27:
drm fixes for 6.6 final
amdgpu:
- ignore duplicated BOs in CS parser
- remove redundant call to amdgpu_ctx_priority_is_valid()
- Extend VI APSM quirks
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