On Sat, 5 Apr 2025 at 15:34, Linus Torvalds
wrote:
>
> Does any of this happen to fix this (repeated a couple of hundred
> times each time):
>
> [drm] scheduler comp_1.1.1 is not ready, skipping
> [drm] scheduler comp_1.3.0 is not ready, skipping
> [drm] scheduler comp_1.0.1 is not ready, sk
The pull request you sent on Sun, 6 Apr 2025 07:51:03 +1000:
> https://gitlab.freedesktop.org/drm/kernel.git tags/drm-next-2025-04-05
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/758e4c86a159bdd67a8ef60ea118ddb8b2043714
Thank you!
--
Deet-doot-dot, I am a bot.
htt
I was going to report this separately, but then the pull came in, so
I'm just replying to that one instead...
On Sat, 5 Apr 2025 at 14:51, Dave Airlie wrote:
>
> amdgpu:
Does any of this happen to fix this (repeated a couple of hundred
times each time):
[drm] scheduler comp_1.1.1 is not ready
(resend including Linus this time, autocomplete picked the mailing list)
Hi Linus,
Weekly fixes, mostly from the end of last week, this week was very
quiet, maybe you scared everyone away. I probably should have
highlighted Jani's work more closely, but it never occured that anyone
would willingi
The balloon nodes used to fill areas of GGTT inaccessible for
a specific VF, were allocaten and inserted into GGTT within
one function. This disallowed re-using the insertion part
during VF migration recovery.
This patch separates allocation (init/fini functs) from the insertion
of balloons (ballo
On 3/31/25 10:12, Shengyu Qu wrote:
So currently we have to hope the compositor won't use
DRM_PLANE_TYPE_CURSOR planes at all Why do we still register
DRM_PLANE_TYPE_CURSOR in the driver?
I am not sure what your question is. A compositor can choose or skip any
hardware features, but th
Add perf_pmus__scan_for_event that only reads sysfs for pmus that
could contain a given event.
Signed-off-by: Ian Rogers
---
tools/perf/util/parse-events.c | 4 ++--
tools/perf/util/pmus.c | 35 ++
tools/perf/util/pmus.h | 1 +
3 files changed, 3
Hi Sumit,
On Tue, Mar 25, 2025 at 7:50 AM Sumit Garg wrote:
>
> Hi Jens,
>
> On Wed, Mar 05, 2025 at 02:04:12PM +0100, Jens Wiklander wrote:
> > From: Etienne Carriere
> >
> > Enable userspace to create a tee_shm object that refers to a dmabuf
> > reference.
> >
> > Userspace registers the dmabu
On 3/31/25 12:53, Xaver Hugl wrote:
Cursor plane has no color pipeline and thus it has no colorop either. It
inherits color processing from its parent plane.
Just to be sure: That means amdgpu will reject atomic commits that try
to set a color pipeline on the primary plane while showing the
Am 03.04.25 um 12:25 schrieb Danilo Krummrich:
> On Thu, Apr 03, 2025 at 12:17:29PM +0200, Philipp Stanner wrote:
>> On Thu, 2025-04-03 at 12:13 +0200, Philipp Stanner wrote:
>>> -static int
>>> -nouveau_fence_signal(struct nouveau_fence *fence)
>>> +static void
>>> +nouveau_fence_cleanup_cb(struct
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-samsung-s6d27a1.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d27a1.c
b/drivers/gpu/dr
On 01/04/2025 18:03, Anusha Srivatsa wrote:
Start converting drivers to use the API - devm_drm_panel_alloc().
This series addresses only 10 drivers. There are 98 more to go. Sending this
series to mostly get feedback. if any change is required, it will be
incorporated in the next version and in
With more than two firmware processor types, the if/else chain in
pvr_fw_init() gets a bit ridiculous. Use a static array indexed on
pvr_fw_processor_type (which is now a proper enum instead of #defines)
instead.
Signed-off-by: Matt Coster
---
Changes in v5:
- None
- Link to v4:
https://lore.ker
etnaviv has 5 DRM_UT_CORE debugs, make them controllable when
CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg that the module has
class'd debugs as well as plain-old pr_debug()s
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --g
The problem is that the bitwise OR operation has higher precedence than
the ternary expression. The existing code will either set
HPO_I, VPO_I, or "mode->clock >> 16" but not a combination of the three
which is what we want.
Fixes: e7f12054a1b9 ("drm/bridge: chrontel-ch7033: Add a new driver")
Si
Or we can add some kind of "linked with" info to plane's COLOR_PIPELINE
property, to let userspace know that cursor plane and background plane
share the same colorop config. So that userspace could do extra
conversion on cursor image data to avoid display wrong cursor color.
在 2025/4/1 0:50, S
DRM clients expose information through usage stats as documented in
Documentation/gpu/drm-usage-stats.rst (available online at
https://docs.kernel.org/gpu/drm-usage-stats.html). Add a tool like
PMU, similar to the hwmon PMU, that exposes DRM information.
v3: Minor tweak to the test so the skip (ex
On 25/03/2025 17:35, Krzysztof Kozlowski wrote:
> On 25/03/2025 16:57, Alexander Baransky wrote:
>> The Visionox G2647FB105 is a 6.47 inch 1080x2340 MIPI-DSI CMD mode
>
>
> "Add a DT binding for the Visionox."
>
>> AMOLED panel used in:
>> - Xiaomi Mi Note 10 / CC9 Pro (sm7150-xiaomi-tucana)
The page fault handler should reject write/atomic access to read only
VMAs. Add code to handle this in handle_pagefault after the VMA lookup.
Fixes: 3d420e9fa848 ("drm/xe: Rework GPU page fault handling")
Signed-off-by: Jonathan Cavitt
Suggested-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_gt_p
Hi Maxime,
On 03/04/25 10:33, Maxime Ripard wrote:
vc4_mock_atomic_add_output() and vc4_mock_atomic_del_output() are public
but aren't documented. Let's provide the documentation.
In particular, special care should be taken to deal with EDEADLK.
Signed-off-by: Maxime Ripard
Reviewed-by: Maí
The driver uses crtc_* fields from the mode. While I think in the
enable-path this would be correct, I do not think it's correct in the
check phase, as the crtc hasn't had a chance to update the crtc_* fields
yet.
Overall, my understanding is that the crtc_* fields are relevant only in
cases where
Hi Maxime,
On 03/04/25 10:33, Maxime Ripard wrote:
Some functions used by the HVS->PV muxing tests can return with EDEADLK,
meaning the entire sequence should be restarted. It's not a fatal error
and we should treat it as a recoverable error, and recover, instead of
failing the test like we curr
On 3/24/25 16:05, Christian König wrote:
> Am 22.03.25 um 22:25 schrieb Dmitry Osipenko:
>> Make drm/gem API function names consistent by having locked function
>> use the _locked postfix in the name, while the unlocked variants don't
>> use the _unlocked postfix. Rename drm_gem_v/unmap() function
On 3/25/25 3:35 PM, Boris Brezillon wrote:
On Tue, 25 Mar 2025 14:50:32 +0100
Marek Vasut wrote:
On 3/25/25 8:43 AM, Boris Brezillon wrote:
On Tue, 25 Mar 2025 00:37:59 +0100
Marek Vasut wrote:
On 3/24/25 9:43 AM, Boris Brezillon wrote:
[...]
@@ -563,6 +585,7 @@ int panthor_device_
Hi
Am 26.03.25 um 03:14 schrieb Adrián Larumbe:
This patch series is a proposal for implementing sparse page allocations
for shmem objects. It was initially motivated by a kind of BO managed by
the Panfrost driver, the tiler heap, which grows on demand every time the
GPU faults on a virtual addr
Align with 20250403173614.67195-4-jonathan.cav...@intel.com
Add initial declarations for the xe_vm_get_property_ioctl call, including
necessary structures and IOCTL macros.
v2:
- Remove engine class and instance (Ivan)
v3:
- Add declares for fault type, access type, and fault level (Matt Brost,
From: Philip Yang
[ Upstream commit f0b4440cdc1807bb6ec3dce0d6de81170803569b ]
If HW scheduler hangs and mode1 reset is used to recover GPU, KFD signal
user space to abort the processes. After process abort exit, user queues
still use the GPU to access system memory before h/w is reset while KFD
Following the dyndbg-api-fix, replace DECLARE_DYNDBG_CLASSMAP with
DRM_CLASSMAP_USE. This refs the defined & exported classmap, rather
than re-declaring it redundantly, and error-prone-ly.
This resolves the appearance of "class:_UNKNOWN_" in the control file
for the driver's drm_dbg()s.
Fixes: f
Am 21.03.25 um 17:41 schrieb Xiaogang.Chen:
> From: Xiaogang Chen
>
> by casting size_limit_mb to u64 when calculate pglimit.
>
> Signed-off-by: Xiaogang Chen
Reviewed-by: Christian König
If nobody objects I'm going to push that to drm-misc-fixes.
Regards,
Christian.
> ---
> drivers/dma-buf
Hi
Am 03.04.25 um 02:37 schrieb Lucas De Marchi:
On Sun, Mar 23, 2025 at 12:25:58AM +0300, Dmitry Osipenko wrote:
Hi,
This a continuation of a year-old series that adds generic DRM-shmem
shrinker [1]. The old series became too big with too many patches, more
reasonable to split it up into mult
…
> Fix this by reordering the dereference after the sanity checks.
Can my previous patch review contribution trigger more desirable collateral
evolution
also for this development topic?
https://lore.kernel.org/all/6f01f71b-284b-4841-bda9-a3934cb4e...@web.de/
https://lkml.org/lkml/2025/3/10/696
From: Sarah Walker
Newer PowerVR GPUs (such as the BXS-4-64 MC1) use a RISC-V firmware
processor instead of the previous MIPS or META.
The current version of this patch depends on a patch[1] which exists in
drm-misc-fixes, but has not yet made it back to drm-misc-next (the
target of this patch).
On 21/03/2025 20:05, Marek Vasut wrote:
> The driver code power domain binding to driver instances only works
> for single power domain, in case there are multiple power domains,
> it is necessary to explicitly attach via dev_pm_domain_attach*().
> As DT bindings list support for up to 5 power doma
On Thu, Mar 20, 2025 at 02:00:57PM +0100, Jens Wiklander wrote:
> Hi Sumit,
>
> On Thu, Mar 20, 2025 at 10:25 AM Sumit Garg wrote:
> >
> > Hi Jens,
> >
> > On Mon, Mar 17, 2025 at 08:42:01AM +0100, Jens Wiklander wrote:
> > > Hi Sumit,
> > >
> > > On Thu, Mar 13, 2025 at 11:41 AM Sumit Garg wrot
From: Alex Hung
[ Upstream commit ea79068d4073bf303f8203f2625af7d9185a1bc6 ]
[WHAT & HOW]
A denominator cannot be 0, and is checked before used.
This fixes 2 DIVIDE_BY_ZERO issues reported by Coverity.
Reviewed-by: Harry Wentland
Signed-off-by: Jerry Zuo
Signed-off-by: Alex Hung
Tested-by:
Hello Maxime,
On Fri, 21 Mar 2025 09:54:55 +
"Maxime Ripard" wrote:
> On Thu, 20 Mar 2025 16:42:11 +0100, Luca Ceresoli wrote:
> > DRM bridges are currently considered as a fixed element of a DRM card, and
> > thus their lifetime is assumed to extend for as long as the card
> > exists. New u
Am 18.03.25 um 20:22 schrieb Daniel Almeida:
> From: Asahi Lina
>
> Since commit 21aa27ddc582 ("drm/shmem-helper: Switch to reservation
> lock"), the drm_gem_shmem_vmap and drm_gem_shmem_vunmap functions
> require that the caller holds the DMA reservation lock for the object.
> Add lockdep asserti
On Tue, 18 Mar 2025 14:34:35 +0800, Andy Yan wrote:
> The helper functions drm_dp_link_power_up/down were moved to Tegra
> DRM in commit 9a42c7c647a9 ("drm/tegra: Move drm_dp_link helpers to Tegra
> DRM")".
>
> Now since more and more users are duplicating the same code in their
> own drivers, it
Applied. Thanks!
Alex
On Thu, Mar 27, 2025 at 11:37 PM James Flowers
wrote:
>
> Removed unused function mpc401_get_3dlut_fast_load_status.
>
> Signed-off-by: James Flowers
> ---
> drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 17 -
> .../drm/amd/display/dc/mpc/dcn401/dcn40
> On Fri, Mar 28, 2025 at 02:59:15PM +0530, Arun R Murthy wrote:
> > The function pointer can_async_flip() checks for async supported
> > modifier, add format support check also in the same function.
> >
> > Signed-off-by: Arun R Murthy
> > ---
> > drivers/gpu/drm/i915/display/i9xx_plane.c
From: Rob Clark
Buffers that are not shared between contexts can share a single resv
object. This way drm_gpuvm will not track them as external objects, and
submit-time validating overhead will be O(1) for all N non-shared BOs,
instead of O(n).
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm
Mark engines as invalid when they are not added to the UABI list
to prevent accidental assignment of batch buffers.
Currently, this change is mostly precautionary with minimal
impact. However, in the future, when CCS engines will be
dynamically added and removed by the user, this mechanism will
be
On Sun, Mar 30, 2025 at 05:31:20PM +0100, Christopher Obbard wrote:
> According to the eDP specification (VESA Embedded DisplayPort Standard
> v1.4b, Section 3.3.10.2), if the value of DP_EDP_PWMGEN_BIT_COUNT is
> less than DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, the sink is required to use
> the MIN valu
在 2025/4/1 1:42, Alex Hung 写道:
On 3/31/25 11:04, Shengyu Qu wrote:
Or we can add some kind of "linked with" info to plane's
COLOR_PIPELINE property, to let userspace know that cursor plane and
background plane share the same colorop config. So that userspace
could do extra conversion on cu
drm_dp_dpcd_write_data() can be used to write the GUID for a non-root
MST branch device, similarly to writing the GUID to a root MST branch
device, do so.
Cc: Dmitry Baryshkov
Cc: Lyude Paul
Signed-off-by: Imre Deak
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 17 +++--
1 fi
Matthew Wilcox (Oracle) wrote:
> The migration code used to be able to migrate dirty 9p folios by writing
> them back using writepage. When the writepage method was removed,
> we neglected to add a migrate_folio method, which means that dirty 9p
> folios have been unmovable ever since. This red
From: Andy Yan
The DP0 is compliant with the DisplayPort Specification
Version 1.4, and share the USBDP combo PHY0 with USB 3.1
HOST0 controller.
Signed-off-by: Andy Yan
---
(no changes since v1)
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 +++
1 file changed, 30 inser
Hi,
On Mon, Mar 24, 2025 at 1:31 PM Anusha Srivatsa wrote:
>
> Move away from using deprecated API and use _multi
> variants if available. Use mipi_dsi_msleep()
> and mipi_dsi_usleep_range() instead of msleep()
> and usleep_range() respectively.
>
> Used Coccinelle to find the _multi variant APIs
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-ebbg-ft8719.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-ebbg-ft8719.c
b/drivers/gpu/drm/panel/
From: Philip Yang
[ Upstream commit 7919b4cad5545ed93778f11881ceee72e4dbed66 ]
If GPU in reset, destroy_queue return -EIO, pqm_destroy_queue should
delete the queue from process_queue_list and free the resource.
Signed-off-by: Philip Yang
Reviewed-by: Felix Kuehling
Signed-off-by: Alex Deuche
On Wed, Dec 11, 2024 at 01:06:17AM +0200, Cristian Ciocaltea wrote:
> Add the necessary DT changes to enable the second HDMI output port on
> Radxa ROCK 5B.
>
> While at it, switch the position of &vop_mmu and @vop to maintain the
> alphabetical order.
We're seeing failures in the Arm lab the IGT
The RPF module on VSDP supports various format conversion and send the
image data to BRS(Blend ROP Sub Unit) for further processing.
The rzg2l_du_kms component lists a restricted subset of the capabilities
of the VSPD which prevents additional formats from being used for
display planes.
Extend RZ
Use the crtc_* fields from drm_display_mode, instead of the "logical"
fields. This shouldn't change anything in practice, but afaiu the crtc_*
fields are the correct ones to use here.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/tidss/tidss_crtc.c | 2 +-
drivers/gpu/drm/tidss/tidss_dispc
From: AngeloGioacchino Del Regno
[ Upstream commit 473c33f5ce651365468503c76f33158aaa1c7dd2 ]
In preparation for adding support for MT8195's HDMI reserved
DPI, add calls to clk_prepare_enable() / clk_disable_unprepare()
for the TVD clock: in this particular case, the aforementioned
clock is not
On Tue, 18 Mar 2025 14:55:55 +, Brendan King wrote:
> Free the memory used to hold the results of firmware image processing
> when the module is unloaded.
>
> Fix the related issue of the same memory being leaked if processing
> of the firmware image fails during module load.
>
> Ensure all
virtio_gpu has 10 DRM_UT_CORE debugs, make them controllable when
CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg that the module has
class'd debugs.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/virtio/virtgpu_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/virtio/v
Currently, Panfrost only supports MMU configuration in "LEGACY" (as
Bifrost calls it) mode, a (modified) version of LPAE "Large Physical
Address Extension", which in Linux we've called "mali_lpae".
This commit adds support for conditionally enabling AARCH64_4K page
table format. To achieve that, a
The drm_display_mode is a bit difficult one to use (we need hfp, hbp,
... instead of hsync_start, hsync_end, ...) and understand (when to use
crtc_* fields).
To simplify the code, use struct videomode internally which cleans up
the code. If in the future we want to use crtc_* fields in some code
p
On Thu, Mar 06, 2025 at 03:05:49PM +0100, Thomas Zimmermann wrote:
> Move the handling of display updates to separate helper functions.
> There is code for handling fbdev blank events and fbdev mode changes.
> The code currently runs from fbdev event notifiers, which will be
> replaced.
>
> Signed-
On Thu, Mar 06, 2025 at 03:05:46PM +0100, Thomas Zimmermann wrote:
> Look at the blank state provided by FB_EVENT_BLANK to determine
> whether to enable or disable a backlight. Remove the tracking fields
> from struct backlight_device.
>
> Tracking requires three variables, fb_on, prev_fb_on and th
The Cadence DSI requires negative syncs from the incoming video signal,
but at the moment that requirement is not expressed in any way. If the
crtc decides to use positive syncs, things break down.
Use the adjusted_mode in atomic_check to set the sync flags to negative
ones.
Signed-off-by: Tomi V
The sharpness property requires the use of one of the scaler
so need to set the sharpness scaler coefficient values.
These values are based on experiments and vary for different
tap value/win size. These values are normalized by taking the
sum of all values and then dividing each value with a sum.
On 20/03/2025 09:14, Ling Xu wrote:
The fastrpc driver has support for 5 types of remoteprocs. There are
some products which support GPDSP remoteprocs. Add changes to support
GPDSP remoteprocs.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Ling Xu
---
drivers/misc/fastrpc.c | 10 --
This series add support for the ST7571 LCD Controller.
It is a 4 gray scale dot matrix LCD controller that supports several
interfaces such as SPI, I2C and a 8bit parallell port.
This driver only supports the I2C interface, but all common parts could
easily be put into a common file to be used wit
This series addresses GPU reset issues reported in [1], where running a
long compute job would trigger repeated GPU resets, leading to a UI
freeze.
The patches that prevent the same faulty job from being resubmitted in a
loop were merged in drm-misc/drm-misc-fixes in v4.
However, those patches do
From: Rob Clark
If the driver is using an external mutex to synchronize vm access, it
doesn't need to hold vm->r_obj->resv. And if the driver is already
holding obj->resv, then needing to pointlessly grab vm->r_obj->resv will
be seen by lockdep as nested locking.
Signed-off-by: Rob Clark
---
cdns_dsi_mode2cfg() calculates the dsi timings, but for some reason
doesn't set the htotal based on those timings. It is set only later, in
cdns_dsi_adjust_phy_config().
As cdns_dsi_mode2cfg() is the logical place to calculate it, let's move
it there. Especially as the following patch will remove
devm_kasprintf() return NULL if memory allocation fails. Currently,
wled_configure() does not check for this case, leading to a possible NULL
pointer dereference.
Add NULL check after devm_kasprintf() to prevent this issue.
Fixes: f86b77583d88 ("backlight: pm8941: Convert to using %pOFn instead o
Thank you Krzysztof,
I will fix the issues you pointed out, just a few comments below.
On Wed, Apr 02, 2025 at 10:27:53AM +0200, Krzysztof Kozlowski wrote:
> On Wed, Apr 02, 2025 at 08:12:10AM +0200, Marcus Folkesson wrote:
> > Sitronix ST7571 is a 4bit gray scale dot matrix LCD controller.
> > T
Hi Francesco,
On 28/03/25 18:14, Francesco Dolcini wrote:
> Hello Aradhya,
>
> On Wed, Feb 26, 2025 at 11:42:56PM +0530, Aradhya Bhatia wrote:
>> The AM62Px SoC has 2 OLDI TXes like AM62x SoC. However, the AM62Px SoC also
>> has
>> 2 separate DSSes. The 2 OLDI TXes can now be shared between the
On Wed, Apr 02, 2025 at 07:38:52PM +0800, shao.ming...@zte.com.cn wrote:
> From: Zhang Enpei
>
> Replace the open-code with dev_err_probe() to simplify the code.
>
> Signed-off-by: Zhang Enpei
> Signed-off-by: Shao Mingyin
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/xlnx/zynqmp_d
Expose the drm crtc sharpness strength property which will enable
or disable the sharpness/casf based on user input. With this user
can set/update the strength of the sharpness or casf filter.
v2: Update subject[Ankit]
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/intel_crtc.c | 3
Hi Maxime,
On 18/03/25 11:17, Maxime Ripard wrote:
vc4_mock_atomic_add_output() and vc4_mock_atomic_del_output() public but
Nit: s/public/are public
aren't documented. Let's provide the documentation.
In particular, special care should be taken to deal with EDEADLK.
Signed-off-by: Maxime R
From: Baihan Li
Add HPD interrupt enable functions in drm framework, and also add
detect_ctx functions. Because of the debouncing when HPD pulled out,
add 200 ms delay in detect. Add link reset process to reset link status
when a new connector pulgged in.
Signed-off-by: Baihan Li
Signed-off-by:
Hi Sumit,
On Tue, Mar 25, 2025 at 7:33 AM Sumit Garg wrote:
>
> Hi Jens,
>
> On Wed, Mar 05, 2025 at 02:04:11PM +0100, Jens Wiklander wrote:
> > Implement DMA heap for restricted DMA-buf allocation in the TEE
> > subsystem.
> >
> > Restricted memory refers to memory buffers behind a hardware enfo
Add two new pixel formats:
DRM_FORMAT_XV15 ("XV15")
DRM_FORMAT_XV20 ("XV20")
The formats are 2 plane 10 bit per component YCbCr, with the XV15 2x2
subsampled whereas XV20 is 2x1 subsampled.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/drm_fourcc.c | 6 +
Hi!
Second try without attachment.
Youtube link of screen: https://youtu.be/zVbuzxECinI
Am So., 30. März 2025 um 17:30 Uhr schrieb Gon Solo :
>
> Hi!
>
> I bought a Displayport-to-HDMI cable to connect a second monitor to my
> NVIDIA 3060 12GB with three Displayport and one HDMI outputs.
> The fi
On Mon, Mar 24, 2025 at 9:20 AM Louis Chauvet wrote:
>
>
>
> Le 20/03/2025 à 19:52, Jim Cromie a écrit :
> > Current classmap code protects class'd pr_debugs from unintended
> > changes by "legacy" unclassed queries:
> >
> ># this doesn't disable all of DRM_UT_* categories
> >echo "-p" > /
On Wed, Mar 19, 2025 at 5:44 AM Jiri Slaby (SUSE) wrote:
>
> irq_domain_add_linear() is going away as being obsolete now. Switch to
> the preferred irq_domain_create_linear(). That differs in the first
> parameter: It takes more generic struct fwnode_handle instead of struct
> device_node. Therefo
From: Brendan Tam
[ Upstream commit 51d1b338541dea83fec8e6f95d3e46fa469a73a8 ]
[Why]
There have been instances of some monitors being unable to link train on
their reported link speed using their selected FFE preset. If a different
FFE preset is found that has a higher rate of success during lin
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-himax-hx83112a.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-himax-hx83112a.c
b/drivers/gpu/drm/p
Hi,
Another revision after the feedback from Ilpo.
Few tweaks here and there, the biggest change is the removal of the
loop in pci_iov_vf_bar_get_sizes().
v6 can be found here:
https://lore.kernel.org/linux-pci/20250320110854.3866284-1-michal.winiar...@intel.com/
For regular BAR, drivers can use
The J721S2 binding is based on the TI downstream binding in 54b0f2a00d92
("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1] but with updated
compatible strings.
The clock[2] and power[3] indices were verified from docs, but the
source of the interrupt index remains elusive.
[1]: https://gi
On Tue, Mar 25, 2025 at 09:50:35AM +0100, Jens Wiklander wrote:
> On Tue, Mar 25, 2025 at 6:56 AM Sumit Garg wrote:
> >
> > On Thu, Mar 20, 2025 at 02:00:57PM +0100, Jens Wiklander wrote:
> > > Hi Sumit,
> > >
> > > On Thu, Mar 20, 2025 at 10:25 AM Sumit Garg wrote:
> > > >
> > > > Hi Jens,
> > >
On Tue, 1 Apr 2025 at 21:03, Christian König wrote:
>
> Am 31.03.25 um 22:43 schrieb Dave Airlie:
> > On Tue, 11 Mar 2025 at 00:26, Maxime Ripard wrote:
> >> Hi,
> >>
> >> On Mon, Mar 10, 2025 at 03:16:53PM +0100, Christian König wrote:
> >>> [Adding Ben since we are currently in the middle of a
+ Anshuman Khandual, Catalin Marinas, linux-arm-ker...@lists.infradead.org
This series moves GENMASK_U128 out of uapi. ARM is the only proposed
user. Add ARM people for visibility.
Thanks,
Yury
On Sat, Mar 22, 2025 at 07:39:35PM +0900, Vincent Mailhol via B4 Relay wrote:
> This is a subset of be
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-seiko-43wvf1g.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c
b/drivers/gpu/drm/pa
> When devm_kasprintf() fails, it returns a NULL pointer. However, this return
> value is not properly checked in the function wled_configure.
>
> A NULL check should be added after the devm_kasprintf call to prevent
> potential NULL pointer dereference error.
* Please adhere to word wrapping pr
Hi Biju,
Thank you for the patch.
On Sun, Mar 30, 2025 at 11:23:52AM +0100, Biju Das wrote:
> Drop the unused variable bpp from struct rzg2l_du_format_info.
>
> Signed-off-by: Biju Das
Reviewed-by: Laurent Pinchart
> ---
> v2:
> * New patch.
> ---
> drivers/gpu/drm/renesas/rz-du/rzg2l_du_k
On Tue, 25 Mar 2025, Maxime Ripard wrote:
> On Tue, Mar 25, 2025 at 12:47:49PM +0200, Jani Nikula wrote:
>> On Tue, 25 Mar 2025, Maxime Ripard wrote:
>> > On Tue, Mar 25, 2025 at 11:16:47AM +0200, Jani Nikula wrote:
>> >> On Sat, 22 Mar 2025, devbrones wrote:
>> >> > This fixes a bug where some
On Thu, 2025-03-20 at 12:52 -0600, Jim Cromie wrote:
> we currently get:
> WARNING: Argument 'name' is not used in function-like macro
> on:
> #define DRM_CLASSMAP_USE(name) /* nothing here */
>
> Following this advice is wrong here, and shouldn't be fixed by
> ignoring args altogether; the m
This series fixes dynamic-debug's support for DRM debug-categories.
Classmaps-v1 evaded full review, and got committed in 2 chunks:
b7b4eebdba7b..6ea3bf466ac6# core dyndbg changes
0406faf25fb1..ee7d633f2dfb# drm adoption
Then DRM-CI found a regression when booting with drm.debug=;
the
Move to using the new API devm_drm_panel_alloc() to allocate the
panel.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-raydium-rm67191.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-raydium-rm67191.c
b/drivers/gpu/drm
drm_panic draws in linear framebuffer, so it's easier to re-use the
current framebuffer, and disable tiling in the panic handler, to show
the panic screen.
Signed-off-by: Jocelyn Falempe
---
.../drm/i915/display/skl_universal_plane.c| 20 +++
1 file changed, 20 insertions(+)
Start converting drivers to use the API - devm_drm_panel_alloc().
Sending next 30 drivers. Sending in batches for easier review.
Signed-off-by: Anusha Srivatsa
---
Anusha Srivatsa (30):
panel/panel-elida-kd35t133: Refcounted allocation
panel/elida-kd35t133: Use refcounted allocation
Use the new compatible string introduced earlier (in "dt-bindings: gpu:
img: More explicit compatible strings") and add a name to the single power
domain for this GPU (introduced in "dt-bindings: gpu: img: Power domain
details").
Signed-off-by: Matt Coster
---
Changes in v4:
- None
- Link to v3:
Hi,
On 29/03/2025 13:53, Aradhya Bhatia wrote:
Now that the bridges get pre-enabled before the CRTC is enabled, and get
post-disabled after the CRTC is disabled, update the function
descriptions to accurately reflect the updated scenario.
The enable sequence for the display pipeline looks like:
The driver tries to calculate the value for REG_WAKEUP_TIME. However,
the calculation itself is not correct, and to add on it, the resulting
value is almost always larger than the field's size, so the actual
result is more or less random.
According to the docs, figuring out the value for REG_WAKEU
Hi,
This a continuation of a year-old series that adds generic DRM-shmem
shrinker [1]. The old series became too big with too many patches, more
reasonable to split it up into multiple smaller patchsets. Here is
the firtst part that makes preparatory DRM changes.
[1]
https://lore.kernel.org/dri
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