On 4/17/2025 4:10 PM, Dmitry Baryshkov wrote:
> On Thu, Apr 17, 2025 at 11:09:05AM +0530, Ayushi Makhija wrote:
>> From: Ayushi Makhija
>>
>> Add anx7625 DSI to DP bridge device nodes.
>>
>> Signed-off-by: Ayushi Makhija
>> ---
>> arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 180
cc'ing PCI devs
Am 17.04.25 um 09:27 schrieb Thomas Zimmermann:
Apply bridge window offsets to screen_info framebuffers during
relocation. Fixes invalid access to I/O memory.
Resources behind a PCI bridge can be located at a certain offset
in the kernel's I/O range. The framebuffer memory range
This is a note to let you know that I've just added the patch titled
drm/mgag200: Fix value in register
to the 6.12-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-mgag200-fix-va
This is a note to let you know that I've just added the patch titled
drm/mgag200: Fix value in register
to the 6.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-mgag200-fix-va
This is a note to let you know that I've just added the patch titled
drm/ast: Fix ast_dp connection status
to the 6.12-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-ast-fix-ast_
> > diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.c
> > b/drivers/gpu/drm/virtio/virtgpu_drv.c
> > index e32e680c7197..71c6ccad4b99 100644
> > --- a/drivers/gpu/drm/virtio/virtgpu_drv.c
> > +++ b/drivers/gpu/drm/virtio/virtgpu_drv.c
> > @@ -130,10 +130,10 @@ static void virtio_gpu_remove(struct
This is a note to let you know that I've just added the patch titled
drm/ast: Fix ast_dp connection status
to the 6.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-ast-fix-ast_
On Thu, 2025-04-17 at 17:08 +0100, Tvrtko Ursulin wrote:
>
> On 17/04/2025 15:48, Danilo Krummrich wrote:
> > On Thu, Apr 17, 2025 at 03:20:44PM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 17/04/2025 13:11, Danilo Krummrich wrote:
> > > > On Thu, Apr 17, 2025 at 12:27:29PM +0100, Tvrtko Ursulin w
On Fri, 2025-04-18 at 12:32 +0100, Tvrtko Ursulin wrote:
> Quick sketch idea for an alternative to
> https://lore.kernel.org/dri-devel/20250407152239.34429-2-pha...@kernel.org/
> .
>
> It is possible it achieves the same effect but with less code and not
> further growing the internal state machin
On 4/17/2025 4:10 PM, Dmitry Baryshkov wrote:
> On Thu, Apr 17, 2025 at 11:09:05AM +0530, Ayushi Makhija wrote:
>> From: Ayushi Makhija
>>
>> Add anx7625 DSI to DP bridge device nodes.
>>
>> Signed-off-by: Ayushi Makhija
>> ---
>> arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 180
> -Original Message-
> From: Intel-xe On Behalf Of Arun R
> Murthy
> Sent: Thursday, April 17, 2025 4:23 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Cc: Govindapillai, Vinod ; Deak, Imre
> ; Murthy, Arun R
> Subject: [
Hi Huan,
> Subject: [PATCH 2/2] udmabuf: fix vmap missed offset page
>
> Before invoke vmap, we need offer a pages pointer array which each page
> need to map in vmalloc area.
>
> But currently vmap_udmabuf only set each folio's head page into pages,
> missed each offset pages when iter.
>
> Th
Hi Huan,
> Subject: [PATCH 1/2] Revert "udmabuf: fix vmap_udmabuf error page set"
>
> This reverts commit 18d7de823b7150344d242c3677e65d68c5271b04.
>
> This given a misuse of vmap_pfn, vmap_pfn only allow none-page based
> user invoke, i.e. PCIe BARs and other.
The commit message can be improved
> -Original Message-
> From: Intel-gfx On Behalf Of Arun R
> Murthy
> Sent: Thursday, April 17, 2025 4:22 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Cc: Govindapillai, Vinod ; Deak, Imre
> ; Murthy, Arun R
> Subject:
> -Original Message-
> From: Govindapillai, Vinod
> Sent: Tuesday, April 22, 2025 4:17 AM
> To: Murthy, Arun R ; dri-
> de...@lists.freedesktop.org; intel...@lists.freedesktop.org; intel-
> g...@lists.freedesktop.org
> Cc: Deak, Imre
> Subject: Re: [PATCH v3 3/3] drm/i915/display: move m
In _hl_mmu_v2_hr_map(), If hl_mmu_get_hop_pte_phys_addr() fail to
get physical address, the return address will be set as U64_MAX.
Hence, the return value of hl_mmu_get_hop_pte_phys_addr() must
be checked to prevent invalid address access. Add error handling
and propagate return code to caller func
https://bugzilla.kernel.org/show_bug.cgi?id=220043
Bug ID: 220043
Summary: Geforce 210 video does not work with nouveau drivers
in 6.14.0 and later.
Product: Drivers
Version: 2.5
Hardware: All
OS: Linux
The dp_perform_128b_132b_channel_eq_done_sequence() calls
dp_get_lane_status_and_lane_adjust() but lacks dp_decide_lane_settings().
The dp_get_lane_status_and_lane_adjust() and dp_decide_lane_settings()
functions are essential for DisplayPort link training in the Linux kernel,
with the former retri
From: Lijo Lazar
[ Upstream commit c235a7132258ac30bd43d228222986022d21f5de ]
There are a few prechecks made before HDP flush like a flush is not
required on APU bare metal. Using hdp callback directly bypasses those
checks. Use amdgpu_device_flush_hdp which takes care of prechecks.
Signed-off-
From: Christian König
[ Upstream commit 447fab30955cf7dba7dd563f42b67c02284860c8 ]
Otherwise triggering sysfs multiple times without other submissions in
between only runs the shader once.
v2: add some comment
v3: re-add missing cast
v4: squash in semicolon fix
Signed-off-by: Christian König
From: Lijo Lazar
[ Upstream commit c235a7132258ac30bd43d228222986022d21f5de ]
There are a few prechecks made before HDP flush like a flush is not
required on APU bare metal. Using hdp callback directly bypasses those
checks. Use amdgpu_device_flush_hdp which takes care of prechecks.
Signed-off-
From: Mario Limonciello
[ Upstream commit 1657793def101dac7c9d3b2250391f6a3dd934ba ]
On systems that default to 'deep' some userspace software likes
to try to suspend in 'deep' first. If there is a failure for any
reason (such as -ENOMEM) the failure is ignored and then it will
try to use 's2id
From: Christian König
[ Upstream commit 447fab30955cf7dba7dd563f42b67c02284860c8 ]
Otherwise triggering sysfs multiple times without other submissions in
between only runs the shader once.
v2: add some comment
v3: re-add missing cast
v4: squash in semicolon fix
Signed-off-by: Christian König
On Mon, Dec 16, 2024 at 09:54:10AM +0100, Andrej Picej wrote:
> Set custom differential output voltage for LVDS, to fulfill requirements
> of the connected display. LVDS differential voltage for data-lanes and
> clock output has to be between 200 mV and 600 mV.
> Driver sets 200 Ohm near-end termin
On Mon, Apr 21, 2025 at 1:40 PM T.J. Mercier wrote:
>
> > > new file mode 100644
> > > index ..b4b8be1d6aa4
> > > --- /dev/null
> > > +++ b/kernel/bpf/dmabuf_iter.c
> >
> > Maybe we should add this file to drivers/dma-buf. I would like to
> > hear other folks thoughts on this.
>
> This
Hi Arun
I was trying to use this series for the underrun issue! But this patch didnt
apply cleanly!
And had some compilation issues because of an unused variable!
Also I did not get expected traces on min hblank! Not sure if there was any
issue on my conflicts
resolution to get this applied on m
Arnd --
Your commit a07b50d80ab62 ("hyperv: avoid dependency on screen_info") [1]
introduced a subtle bug. The commit message says, in part:
Similarly, the vmbus_drv code marks the original EFI framebuffer as
reserved, but this is not required if there is no sysfb.
This statement turns out
GCC really does not want to consider NULL (or near-NULL) addresses as
valid, so calculations based off of NULL end up getting range-tracked into
being an offset wthin a 0 byte array. It gets especially mad about this:
if (vbios_str == NULL)
vbios_str += size
Hi, Alex,
Just some documentation-type comments and one Rust-naming-convention comment:
On 4/20/2025 8:19 AM, Alexandre Courbot wrote:
> Upon reset, the GPU executes the GFW_BOOT firmware in order to
> initialize its base parameters such as clocks. The driver must ensure
> that this step is comple
On Mon, Apr 21, 2025 at 10:58 AM Song Liu wrote:
>
> On Mon, Apr 14, 2025 at 3:53 PM T.J. Mercier wrote:
> >
> > The dmabuf iterator traverses the list of all DMA buffers. The list is
> > maintained only when CONFIG_DEBUG_FS is enabled.
> >
> > DMA buffers are refcounted through their associated
The page fault handler should reject write/atomic access to read only
VMAs. Add code to handle this in handle_pagefault after the VMA lookup.
Fixes: 3d420e9fa848 ("drm/xe: Rework GPU page fault handling")
Signed-off-by: Jonathan Cavitt
Suggested-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_gt_p
Add additional information to each VM so they can report up to the first
50 seen faults. Only pagefaults are saved this way currently, though in
the future, all faults should be tracked by the VM for future reporting.
Additionally, of the pagefaults reported, only failed pagefaults are
saved this
Add additional information to each VM so they can report up to the first
50 seen faults. Only pagefaults are saved this way currently, though in
the future, all faults should be tracked by the VM for future reporting.
Additionally, of the pagefaults reported, only failed pagefaults are
saved this
Add initial declarations for the drm_xe_vm_get_property ioctl.
v2:
- Expand kernel docs for drm_xe_vm_get_property (Jianxun)
v3:
- Remove address type external definitions (Jianxun)
- Add fault type to xe_drm_fault struct (Jianxun)
v4:
- Remove engine class and instance (Ivan)
v5:
- Add declare
Move the pagefault struct from xe_gt_pagefault.c to the
xe_gt_pagefault_types.h header file, and move the associated enum values
into the regs folder under xe_pagefault_desc.h
Since xe_pagefault_desc.h is being initialized here, also move the
xe_guc_pagefault_desc hardware formats to the new file.
Add support for userspace to request a list of observed faults
from a specified VM.
v2:
- Only allow querying of failed pagefaults (Matt Brost)
v3:
- Remove unnecessary size parameter from helper function, as it
is a property of the arguments. (jcavitt)
- Remove unnecessary copy_from_user (Jain
Add initial support for Xiaomi Redmi 3S (land).
Signed-off-by: Barnabás Czémán
---
arch/arm64/boot/dts/qcom/Makefile| 1 +
arch/arm64/boot/dts/qcom/msm8937-xiaomi-land.dts | 381 +++
2 files changed, 382 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/M
Document Xiaomi Redmi 3S (land).
Add qcom,msm8937 for msm-id, board-id allow-list.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Barnabás Czémán
---
Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qc
From: Dang Huynh
Add initial support for MSM8937 SoC.
Signed-off-by: Dang Huynh
Co-developed-by: Barnabás Czémán
Signed-off-by: Barnabás Czémán
---
arch/arm64/boot/dts/qcom/msm8937.dtsi | 2069 +
1 file changed, 2069 insertions(+)
diff --git a/arch/arm64/boot
Add device tree bindings for the global clock controller on Qualcomm
MSM8937 platform.
Signed-off-by: Barnabás Czémán
---
.../devicetree/bindings/clock/qcom,gcc-msm8953.yaml | 11 ---
include/dt-bindings/clock/qcom,gcc-msm8917.h | 19 +++
2 files changed, 27 in
This patch series add initial support for MSM8937 SoC
and Xiaomi Redmi 3S (land).
The series is extending the MSM8917 gcc and pinctrl drivers
because they are sibling SoCs.
MSM8937 have 4 more A53 cores and have one more dsi port then
MSM8917.
It implements little-big architecture and uses Adreno
From: Daniil Titov
Modify existing MSM8917 driver to support MSM8937 SoC. Override frequencies
which are different in this chip. Register all the clocks to the framework
for the clients to be able to request for them. Add new variant of GDSC for
new chip.
Signed-off-by: Daniil Titov
Signed-off-
On Fri, Apr 18, 2025 at 9:00 AM Akhil P Oommen wrote:
>
> On 4/18/2025 6:40 AM, Connor Abbott wrote:
> > On Thu, Apr 17, 2025, 1:50 PM Akhil P Oommen
> > wrote:
> >>
> >> On 4/17/2025 9:02 PM, Connor Abbott wrote:
> >>> On Thu, Apr 17, 2025 at 3:45 AM Akhil P Oommen
> >>> wrote:
>
>
Christian reports that 4K output using YUV420 encoding fails with the
following error:
Fatal Error, invalid HDMI vclk freq 593406
Modetest shows the following:
3840x2160 59.94 3840 4016 4104 4400 2160 2168 2178 2250 593407 flags: ,
,
drm calculated value
From: Christian Hewitt
This reverts commit bfbc68e.
The patch does permit the offending YUV420 @ 59.94 phy_freq and
vclk_freq mode to match in calculations. It also results in all
fractional rates being unavailable for use. This was unintended
and requires the patch to be reverted.
Fixes: bfbc6
This is a successor of a previous patchset by Christian [0]
Patch 1 reverts a previous fix for loss of HDMI sync when playing YUV420
@ 59.94 media. The patch does resolve a calculation issue. It also makes
all fractional rates invalid which is a bigger problem.
Patch 2 changes the whole drm/meson
On Wed, Mar 19, 2025 at 07:52:19AM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Re-aligning naming to better match drm_gpuvm terminology will make
> things less confusing at the end of the drm_gpuvm conversion.
>
> This is just rename churn, no functional change.
>
> Signed-off-by: Rob Clark
On Mon, Apr 21, 2025 at 07:36:34PM +0800, Zhengqiao Xia wrote:
> AUO B140QAN08.H
> BOE NE140WUM-N6S
> CSW MNE007QS3-8
>
> Zhengqiao Xia (3):
> drm/panel-edp: Add support for AUO B140QAN08.H panel
> drm/panel-edp: Add support for BOE NE140WUM-N6S panel
> drm/panel-edp: Add support for CSW MNE
On Tue, Apr 15, 2025 at 12:43:20PM +0200, AngeloGioacchino Del Regno wrote:
> Add support for the newer HDMI-TX (Encoder) v2 and DDC v2 IPs
> found in MediaTek's MT8195, MT8188 SoC and their variants, and
> including support for display modes up to 4k60 and for HDMI
> Audio, as per the HDMI 2.0 spe
On Fri, Apr 18, 2025 at 8:25 AM T.J. Mercier wrote:
>
> On Thu, Apr 17, 2025 at 1:26 PM Song Liu wrote:
> >
> > On Thu, Apr 17, 2025 at 9:05 AM T.J. Mercier wrote:
> > >
> > > On Wed, Apr 16, 2025 at 9:56 PM Song Liu wrote:
> > > >
> > > > On Wed, Apr 16, 2025 at 7:09 PM T.J. Mercier
> > > >
On Mon, Apr 14, 2025 at 3:53 PM T.J. Mercier wrote:
>
> This test creates a udmabuf and uses a BPF program that prints dmabuf
> metadata with the new dmabuf_iter to verify it can be found.
>
> Signed-off-by: T.J. Mercier
> ---
[...]
> +
> +
> +static void subtest_dmabuf_iter_check_udmabuf(struct
On Mon, Apr 14, 2025 at 3:53 PM T.J. Mercier wrote:
>
> The dmabuf iterator traverses the list of all DMA buffers. The list is
> maintained only when CONFIG_DEBUG_FS is enabled.
>
> DMA buffers are refcounted through their associated struct file. A
> reference is taken on each buffer as the list i
From: Rob Clark
Really the only purpose of this was to limit the address space size to
4GB to avoid 32b rollover problems in 64b pointer math in older sqe fw.
So replace the address_space_size with a quirk limiting the address
space to 4GB. In all other cases, use the SMMU input address size (IA
Dmitry Baryshkov writes:
> On Wed, Apr 16, 2025 at 03:51:03PM +0800, Mauro Carvalho Chehab wrote:
>>
>> As reported by Andy, the Kernel build system runs kernel-doc script for DRM,
>> when W=1. Due to Python's normal behavior, its JIT compiler will create
>> a bytecode and store it under scripts
From: Thierry Reding
Changes to a plane's type after it has been registered aren't propagated
to userspace automatically. This could possibly be achieved by updating
the property, but since we can already determine which type this should
be before the registration, passing in the right type from
On Mon, Apr 14, 2025 at 12:38:03PM +0300, Alexander Usyskin wrote:
> From: "Abliyev, Reuven"
>
> Erase command is slow on discrete graphics storage
> and may overshot PCI completion timeout.
> BMG introduces the ability to have non-posted erase.
> Add driver support for non-posted erase with poll
Hi Pekka,
On Thu, Apr 17, 2025 at 11:13:15AM +0300, Pekka Paalanen wrote:
> On Wed, 16 Apr 2025 11:59:43 +0300 Tomi Valkeinen wrote:
> > On 01/04/2025 16:27, Pekka Paalanen wrote:
> > > On Mon, 31 Mar 2025 13:53:37 +0300 Pekka Paalanen wrote:
> > >> On Mon, 31 Mar 2025 11:21:35 +0300 Laurent Pinch
On Tue, 08 Apr 2025 12:17:13 +0530, Aditya Garg wrote:
> The vsprint patch was originally being sent as a seperate patch [1], and
> I was waiting it to be taken up. But as suggested by Petr, I'm sending
> them via DRM.
>
> v2:
> Remove printf tests, will merge later through Kees' tree
>
> [...]
Hi, Angelo:
AngeloGioacchino Del Regno 於
2025年4月15日 週二 下午6:44寫道：
>
> In preparation for splitting common bits of this driver and for
> introducing a new version of the MediaTek HDMI Encoder IP, improve
> the flexibility of function mtk_hdmi_get_all_clk() by adding a
> pointer to the clock names a
On 21-04-2025 07:26 pm, Alyssa Rosenzweig wrote:
>> Any change needed or just because some other maintainer manages this?
>> Although Tbh, I really don't care about backporting since T2 Mac users are
>> still using patched kernels provided by us. I'd rather free my mind in
>> getting this don
> Any change needed or just because some other maintainer manages this?
> Although Tbh, I really don't care about backporting since T2 Mac users are
> still using patched kernels provided by us. I'd rather free my mind in
> getting this done.
I'm just too new to kernel to do nontrivial merges.
On 21-04-2025 07:19 pm, Alyssa Rosenzweig wrote:
> I didn't realize this was so subtle with the backporting. I don't think
> I can take this on, sorry.
Any change needed or just because some other maintainer manages this? Although
Tbh, I really don't care about backporting since T2 Mac users a
I didn't realize this was so subtle with the backporting. I don't think
I can take this on, sorry.
Le Mon, Apr 21, 2025 at 06:40:23PM +0530, Aditya Garg a écrit :
>
>
> On 21-04-2025 06:38 pm, Aditya Garg wrote:
> >
> >
> > On 21-04-2025 06:37 pm, Alyssa Rosenzweig wrote:
> >>> On 21-04-2025 0
On Thu, Mar 27, 2025 at 07:47:26PM -0700, Amirreza Zarrabi wrote:
> The TEE subsystem allows session-based access to trusted services,
> requiring a session to be established to receive a service. This
> is not suitable for an environment that represents services as objects.
> An object supports va
On Wed, Apr 09, 2025 at 05:20:08PM +1000, Amirreza Zarrabi wrote:
>
>
> On 4/9/2025 4:41 PM, Jens Wiklander wrote:
> > Hi Amirreza,
> >
> > On Wed, Apr 9, 2025 at 2:28 AM Amirreza Zarrabi
> > wrote:
> >>
> >> Hi jens,
> >>
> >> On 4/8/2025 10:19 PM, Jens Wiklander wrote:
> >>
> >> Hi Amirreza,
On 21-04-2025 06:38 pm, Aditya Garg wrote:
>
>
> On 21-04-2025 06:37 pm, Alyssa Rosenzweig wrote:
>>> On 21-04-2025 05:35 pm, Alyssa Rosenzweig wrote:
> Can I have a feedback from some DRM maintainer on this? AFAIK merge
> window is over for some time now. It's been more than a week a
On 21-04-2025 06:37 pm, Alyssa Rosenzweig wrote:
>> On 21-04-2025 05:35 pm, Alyssa Rosenzweig wrote:
Can I have a feedback from some DRM maintainer on this? AFAIK merge window
is over for some time now. It's been more than a week and last time when I
submitted, it just stayed in
> On 21-04-2025 05:35 pm, Alyssa Rosenzweig wrote:
> >> Can I have a feedback from some DRM maintainer on this? AFAIK merge window
> >> is over for some time now. It's been more than a week and last time when I
> >> submitted, it just stayed in the mailing list without any feedback.
> >
> > DRM
On 21-04-2025 05:35 pm, Alyssa Rosenzweig wrote:
>> Can I have a feedback from some DRM maintainer on this? AFAIK merge window
>> is over for some time now. It's been more than a week and last time when I
>> submitted, it just stayed in the mailing list without any feedback.
>
> DRM hides the
> Can I have a feedback from some DRM maintainer on this? AFAIK merge window is
> over for some time now. It's been more than a week and last time when I
> submitted, it just stayed in the mailing list without any feedback.
DRM hides the merge window from committers so that's not super relevant.
AUO B140QAN08.H
BOE NE140WUM-N6S
CSW MNE007QS3-8
Zhengqiao Xia (3):
drm/panel-edp: Add support for AUO B140QAN08.H panel
drm/panel-edp: Add support for BOE NE140WUM-N6S panel
drm/panel-edp: Add support for CSW MNE007QS3-8 panel
drivers/gpu/drm/panel/panel-edp.c | 17 +
1 fi
CSW MNE007QS3-8 EDID:
edid-decode (hex):
00 ff ff ff ff ff ff 00 0e 77 57 14 00 00 00 00
34 22 01 04 a5 1e 13 78 07 ee 95 a3 54 4c 99 26
0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 cd 7c 80 a0 70 b0 50 40 30 20
26 04 2e bc 10 00 00 1a cd 7c 80 a0 70 b0 50 45
30 20 26 04 2e bc
BOE NE140WUM-N6S EDID:
edid-decode (hex):
00 ff ff ff ff ff ff 00 09 e5 73 0d 00 00 00 00
32 22 01 04 a5 1e 13 78 07 13 45 a6 54 4d a0 27
0c 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 03 3e 80 a0 70 b0 48 40 30 20
36 00 2e bc 10 00 00 1a 00 00 00 fd 00 1e 78 99
99 20 01 0a 20 2
AUO B140QAN08.H EDID:
edid-decode (hex):
00 ff ff ff ff ff ff 00 06 af b9 fe 00 00 00 00
00 23 01 04 a5 1e 13 78 03 c1 45 a8 55 48 9d 24
0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 18 86 40 a0 b0 08 52 70 30 20
65 00 2d bc 10 00 00 18 00 00 00 0f 00 00 00 00
00 00 00 00 00 00
@Lankhorst
Does the comment sounds correct or could you please share what should be
the right comment to add
Regards
Sunil Khatri
On 4/21/2025 4:49 PM, Sunil Khatri wrote:
fix the below warning messages:
ttm/ttm_bo.c:1098: warning: Function parameter or struct member 'hit_low' not
described
fix the below warning messages:
ttm/ttm_bo.c:1098: warning: Function parameter or struct member 'hit_low' not
described in 'ttm_bo_swapout_walk'
ttm/ttm_bo.c:1098: warning: Function parameter or struct member 'evict_low' not
described in 'ttm_bo_swapout_walk'
Cc: Maarten Lankhorst
Cc: Tvrtko Ur
On Thu, Mar 27, 2025 at 07:47:24PM -0700, Amirreza Zarrabi wrote:
> The tee_context can be used to manage TEE user resources, including
> those allocated by the driver for the TEE on behalf of the user.
> The release() callback is invoked only when all resources, such as
> tee_shm, are released and
AUO B140QAN08.H
BOE NE140WUM-N6S
CSW MNE007QS3-8
Signed-off-by: Zhengqiao Xia
---
drivers/gpu/drm/panel/panel-edp.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-edp.c
b/drivers/gpu/drm/panel/panel-edp.c
index 52028c8f8988..83339c0ccaff 10064
On Mon, Apr 21, 2025 at 02:29:07PM +0530, Jagath Jog J wrote:
> Refactor to use drm_device.debugfs_root instead of drm_minor for
> debugfs file creation. The driver can now initialize debugfs directly
> in probe(), before drm_dev_register(). This also removes the use of
> .debugfs_init callback.
W
On Mon, Apr 21, 2025 at 05:44:38PM +0800, Zhengqiao Xia wrote:
> AUO B140QAN08.H
> BOE NE140WUM-N6S
> CSW MNE007QS3-8
Please add EDID dumps for these panels. See git log for the file.
You might want to split the commit to add one panel per commit for
simplicity.
>
> Signed-off-by: Zhengqiao Xia
From: Andy Yan
The all video ports of rk3568/rk3588 share the same OVL_LAYER_SEL
and OVL_PORT_SEL registers, and the configuration of these two registers
can be set to take effect when the vsync signal arrives at a certain Video
Port.
If two threads for two display output choose to update these
On Thu, Mar 27, 2025 at 07:47:23PM -0700, Amirreza Zarrabi wrote:
> A TEE driver doesn't always need to provide a pool if it doesn't
> support memory sharing ioctls and can allocate memory for TEE
> messages in another way. Although this is mentioned in the
> documentation for tee_device_alloc(), i
On Mon, 21 Apr 2025 at 12:22, wrote:
>
> On 2025-04-21 10:16, Dmitry Baryshkov wrote:
> > On Mon, Apr 21, 2025 at 05:09:22AM +0200, Barnabás Czémán wrote:
> >> Sort adreno clocks in alphabetical order.
> >
> > Why? The order of the clocks here matches the order in which they
> > should
> > be brou
Refactor to use drm_device.debugfs_root instead of drm_minor for
debugfs file creation. The driver can now initialize debugfs directly
in probe(), before drm_dev_register(). This also removes the use of
.debugfs_init callback.
Signed-off-by: Jagath Jog J
---
drivers/gpu/drm/drm_mipi_dbi.c
This patch updates the MIPI DBI driver to use drm_device.debugfs_root
instead of drm_minor for creating debugfs files. The debugfs setup is now
done earlier in probe(), before drm_dev_register(), and the drivers can
avoid using the .debugfs_init callback.
This is an initial version, and only a few
On 2025-04-21 10:16, Dmitry Baryshkov wrote:
On Mon, Apr 21, 2025 at 05:09:22AM +0200, Barnabás Czémán wrote:
Sort adreno clocks in alphabetical order.
Why? The order of the clocks here matches the order in which they
should
be brought up.
Simple misunderstanding from previous attempts of do
On Mon, Apr 21, 2025 at 01:51:09PM +0530, Deepika Singh wrote:
>
>
> On 4/15/2025 6:47 PM, Greg KH wrote:
> > On Mon, Apr 14, 2025 at 12:41:47PM +0530, Deepika Singh wrote:
> > >
> > >
> > > On 4/11/2025 1:55 PM, Ekansh Gupta wrote:
> > > >
> > > >
> > > > On 12/3/2024 5:27 PM, Dmitry Baryshk
On 4/15/2025 6:47 PM, Greg KH wrote:
On Mon, Apr 14, 2025 at 12:41:47PM +0530, Deepika Singh wrote:
On 4/11/2025 1:55 PM, Ekansh Gupta wrote:
On 12/3/2024 5:27 PM, Dmitry Baryshkov wrote:
On Tue, 3 Dec 2024 at 07:22, Ekansh Gupta wrote:
On 12/2/2024 6:18 PM, Dmitry Baryshkov wrote:
On Wed, Apr 16, 2025 at 03:51:03PM +0800, Mauro Carvalho Chehab wrote:
>
> As reported by Andy, the Kernel build system runs kernel-doc script for DRM,
> when W=1. Due to Python's normal behavior, its JIT compiler will create
> a bytecode and store it under scripts/lib/*/__pycache__.
>
> As one
On Sat, Apr 19, 2025 at 08:03:35PM +0530, Akhil P Oommen wrote:
> On 1/9/2025 2:10 AM, Akhil P Oommen wrote:
> > Add a new schema which extends opp-v2 to support a new vendor specific
> > property required for Adreno GPUs found in Qualcomm's SoCs. The new
> > property called "qcom,opp-acd-level" ca
On Mon, Apr 21, 2025 at 05:09:22AM +0200, Barnabás Czémán wrote:
> Sort adreno clocks in alphabetical order.
Why? The order of the clocks here matches the order in which they should
be brought up.
>
> Signed-off-by: Barnabás Czémán
> ---
> arch/arm64/boot/dts/qcom/msm8953.dtsi | 16 ---
On Sat, Apr 19, 2025 at 09:42:10AM +0530, Tejas Vipin wrote:
> There are no remaining users of mipi_dsi_dcs_write_seq and it can be
> removed in favor of mipi_dsi_dcs_write_seq_multi.
>
> Signed-off-by: Tejas Vipin
> ---
> include/drm/drm_mipi_dsi.h | 22 --
> 1 file changed,
On Sat, Apr 19, 2025 at 09:42:09AM +0530, Tejas Vipin wrote:
> Changes the samsung-sofef00 panel to use multi style functions for
> improved error handling.
>
> Signed-off-by: Tejas Vipin
> ---
> drivers/gpu/drm/panel/panel-samsung-sofef00.c | 70 ++-
> 1 file changed, 21 inserti
On Sat, Apr 19, 2025 at 07:30:02PM -0500, Aaron Kling via B4 Relay wrote:
> From: Thierry Reding
>
> Changes to a plane's type after it has been registered aren't propagated
> to userspace automatically. This could possibly be achieved by updating
> the property, but since we can already determin
On Mon, Apr 21, 2025 at 11:41:15AM +0530, Deepika Singh wrote:
>
>
> On 4/14/2025 1:18 PM, Dmitry Baryshkov wrote:
> > On Mon, Apr 14, 2025 at 12:41:47PM +0530, Deepika Singh wrote:
> > >
> > >
> > > On 4/11/2025 1:55 PM, Ekansh Gupta wrote:
> > > >
> > > >
> > > > On 12/3/2024 5:27 PM, Dmitr
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