On Thu, 2025-09-04 at 12:16 +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> While discussing cgroups we noticed a problem where you could export
> a BO to a dma-buf without having it ever being backed or accounted
> for.
>
> This meant in low memory situations or eventually with cgroups, a
> l
On 9/5/25 11:56 PM, David Hildenbrand wrote:
On 06.09.25 03:05, John Hubbard wrote:
On 9/1/25 8:03 AM, David Hildenbrand wrote:
...> Well, there is a lot I dislike about record_subpages() to go back
there.
Starting with "as Willy keeps explaining, the concept of subpages do
not exist and endin
On 9/4/25 19:50, Antheas Kapenekakis wrote:
The OneXPlayer X1 series features a 2k 10.95 display with a portrait
orientation. Add quirks to set the panel orientation to portrait mode
to the Intel, AMD, and EVA-02 variants.
Signed-off-by: Antheas Kapenekakis
---
.../gpu/drm/drm_panel_orientati
The binding is for the Mayqueen Pixpaper e-ink display panel,
controlled via an SPI interface.
Signed-off-by: LiangCheng Wang
Reviewed-by: Rob Herring (Arm)
---
.../bindings/display/mayqueen,pixpaper.yaml| 63 ++
1 file changed, 63 insertions(+)
diff --git a/Documen
The following changes are included:
- Updated Kconfig and Makefile to include the new driver
- Implementation of the bridge driver at
drivers/gpu/drm/bridge/lontium-lt9611c.c
Signed-off-by: syyang
---
drivers/gpu/drm/bridge/Kconfig | 16 +
drivers/gpu/drm/bridge/Makefile
On Mon, Aug 11, 2025 at 11:26:05AM -0500, Mario Limonciello (AMD) wrote:
> On systems with non VGA GPUs fbcon can't find the primary GPU because
> video_is_primary_device() only checks the VGA arbiter.
>
> Add a screen info check to video_is_primary_device() so that callers
> can get accurate data
> On 29 Aug 2025, at 19:35, Lyude Paul wrote:
>
> At the moment the way that freeing gem shmem objects is not ideal for rust
This does not read very well IMHO.
> bindings. drm_gem_shmem_free() releases all of the associated memory with a
> gem shmem object with kfree(), which means that for
On Fri, Sep 05, 2025 at 09:56:25AM -0400, Alex Deucher wrote:
> The size and offset come from userspace, so it's likely a mesa issue.
> I've reported it here:
> https://gitlab.freedesktop.org/mesa/mesa/-/issues/13838
Cool, thanks!
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/note
在 2025/9/5 18:05, Jonathan Cameron 写道:
This radically changes the lifetime of the reference to policy.
If that is valid, then I'd expect a lot more description of why!
Thanks for your comment.
Initially I thought policy was only used within this function, so I
moved it here.
After your fee
On Wed, 3 Sep 2025 21:17:27 +0800
Zihuan Zhang wrote:
> Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
> annotation for policy references. This reduces the risk of reference
> counting mistakes and aligns the code with the latest kernel style.
>
> No functional change inte
Document the MDSS hardware found on the Qualcomm QCS8300 platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Yongxing Mou
---
.../bindings/display/msm/qcom,qcs8300-mdss.yaml| 286 +
1 file changed, 286 insertions(+)
diff --git
a/Documentation/devicetree/bindings/
CSUS clock which is camera MCLK, is also a clock gate for vi_sensor so
lets model it by creating CSUS grate with vi_sensor as a parent.
Signed-off-by: Svyatoslav Ryhel
---
drivers/clk/tegra/clk-tegra114.c | 7 ++-
drivers/clk/tegra/clk-tegra20.c | 7 ++-
drivers/clk/tegra/clk-tegra30.c
On Thu, Aug 21, 2025 at 02:25:06PM +0300, Dmitry Baryshkov wrote:
> Default config for UML (x86_64) doesn't include any driver which
> supports DRM_CLIENT_SELECTION, which makes drm_client_modeset disabled
> (and correspondingly tests for that module are not executed too).
>
> Enable DRM_VKMS and
On 9/4/25 9:55 AM, Yongxing Mou wrote:
>
>
> On 9/4/2025 3:22 PM, Yongxing Mou wrote:
>> This series introduces support to enable the Mobile Display Subsystem (MDSS)
>> , Display Processing Unit (DPU), DisplayPort controller for the Qualcomm
>> QCS8300 target. It includes the addition of the hard
Suspend resume actions will check the state of the device and whether
bus PM should be skipped. These same actions make sense during hibernation
image restore. Apply them there as well.
Tested-by: Eric Naim
Signed-off-by: Mario Limonciello (AMD)
---
drivers/pci/pci-driver.c | 5 +
1 file
On Fri, Sep 5, 2025 at 11:00 AM Aleksandrs Vinarskis wrote:
> Add 'name' argument to of_led_get() such that it can lookup LEDs in
> devicetree by either name or index.
>
> And use this modified function to add devicetree support to the generic
> (non devicetree specific) [devm_]led_get() function
Le 22/08/2025 à 20:36, Nícolas F. R. A. Prado a écrit :
Allow configuring the gamma and ccorr blocks through the post-blend
color pipeline API instead of the GAMMA_LUT and CTM properties.
In order to achieve this, initialize the color pipeline property and
colorops on the CRTC based on the DD
On 7/4/2025 7:47 PM, Dmitry Baryshkov wrote:
All interleaved RGB formats use only 1 plane and MDP_FETCH_LINEAR.
Specify num_planes and fetch_mode directly in the macro and remove
unused parameters.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp
在 2025/9/3 21:43, Krzysztof Kozlowski 写道:
On 03/09/2025 15:41, Rafael J. Wysocki wrote:
em_cpufreq_update_efficiencies(struct device *dev, struct em_perf_state
*table)
{
struct em_perf_domain *pd = dev->em_pd;
- struct cpufreq_policy *policy;
+ struct cpufreq_policy *policy
As it stands, panthor keeps a cached current frequency value for when it
wants to retrieve it. This doesn't work well for when things might
switch frequency without panthor's knowledge.
Instead, implement the get_cur_freq operation, and expose it through a
helper function to the rest of panthor.
The Qualcomm QCS8300 platform comes with one DisplayPort controller
with same base offset as SM8650. But it requires new compatible string
because QCS8300 controller supports 4 MST streams. 4 MST streams will
be enabled as part of MST feature support. Currently, using SM8650 data
structure to enabl
PMSG_POWEROFF will be used for the PM core to allow differentiating between
an S4 or S5 shutdown sequence when re-using callbacks.
This event should not have wakeups enabled so update PMSG_NO_WAKEUP() to
match it as well.
Tested-by: Eric Naim
Signed-off-by: Mario Limonciello (AMD)
---
drivers/
Le 03/08/2025 à 05:57, Jim Cromie a écrit :
The body of ddebug_attach_module_classes() is dominated by a
code-block that finds the contiguous subrange of classmaps matching on
modname, and saves it into the ddebug_table's info record.
Implement this block in a macro to accommodate different c
On 9/3/2025 5:48 PM, Konrad Dybcio wrote:
On 8/21/25 8:55 PM, Akhil P Oommen wrote:
From: Gaurav Kohli
Unlike the CPU, the GPU does not throttle its speed automatically when it
reaches high temperatures.
Set up GPU cooling by throttling the GPU speed
when reaching 105°C.
Signed-off-by: Ga
Document CSI HW block found in Tegra20 and Tegra30 SoC.
Signed-off-by: Svyatoslav Ryhel
---
.../display/tegra/nvidia,tegra20-csi.yaml | 104
.../display/tegra/nvidia,tegra30-csi.yaml | 115 ++
2 files changed, 219 insertions(+)
create mode 100644
Docume
On Fri, Sep 05, 2025 at 10:17:39AM -0500, Rob Herring wrote:
> On Fri, Sep 05, 2025 at 09:59:29AM +0200, Aleksandrs Vinarskis wrote:
> > Introduce common generic led consumer binding, where consumer defines
> > led(s) by phandle, as opposed to trigger-source binding where the
> > trigger source is
Tegra20/Tegra30 DSI is quite similar to Tegra114+ apart MIPI calibration
logic and clocks. With a few minor tweaks, existing tegra DSI driver
should work on Tegra20/Tegra30 devices just fine. Tested on
Motorola Atrix 4G (T20) and ASUS VivoTab RT TF600T (T30).
This patchset depends on Tegra20/Tegra
On Thu, Aug 21, 2025 at 01:56:24PM +0200, Linus Walleij wrote:
> Hi Ariel,
>
> thanks for your patch!
>
> On Wed, Aug 20, 2025 at 7:17 PM Ariel D'Alessandro
> wrote:
>
> > + ce-gpios:
> > +description: GPIO connected to the CE (chip enable) pin of the chip
> > +maxItems: 1
>
> Mention
Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along
with a set of changes required for that.
---
Changes in v2:
- vi_sensor gated through csus
- TEGRA30_CLK_CLK_MAX moved to clk-tegra30
- adjusted commit titles and messages
- clk_register_clkdev dropped from pad clock registrati
Move CSI helpers into the header for easier access from SoC-specific video
driver parts.
Signed-off-by: Svyatoslav Ryhel
---
drivers/staging/media/tegra-video/csi.c | 11 ---
drivers/staging/media/tegra-video/csi.h | 10 ++
2 files changed, 10 insertions(+), 11 deletions(-)
diff
Existing Parallel VI interface schema for Tegra20 is fully compatible with
Tegra30; hence, lets reuse it by setting fallback for Tegra30.
Adjust existing VI schema to reflect that Tegra20 VI is compatible with
Tegra30 by setting a fallback for Tegra30. Additionally, switch to using
an enum instead
Extract and print version info of the late binding binary.
v2: Some refinements (Daniele)
Signed-off-by: Badal Nilawar
Reviewed-by: Daniele Ceraolo Spurio
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/xe_late_bind_fw.c | 124 +
drivers/gpu/drm/xe/xe_late_bind_fw
Hi,
On 8/28/25 7:49 PM, Imre Deak wrote:
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c
b/drivers/gpu/drm/display/drm_dp_helper.c
- ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS);
+ ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET);
The original commit d34
Hi Imre,
On 9/2/25 6:13 PM, Imre Deak wrote:
This looks like the issue tracked at
https://gitlab.freedesktop.org/drm/amd/-/issues/4500
Thanks! I wasn't aware of that issue being tracked already.
The correct solution there is to disable the DPCD probing, which AMD
folks are working on atm. Un
Hello!
This adds support for the STARRY XR109IA2T panel based on the hx83102 chip
Thanks
Vladimir Yakovlev (2):
dt-bindings: display: panel: Add compatible for STARRY xr109ai2t
drm/panel: himax-hx83102: add panel starry xr109ia2t
.../bindings/display/panel/himax,hx83102.yaml | 2 +
drive
On Wed, Sep 03, 2025 at 05:54:26PM -0400, Joel Fernandes wrote:
> Previously, bitstructs were hardcoded to use u32 as the underlying
> storage type. Add support for different storage types (u8, u16, u32,
> u64) to the bitstruct macro.
>
> New syntax is: struct Name: { ... }
>
> Signed-off-by: J
[BUG]
Recently, we encountered a KASAN warning as follows:
kasan_report+0xaf/0xe0 mm/kasan/report.c:588
fb_pad_aligned_buffer+0x12f/0x150 drivers/video/fbdev/core/fbmem.c:116
ccw_putcs_aligned drivers/video/fbdev/core/fbcon_ccw.c:119 [inline]
ccw_putcs+0x9ac/0xbb0 drivers/video/fbdev/core/fbcon_cc
On 9/4/25 19:50, Antheas Kapenekakis wrote:
Add quirks for the new clamshell device OneXPlayer G1 for both AMD
and Intel. The device has a 1600x2560p 144hz LCD panel.
Signed-off-by: Antheas Kapenekakis
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 12
1 file changed, 12 i
When the system is powered off the kernel will call device_shutdown()
which will issue callbacks into PCI core to wake up a device and call
it's shutdown() callback. This will leave devices in ACPI D0 which can
cause some devices to misbehave with spurious wakeups and also leave some
devices on wh
From: Aaron Kling
Using pmu counters for usage stats. This enables dynamic frequency
scaling on all of the currently supported Tegra gpus.
The register offsets are valid for gk20a, gm20b, gp10b, and gv11b. If
support is added for ga10b, this will need rearchitected.
Signed-off-by: Aaron Kling
On Fri, Sep 5, 2025 at 4:57 PM Lyude Paul wrote:
>
> OK - sorry for the delay! Note: I haven't been able to test this on an actual
> platform
>
> Comments down below
>
> On Sun, 2025-08-31 at 22:22 -0500, Aaron Kling via B4 Relay wrote:
> > From: Aaron Kling
> >
> > Using pmu counters for usage s
This commit converts the existing MIPI code to use operations, which is a
necessary step for the Tegra20/Tegra30 SoCs. Additionally, it creates a
dedicated header file, tegra-mipi-cal.h, to contain the MIPI calibration
functions, improving code organization and readability.
Signed-off-by: Svyatosl
On Friday, September 5th, 2025 at 17:24, Rob Herring wrote:
>
>
> On Fri, Sep 05, 2025 at 09:59:30AM +0200, Aleksandrs Vinarskis wrote:
>
> > A number of existing schemas use 'leds' property to provide
> > phandle-array of LED(s) to the consumer. Additionally, with the
> > upcoming priva
On 9/4/25 19:50, Antheas Kapenekakis wrote:
The Ayaneo 2021 has an alternate variant that skips AYA in the
beginning. Add that as well.
Signed-off-by: Antheas Kapenekakis
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/
On 9/4/25 19:50, Antheas Kapenekakis wrote:
Add quirks for two Zeenix handhelds, the Lite and the Pro.
They are identical to the Ayn Loki and the Ayn Loki Pro respectively.
Signed-off-by: Antheas Kapenekakis
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 12
1 file changed
Exynos Virtual Display driver performs memory allocation/free operations
without lock protection, which easily causes concurrency problem.
For example, use-after-free can occur in race scenario like this:
```
CPU0CPU1CPU2
On Wed, Sep 03, 2025 at 05:54:28PM -0400, Joel Fernandes wrote:
> Out of broad need for these macros in Rust, move them out. Several folks
> have shown interest (Nova, Tyr GPU drivers).
>
> bitstruct - defines bitfields in Rust structs similar to C.
> register - support for defining hardware regis
On Sat, May 24, 2025 at 10:15 AM Dmitry Baryshkov
wrote:
>
> On Sat, May 24, 2025 at 09:25:37PM +0530, Viswanath Kraleti wrote:
> > From: Ryan Eatmon
> >
> > The files generated by gen_header.py capture the source path to the
> > input files and the date. While that can be informative, it varies
This is a series of patches that address several memory bugs that occur
in the Exynos Virtual Display driver.
Jeongjun Park (3):
drm/exynos: vidi: use priv->vidi_dev for ctx lookup in vidi_connection_ioctl()
drm/exynos: vidi: fix to avoid directly dereferencing user pointer
drm/exynos: vidi:
On 9/4/25 19:50, Antheas Kapenekakis wrote:
Right side up, DSI-1, 800x1280 screen.
Signed-off-by: Antheas Kapenekakis
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c
b/drivers/gpu/drm
- New device tree binding documentation at
Documentation/devicetree/bindings/display/bridge/lontium,lt9611c.yaml
Signed-off-by: syyang
---
.../display/bridge/lontium,lt9611c.yaml | 123 ++
1 file changed, 123 insertions(+)
create mode 100644
Documentation/devicetree/bin
In some cases it's reasonable to describe DP lanes and AUX signal lines
separately in the DT. One of the typical reasons is if the source of DP
signals can support either USB-C or DP connections. In such a case the
transmitter of DP signals have separate ports: one for SS lanes and
another one for
The STARRY XR109AI2T is a 10.95" 1200x2000 (WUXGA+) TFT LCD panel with
himax-hx83102 controller. Hence, we add a new compatible with panel
specific config.
Signed-off-by: Vladimir Yakovlev
---
.../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
1 file changed, 2 insertions(+)
It is better to use gpiod_set_value_cansleep, because the panel
can be connected via i2c/spi expander or similar external devices,
and their callbacks can go to sleep.
for reference see Documentation/driver-api/gpio/consumer.rst
Signed-off-by: Vladimir Yakovlev
---
drivers/gpu/drm/panel/panel-h
On Sat, Sep 6, 2025 at 1:56 PM Akhil P Oommen wrote:
>
> On 9/3/2025 8:44 PM, Konrad Dybcio wrote:
> > On 9/3/25 4:00 PM, Dmitry Baryshkov wrote:
> >> On Wed, Sep 03, 2025 at 03:36:34PM +0200, Konrad Dybcio wrote:
> >>> On 9/3/25 2:39 PM, Dmitry Baryshkov wrote:
> On Wed, Sep 03, 2025 at 02:2
Hi Xiaolei,
On 8/27/25 10:45, Xiaolei Wang wrote:
Commit 66671944e176 ("drm/tests: helpers: Add atomic helpers")
added the atomic state path, so adding the drm connector
atomic_[duplicate/destroy]_state is also necessary.
WARNING: CPU: 0 PID: 96 at drivers/gpu/drm/drm_connector.c:234
drm_conn
The LT9611UXC only has an I2S input and therefore only an HDMI-TX
audio channel. In this case, the capture channel must be disabled
on the HDMI sound card.
Signed-off-by: Vladimir Yakovlev
---
drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/
Dmitry Baryshkov 于2025年9月4日周四 22:39写道：
>
> On Thu, Sep 04, 2025 at 06:48:13PM +0800, 杨孙运 wrote:
> > Dmitry Baryshkov 于2025年9月4日周四 10:52写道：
> > >
> > > On Wed, Sep 03, 2025 at 05:38:25AM -0700, syyang wrote:
> > > > The following changes are included:
> > > >
> > > > - Updated Kconfig and Makefil
Introduce a DRM driver for the Mayqueen Pixpaper e-ink display panel,
which is controlled via SPI. The driver supports a 122x250 resolution
display with XRGB format.
Also, add a MAINTAINERS entry for the Pixpaper driver.
Signed-off-by: LiangCheng Wang
---
MAINTAINERS |
Add missing mutex unlock before returning from the error path in
cdns_mhdp_atomic_enable().
Fixes: 935a92a1c400 ("drm: bridge: cdns-mhdp8546: Fix possible null pointer
dereference")
Reported-by: Hulk Robot
Signed-off-by: Qi Xi
---
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 --
On some systems the interrupt pin may not be used.
In this case we exclude DRM_BRIDGE_OP_HPD from supported operations,
after which a polling thread is started to detect the connection.
(the default polling period for DRM is 10 seconds)
Signed-off-by: Vladimir Yakovlev
---
drivers/gpu/drm/bridge
On 9/4/25 19:50, Antheas Kapenekakis wrote:
The OneXPlayer F1Pro has a 144hz 1920x1080 portrait OLED panel.
Add a quirk to correct the panel portrait orientation. In addition,
it comes with a red limited edition variant in the Chinese market,
so add that as well. Then, add the 8840U non-pro varia
On some systems the reset pin may not be used.
Signed-off-by: Vladimir Yakovlev
---
drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/lontium-lt9611uxc.c
b/drivers/gpu/drm/bridge/lontium-lt9611uxc.c
index 50
The drm_edid_alloc() function uses kmemdup() to copy raw EDID data,
which can be loaded from firmware. A problem exists because the firmware
subsystem uses vfree() to release its data buffer. This implies the
buffer may be allocated with vmalloc() and can thus be larger than
kmalloc() typically sup
From: Wig Cheng
Mayqueen is a Taiwan-based company primarily focused on the development
of arm64 development boards and e-paper displays.
Signed-off-by: Wig Cheng
Acked-by: Rob Herring (Arm)
Acked-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 fi
On 9/4/25 19:50, Antheas Kapenekakis wrote:
The Ayaneo 3 comes with two panels, an OLED right side up 1080p panel
and an IPS landscape 1080p panel. However, both have the same DMI data.
This quirk adds support for the portrait OLED panel.
As the landscape panel is 1920x1080 and the right side up
On 9/4/25 19:50, Antheas Kapenekakis wrote:
The GPD Pocket 4 is a mini laptop replacement with a portrait
2k panel. Add a quirk for it.
Signed-off-by: Antheas Kapenekakis
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/
This patch series adds support for the Mayqueen Pixpaper e-ink display panel,
controlled via SPI.
The series includes:
- A new vendor-prefix entry for "mayqueen"
- Device tree binding documentation for the Pixpaper panel
- A DRM tiny driver implementation for the Pixpaper panel
- A MAINTAINERS ent
On 9/4/25 19:50, Antheas Kapenekakis wrote:
The OneXPlayer X1 mini features a 2k 8.8 display with a portrait
orientation. The Pro is a CPU refresh. Add quirks to set the panel
orientation to portrait mode. There is no Intel variant.
Signed-off-by: Antheas Kapenekakis
---
drivers/gpu/drm/drm_p
On 9/4/25 19:50, Antheas Kapenekakis wrote:
The AOKZOE A1 Pro has a portrait 16:10 panel, add a quirk for it.
Signed-off-by: Antheas Kapenekakis
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel_orientation_
The STARRY XR109AI2T is a 10.95" 1200x2000 (WUXGA+) TFT LCD panel with
himax-hx83102 controller. Hence, we add a new compatible with panel
specific config.
Signed-off-by: Vladimir Yakovlev
---
drivers/gpu/drm/panel/panel-himax-hx83102.c | 193
1 file changed, 193 insertions(
HI，
As a vendors , we have begun to attempt to contribute to the Linux,
and we are very willing to do so.
there are still many rules that we don't understand and need to learn.
于2025年9月5日周五 16:10写道：
>
> Hi,
>
> First, thanks for submitting a driver for this bridge, it's highly appreciated
> vend
The chip does not receive an interrupt if the monitor was connected
before powering up.
Therefore, you need to wake up the task if the necessary bits are set
when calling bridge_detect() after DRM is started.
Signed-off-by: Vladimir Yakovlev
---
drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 11 ++
Add a few generic edp panels used by mt8189 chromebooks. For
BOE-NV140WUM-N44 V8.2 , the enable timing required 80ms. For
CSW-MNE007QB3-1, the hpd_absent timing rquired 80ms, the enable timing
required 50ms, the disable timing required 50ms. For CSW-MNE007QS3-6,
the enable timing required 50ms. For
Dmitry Baryshkov 于2025年9月4日周四 10:52写道：
>
> On Wed, Sep 03, 2025 at 05:38:25AM -0700, syyang wrote:
> > The following changes are included:
> >
> > - Updated Kconfig and Makefile to include the new driver
> > - Implementation of the bridge driver at
> > drivers/gpu/drm/bridge/lontium-lt9611c.c
>
Use KMEM_CACHE() instead of kmem_cache_create() to simplify the code.
Signed-off-by: Longlong Xia
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
b/drivers/gpu/drm/amd/am
Use KMEM_CACHE() instead of kmem_cache_create() to simplify the code.
Signed-off-by: Longlong Xia
---
drivers/gpu/drm/lima/lima_sched.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/lima/lima_sched.c
b/drivers/gpu/drm/lima/lima_sched.c
index 739e8c6c6d90
Krzysztof Kozlowski 于2025年9月4日周四 13:49写道：
>
> On 04/09/2025 04:25, syyang wrote:
> > Fix device tree binding validation errors reported by Rob Herring.
> >
> > v2:
>
> That's not the place where you put changelog.
>
I'm currently learning what to do. Thank you
> > - Fixed $id field to match actua
Krzysztof Kozlowski 于2025年9月4日周四 19:04写道：
>
> On 04/09/2025 12:48, 杨孙运 wrote:
> >>> +
> >>> +static void lt9611c_cleanup_resources(struct lt9611c *lt9611c)
> >>> +{
> >>> + struct device *dev = lt9611c->dev;
> >>> +
> >>> + if (lt9611c->work_inited) {
> >>> + cancel_work_sync(<
Krzysztof Kozlowski 于2025年9月4日周四 13:49写道：
>
> On 04/09/2025 04:25, syyang wrote:
> > Fix device tree binding validation errors reported by Rob Herring.
> >
> > v2:
>
> That's not the place where you put changelog.
>
I'm currently learning what to do. Thank you.
> > - Fixed $id field to match actu
This series adds support for the Lontium LT9611C chip:
- Adds a new device tree binding documentation for the LT9611C bridge.
- Adds a new DRM bridge driver for the LT9611C chip.
syyang (2):
This patch adds a new device tree binding documentation.
This patch adds a new DRM bridge driver for t
Krzysztof Kozlowski 于2025年9月4日周四 16:26写道：
>
> On Thu, Sep 04, 2025 at 04:08:30PM +0800, 杨孙运 wrote:
> > > > +
> > > > +description: |
> > >
> > > Do not need '|' unless you need to preserve formatting.
> > >
> > Both lontium,lt9211.yaml and lontium,lt9611.yaml use "|", so please
> > confirm if the
Add a few generic edp panels used by mt8189 chromebooks. For
BOE-NV140WUM-N44 V8.2 , the enable timing required 80ms. For
CSW-MNE007QB3-1, the hpd_absent timing rquired 80,the enable timing
required 50ms.For CSW-MNE007QS3-6, the enable timing required 50ms. For
CMN-N140JCA-ELK, the enable timing re
Hello,
I'm writing to report a recurring issue with the DSI display on my
Lenovo D330-10IGL. The screen randomly goes blank. I've observed this
problem across multiple Linux operating systems and kernel versions,
which suggests it's a driver-level issue.
- Device: Lenovo D330-10IGL
- Processor: I
On Wed, Sep 03, 2025 at 05:54:27PM -0400, Joel Fernandes wrote:
> Add support for custom visiblity to allow for users to control visibility
> of the structure and helpers.
>
> Signed-off-by: Joel Fernandes
> ---
> drivers/gpu/nova-core/bitstruct.rs | 46 ++--
> drivers/
Leverage newly introduced 'leds' and 'led-names' properties to pass
indicator's phandle and function to v4l2 subnode. The latter supports
privacy led since couple of years ago under 'privacy-led' designation.
Unlike initially proposed trigger-source based approach, this solution
cannot be easily by
This is based on mm-unstable.
I will only CC non-MM folks on the cover letter and the respective patch
to not flood too many inboxes (the lists receive all patches).
--
As discussed recently with Linus, nth_page() is just nasty and we would
like to remove it.
To recap, the reason we currently n
On Sat, Sep 06, 2025 at 03:05:25PM -0700, Rob Clark wrote:
> On Sat, Sep 6, 2025 at 11:55 AM Dmitry Baryshkov
> wrote:
> >
> > On Sat, Sep 06, 2025 at 10:05:40AM -0700, Rob Clark wrote:
> > > In particular, to pull in a SP_READ_SEL_LOCATION bitfield size fix to
> > > fix a7xx GPU snapshot.
> > >
>
From: Hans de Goede
Add 'name' argument to of_led_get() such that it can lookup LEDs in
devicetree by either name or index.
And use this modified function to add devicetree support to the generic
(non devicetree specific) [devm_]led_get() function.
This uses the standard devicetree pattern of a
vidi_connection_ioctl() retrieves the driver_data from drm_dev->dev to
obtain a struct vidi_context pointer. However, drm_dev->dev is the
exynos-drm master device, and the driver_data contained therein is not
the vidi component device, but a completely different device.
This can lead to various bu
In vidi_connection_ioctl(), vidi->edid(user pointer) is directly
dereferenced in the kernel.
This allows arbitrary kernel memory access from the user space, so instead
of directly accessing the user pointer in the kernel, we should modify it
to copy edid to kernel memory using copy_from_user() and
On Sat, Sep 6, 2025 at 11:55 AM Dmitry Baryshkov
wrote:
>
> On Sat, Sep 06, 2025 at 10:05:40AM -0700, Rob Clark wrote:
> > In particular, to pull in a SP_READ_SEL_LOCATION bitfield size fix to
> > fix a7xx GPU snapshot.
> >
> > Sync from mesa commit 76fece61c6ff ("freedreno/registers: Add A7XX_CX_
On Sat, 06 Sep 2025 16:53:25 +0300, Svyatoslav Ryhel wrote:
> Existing Parallel VI interface schema for Tegra20 is fully compatible with
> Tegra30; hence, lets reuse it by setting fallback for Tegra30.
>
> Adjust existing VI schema to reflect that Tegra20 VI is compatible with
> Tegra30 by setti
The ternary operator inside the if block is redundant
because the condition is always true in that context.
This patch removes the unnecessary check and returns `ret` directly.
Signed-off-by: Chelsy Ratnawat
---
drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 d
On 9/3/2025 8:44 PM, Konrad Dybcio wrote:
> On 9/3/25 4:00 PM, Dmitry Baryshkov wrote:
>> On Wed, Sep 03, 2025 at 03:36:34PM +0200, Konrad Dybcio wrote:
>>> On 9/3/25 2:39 PM, Dmitry Baryshkov wrote:
On Wed, Sep 03, 2025 at 02:26:30PM +0200, Konrad Dybcio wrote:
> On 8/21/25 8:55 PM, Akhil
If powering off the system with the S4 flow USB wakeup sources should
be ignored. Add a new callback hcd_pci_poweroff() which will differentiate
whether target state is S5 and pass PMSG_POWEROFF as the message so that
suspend_common() will avoid doing wakeups.
Signed-off-by: Mario Limonciello (AMD
Add CSI node to Tegra20 and Tegra30 device trees.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/boot/dts/nvidia/tegra20.dtsi | 19 ++-
arch/arm/boot/dts/nvidia/tegra30.dtsi | 24 ++--
2 files changed, 40 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot
On Sat, Sep 06, 2025 at 05:17:25PM +0200, Guido Günther wrote:
> Make the clock frequency match what the sdm845 downstream kernel
> uses. Otherwise the panel stays black.
>
> Fixes: 783334f366b18 ("drm/panel: visionox-rm69299: support the variant found
> in the SHIFT6mq")
> Signed-off-by: Guido G
Get_selection operation may be implemented only for sink pad and may
return error code. Set try_crop to 0 instead of returning error.
Signed-off-by: Svyatoslav Ryhel
---
drivers/staging/media/tegra-video/vi.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/sta
Hi Rob,
On Saturday, 6 September 2025 01:26:57 Central European Summer Time Rob Herring
wrote:
> On Fri, Sep 05, 2025 at 12:22:57PM +0200, Nicolas Frattaroli wrote:
> > The Mali-based GPU on the MediaTek MT8196 SoC is shackled to its concept
> > of "MFlexGraphics", which in this iteration include
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