Hi,
There is existing mainline support for the DE2 and DE3 AllWinner display
pipeline IP blocks, used in the A64 and H6 among others, however the H700 (as
well as the H616/H618 and the T507 automotive SoC) have a newer version of the
Display Engine (v3.3/DE33) which adds additional
From: Jernej Skrabec
The DE3 display engine supports YUV formats in addition to RGB.
Add an optional format enumeration function to the engine.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
drivers/gpu/drm/sun4i/sunxi_engine.h | 29
1 file
From: Jernej Skrabec
The display engine formatter (FMT) module is present in the DE3 engine
and provides YUV444 to YUV422/YUV420 conversion, format re-mapping and
color depth conversion.
Add support for this module.
Signed-off-by: Jernej Skrabec
Signed-off-by: Ryan Walklin
---
From: Jernej Skrabec
drm_universal_plane_init() can already call some callbacks, like
format_mod_supported, during initialization. Because of that, fields
should be initialized beforehand.
Signed-off-by: Jernej Skrabec
Co-developed-by: Ryan Walklin
Signed-off-by: Ryan Walklin
---
From: Jernej Skrabec
Currently, only VI layer calls CSC setup function. This comes from DE2
limitation, which doesn't have CSC unit for UI layers. However, DE3 has
separate CSC units for each layer. This allows display pipeline to make
output signal in different color spaces. To support both use
From: Jernej Skrabec
Merging both function into one lets this one decide on it's own if CSC
should be enabled or not. Currently heuristics for that is pretty simple
- enable it for YUV formats and disable for RGB. However, DE3 can have
whole pipeline in RGB or YUV format. YUV pipeline will be
From: Jernej Skrabec
Currently, CSC module takes care only for converting YUV to RGB.
However, DE3 is more suited to work in YUV color space. Change CSC mode
argument to format type to be more neutral. New argument only tells
layer format type and doesn't imply output type.
This commit doesn't
Emma stepped back from VC4 maintenance a while ago, and
all patches are now merged through drm-misc.
Drop Emma's tree from MAINTAINERS.
Signed-off-by: Dave Stevenson
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index b6dd628d5bc6..3deb52366be1
Add myself and our kernel maintenance list as maintainers for
VC4 alongside Maxime.
Signed-off-by: Dave Stevenson
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d1566c647a50..b6dd628d5bc6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@
Adds test for the cmdline parser, connector property, and
drm_analog_tv_mode to ensure the behaviour of the new value is
correct.
Signed-off-by: Dave Stevenson
---
This is v3 from the larger set in
https://patchwork.freedesktop.org/series/130023/
as all patches except this one have been merged
On 20/06/2024 13:42, Laurent Pinchart wrote:
On Thu, Jun 20, 2024 at 09:43:05AM +0300, Tomi Valkeinen wrote:
On 19/06/2024 22:32, Laurent Pinchart wrote:
Hi Jacopo,
Thank you for the patch.
On Wed, Jun 19, 2024 at 12:22:16PM +0200, Jacopo Mondi wrote:
From: Phong Hoang
Add a check to the
Hi Dan,
Thank you for reporting the bug.I will prepare and send a fix-up patch soon.
On 20/06/24 2:20 pm, Dan Carpenter wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hello Manikandan Muralidharan,
>
> Commit aa71584b323a ("drm:
…
> All errors (new ones prefixed by >>):
>
>>> drivers/iio/industrialio-buffer.c:1715:3: error: cannot jump from this goto
>>> statement to its label
> 1715 | goto err_dmabuf_unmap_attachment;
…
Which software design options would you like to try out next
so that such a
On Thu, Jun 20, 2024 at 09:43:05AM +0300, Tomi Valkeinen wrote:
> On 19/06/2024 22:32, Laurent Pinchart wrote:
> > Hi Jacopo,
> >
> > Thank you for the patch.
> >
> > On Wed, Jun 19, 2024 at 12:22:16PM +0200, Jacopo Mondi wrote:
> >> From: Phong Hoang
> >>
> >> Add a check to the register
Drop Sam Ravnborg and Boris Brezillon as they are no longer interested in
maintaining the drivers. Add myself and Dharma Balasubiramani as the
Maintainer and co-maintainer for Microchip's Atmel-HLCDC driver.
Thanks for their work.
Signed-off-by: Manikandan Muralidharan
---
MAINTAINERS | 4 ++--
Hi Christian and Amaranath,
On 12.06.2024 14:02, Karolina Stolarek wrote:
Introduce tests for ttm_bo_validate()/ttm_bo_init_validate() that exercise
simple BO placement as well as eviction (including the case where the evict
domain also requires eviction to fit the incoming buffer). Prepare
hi Dmitry
We checked the panel-boe-th101mb31ig002-28a.c driver. Although the
init_code is similar, the IC does not seem to be the same from the
name, and our panel and timing are also different.
On Sat, Jun 15, 2024 at 1:25 AM Dmitry Baryshkov
wrote:
>
> On Fri, Jun 14, 2024 at 10:56:09PM GMT,
On 19/06/2024 17:39, Thomas Hellström wrote:
The caching mode for buffer objects with VRAM as a possible
placement was forced to write-combined, regardless of placement.
However, write-combined system memory is expensive to allocate and
even though it is pooled, the pool is expensive to shrink,
On Wed, 19 Jun 2024 23:29:02 -0700, Jeff Johnson wrote:
> make allmodconfig && make W=1 C=1 reports:
> WARNING: modpost: missing MODULE_DESCRIPTION() in
> drivers/gpu/drm/tests/drm_hdmi_state_helper_test.o
>
> Add the missing invocation of the MODULE_DESCRIPTION() macro.
>
>
Applied to
On Wed, 19 Jun 2024 16:39:13 +0100, Dave Stevenson wrote:
> All the handling for the properties was present, but they
> were never attached to the connector to allow userspace
> to change them.
>
> Add them to the connector.
>
>
> [...]
Applied to misc/kernel.git (drm-misc-next).
Thanks!
On Wed, 19 Jun 2024 16:39:12 +0100, Dave Stevenson wrote:
> The VEC supports not producing colour bursts for monochrome output.
> It also has an option for disabling the chroma input to remove
> chroma from the signal.
>
> Now that there is a DRM_MODE_TV_MODE_MONOCHROME defined, plumb
> this in.
On Wed, 19 Jun 2024 16:46:30 +0200, Sebastian Andrzej Siewior wrote:
> PREEMPT_RT has a different locking implementation for ww_mutex. The
> base mutex of struct ww_mutex is declared as struct WW_MUTEX_BASE. The
> latter is defined as `mutex' for non-PREEMPT_RT builds and `rt_mutex'
> for
Hello Manikandan Muralidharan,
Commit aa71584b323a ("drm: atmel-hlcdc: add driver ops to
differentiate HLCDC and XLCDC IP") from Apr 24, 2024 (linux-next),
leads to the following Smatch static checker warning:
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c:573
On Thu, Jun 20, 2024 at 2:37 PM Thomas Zimmermann wrote:
>
> Hi
>
> Am 20.06.24 um 07:47 schrieb Chen-Yu Tsai:
> > With the recent switch from fbdev-generic to fbdev-dma, the driver now
> > requires the DRM GEM DMA helpers. This dependency is missing, and will
> > cause a link failure if fbdev
This code works, but it's not aligned correctly. Add a couple missing
tabs.
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
We recently added locking to add_queue_mes() but this error path was
overlooked. Add an unlock to the error path.
Fixes: 1802b042a343 ("drm/amdgpu/kfd: remove is_hws_hang and is_resetting")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 1 +
1 file
On 6/19/24 18:21, Jakub Kicinski wrote:
> [Some people who received this message don't often get email from
> k...@kernel.org. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> On Wed, 19 Jun 2024 07:16:20 + Omer Shpigelman wrote:
Are you referring to
On 6/19/24 18:40, Andrew Lunn wrote:
>>> Does this device require IPv4? What about users and infrastructures that
>>> use IPv6 only?
>>> IPv4 is legacy at this point.
>>
>> Gaudi2 supports IPv4 only.
>
> Really? I guess really old stuff, SLIP from 1988 does not support
> IPv6, but i don't
Hi Dave, Sima.
Habanalabs pull request for 6.11.
Adding support for Gaudi2-D product, minor debugfs uapi changes this time.
Just minor features, improvements, code cleanups and bug fixes.
In addition the maintainer change is included.
Full details are in the signed tag.
Thanks,
Ofir
The
No functional modification involved.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c:3171:2-3:
Unneeded semicolon.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c:3185:2-3:
Unneeded semicolon.
On Wed, Jun 19, 2024 at 04:39:11PM GMT, Dave Stevenson wrote:
> static struct kunit_case drm_modes_analog_tv_tests[] = {
> KUNIT_CASE(drm_test_modes_analog_tv_ntsc_480i),
> KUNIT_CASE(drm_test_modes_analog_tv_ntsc_480i_inlined),
> KUNIT_CASE(drm_test_modes_analog_tv_pal_576i),
>
Hi,
Thanks for working on the tests
On Wed, Jun 19, 2024 at 04:39:11PM GMT, Dave Stevenson wrote:
> Adds test for the cmdline parser, connector property, and
> drm_analog_tv_mode to ensure the behaviour of the new value is
> correct.
>
> Signed-off-by: Dave Stevenson
> ---
>
This driver does not have the function to adjust the orientation,
so this function is added.
Signed-off-by: Zhaoxiong Lv
---
Changes between V4 and V3:
- No changes.
---
drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
The K kd101ne3-40ti is a 10.1" WXGA TFT-LCD panel, use
jd9365da controller,which fits in nicely with the existing
panel-jadard-jd9365da-h3 driver.Hence,we add a new compatible
with panel specific config.
Although they have the same control IC, the two panels are different,
and the timing will be
The kingdisplay-kd101ne3 is a 10.1" WXGA TFT-LCD panel with
jadard-jd9365da controller. Hence, we add a new compatible
with panel specific config.
Signed-off-by: Zhaoxiong Lv
---
Changes between V4 and V3:
- 1. Move positions to keep the list sorted.
Currently, the init_code of the jd9365da driver is placed
in the enable() function and sent, but this seems to take
a long time. It takes 17ms to send each instruction (an init
code consists of about 200 instructions), so it takes
about 3.5s to send the init_code. So we moved the sending
of the
This kingdisplay panel uses the jd9365da controller, so add it to
panel-jadard-jd9365da-h3.c driver, but because the init_code and timing
are different, some variables are added in struct jadard_panel_des to
control it.
In addition, since sending init_code in the enable() function takes a long
Hi, Dave, Sima
A single fix this week.
Thanks,
Thomas
drm-xe-fixes-2024-06-20:
Driver Changes:
- Fix for invalid register access
The following changes since commit 6ba59ff4227927d3a8530fc2973b80e94b54d58f:
Linux 6.10-rc4 (2024-06-16 13:40:16 -0700)
are available in the Git repository at:
Hi,
Here's this week drm-misc-next PR
Maxime
drm-misc-next-2024-06-20:
drm-misc-next for 6.11:
UAPI Changes:
- New monochrome TV mode variant
Cross-subsystem Changes:
- dma heaps: Change slightly the allocation hook prototype
Core Changes:
Driver Changes:
- ivpu: various improvements
Add check for the return value of mipi_dsi_dcs_enter_sleep_mode() and
return the error if it fails in order to catch the error.
Signed-off-by: Chen Ni
---
drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Add check for the return value of mipi_dsi_dcs_enter_sleep_mode() and
return the error if it fails in order to catch the error.
Signed-off-by: Chen Ni
---
drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi,
On Wed, Jun 19, 2024 at 09:53:12AM GMT, Alex Deucher wrote:
> On Wed, Jun 19, 2024 at 9:50 AM Alex Deucher wrote:
> >
> > On Tue, Jun 18, 2024 at 7:53 PM Doug Anderson wrote:
> > >
> > > Hi,
> > >
> > > On Tue, Jun 18, 2024 at 3:00 PM Alex Deucher
> > > wrote:
> > > >
> > > > On Tue, Jun
On 19/06/2024 06:19, Tomasz Figa wrote:
> On Wed, Jun 19, 2024 at 1:24 AM Nicolas Dufresne wrote:
>>
>> Le mardi 18 juin 2024 à 16:47 +0900, Tomasz Figa a écrit :
>>> Hi TaoJiang,
>>>
>>> On Tue, Jun 18, 2024 at 4:30 PM TaoJiang wrote:
From: Ming Qian
When the memory type is
On 19/06/2024 22:32, Laurent Pinchart wrote:
Hi Jacopo,
Thank you for the patch.
On Wed, Jun 19, 2024 at 12:22:16PM +0200, Jacopo Mondi wrote:
From: Phong Hoang
Add a check to the register access function when attaching a bridge
device.
I think the desc is missing the "why". I'm guessing
On 19/06/2024 22:29, Laurent Pinchart wrote:
Hi Jacopo,
Thank you for the patch.
CC'ing Tomi.
On Wed, Jun 19, 2024 at 12:22:15PM +0200, Jacopo Mondi wrote:
From: Takeshi Kihara
Version 0.51 of the Renesas R-Car Gen4 TRM reports bit 16 of the
CLOCKSET1 register of the DSI transmitter module
Hi
Am 19.06.24 um 20:40 schrieb Marek Olšák:
Attached is the revert commit that works for me. Tested with Radeon
6800 and Radeon 7900XTX.
Thanks. That's the same revert that I did. Let's see if my bisecting
turns up something.
Best regards
Thomas
Marek
Marek
On Wed, Jun 19, 2024 at
Hi
Am 20.06.24 um 07:47 schrieb Chen-Yu Tsai:
With the recent switch from fbdev-generic to fbdev-dma, the driver now
requires the DRM GEM DMA helpers. This dependency is missing, and will
cause a link failure if fbdev emulation is enabled.
Add the missing dependency.
Fixes: 0992284b4fe4
make allmodconfig && make W=1 C=1 reports:
WARNING: modpost: missing MODULE_DESCRIPTION() in
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.o
Add the missing invocation of the MODULE_DESCRIPTION() macro.
Fixes: eb66d34d793e ("drm/tests: Add output bpc tests")
Signed-off-by: Jeff Johnson
---
With the recent switch from fbdev-generic to fbdev-dma, the driver now
requires the DRM GEM DMA helpers. This dependency is missing, and will
cause a link failure if fbdev emulation is enabled.
Add the missing dependency.
Fixes: 0992284b4fe4 ("drm/mediatek: Use fbdev-dma")
Signed-off-by: Chen-Yu
On 6/19/24 19:33, Jiri Pirko wrote:
> [You don't often get email from j...@resnulli.us. Learn why this is important
> at https://aka.ms/LearnAboutSenderIdentification ]
>
> Thu, Jun 13, 2024 at 10:21:53AM CEST, oshpigel...@habana.ai wrote:
>> This patch set implements the HabanaLabs network
On 6/19/24 11:12 PM, Jason Gunthorpe wrote:
On Mon, Jun 10, 2024 at 04:55:49PM +0800, Lu Baolu wrote:
The domain_alloc_user operation is currently implemented by allocating a
paging domain using iommu_domain_alloc(). This is because it needs to fully
initialize the domain before return. Add a
On Tue, Jun 18, 2024 at 09:18:15AM +0200, Thomas Hellström wrote:
> Use the LRU walker for eviction. This helps
> removing a lot of code with weird locking
> semantics.
>
> The functionality is slightly changed so that
> when trylocked buffer objects are exhausted, we
> continue to interleave
On Tue, Jun 18, 2024 at 09:18:15AM +0200, Thomas Hellström wrote:
> Use the LRU walker for eviction. This helps
> removing a lot of code with weird locking
> semantics.
>
> The functionality is slightly changed so that
> when trylocked buffer objects are exhausted, we
> continue to interleave
Hi Dave, Sima,
Fixes for 6.10. Two weeks worth.
The following changes since commit 6ba59ff4227927d3a8530fc2973b80e94b54d58f:
Linux 6.10-rc4 (2024-06-16 13:40:16 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
On 5/22/2024 3:51 AM, Dmitry Baryshkov wrote:
The HDMI driver already has msm_hdmi_hpd_enable() and
msm_hdmi_hpd_disable() functions. Wire them into the
msm_hdmi_bridge_funcs, so that HPD can be enabled and disabled
dynamically rather than always having HPD events generation enabled.
On 5/22/2024 3:51 AM, Dmitry Baryshkov wrote:
The HDMI block needs to be enabled to properly generate HPD events. Make
sure it is not turned off in the disable paths if HPD delivery is enabled.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
dpu_encoder_helper_phys_cleanup() calls the ctl ops without checking if
the ops are assigned causing discrepancy between its callers where the
checks are performed and the API itself which does not.
Two approaches can be taken: either drop the checks even in the caller
OR add the checks even in
Thu, Jun 13, 2024 at 10:21:53AM CEST, oshpigel...@habana.ai wrote:
>This patch set implements the HabanaLabs network drivers for Gaudi2 ASIC
>which is designed for scaling of AI neural networks training.
>The patch set includes the common code which is shared by all Gaudi ASICs
>and the Gaudi2
These drivers don't use the driver_data member of struct i2c_device_id,
so don't explicitly initialize this member.
This prepares putting driver_data in an anonymous union which requires
either no initialization or named designators. But it's also a nice
cleanup on its own.
While add it, also
>+
>+What: /sys/kernel/debug/habanalabs_cn/hbl_cn/nic_disable_decap
>+What: /sys/kernel/debug/habanalabs_cn/hbl_cn/nic_inject_rx_err
>+What: /sys/kernel/debug/habanalabs_cn/hbl_cn/nic_mac_lane_remap
Don't think debugfs is the correct interface for all this
>
>Add common support for AI scaling over the network. Initialize the hbl_cn
>driver via
>auxiliary bus and serve as its adapter for accessing the device.
A 1200 line patch deserves a bit more of info in the commit msg.
Can you please elaborate what network scaling support is being added in
Hello!
Ideas welcome, especially some way to see what graphics is doing.
I'm unsure about the distro you are using but try package intel_gpu_top.
It displays irqs/s and a bunch of other utilization statistics.
Hope this helps.
--
BR,
Gerhard
Hi Jacopo,
Thank you for the patch.
On Wed, Jun 19, 2024 at 12:22:18PM +0200, Jacopo Mondi wrote:
> Add support for R-Car R8A779H0 V4M which has similar characteristics
> as the already supported R-Car V4H R8A779G0, but with a single output
> channel.
>
> Signed-off-by: Jacopo Mondi
>
> ---
>
Hi Jacopo,
Thank you for the patch.
On Wed, Jun 19, 2024 at 12:22:16PM +0200, Jacopo Mondi wrote:
> From: Phong Hoang
>
> Add a check to the register access function when attaching a bridge
> device.
>
> Signed-off-by: Phong Hoang
> Signed-off-by: Jacopo Mondi
Reviewed-by: Laurent Pinchart
Hi Jacopo,
Thank you for the patch.
CC'ing Tomi.
On Wed, Jun 19, 2024 at 12:22:15PM +0200, Jacopo Mondi wrote:
> From: Takeshi Kihara
>
> Version 0.51 of the Renesas R-Car Gen4 TRM reports bit 16 of the
> CLOCKSET1 register of the DSI transmitter module to be a reserved
> field.
>
> Fix this
On 6/13/2024 11:29 AM, Marijn Suijten wrote:
On 2024-06-13 20:05:11, Dmitry Baryshkov wrote:
Rename dpu_hw_setup_vsync_source functions to make the names match the
implementation: on DPU 5.x the TOP only contains timer setup, while 3.x
and 4.x used MDP_VSYNC_SEL register to select TE source.
On 6/13/2024 11:14 AM, Marijn Suijten wrote:
On 2024-06-13 20:05:10, Dmitry Baryshkov wrote:
Make the DPU driver use the TE source specified in the DT. If none is
specified, the driver defaults to the first GPIO (mdp_vsync0).
mdp_vsync_p?
Signed-off-by: Dmitry Baryshkov
---
On 6/13/2024 10:05 AM, Dmitry Baryshkov wrote:
Make the DPU driver use the TE source specified in the DT. If none is
specified, the driver defaults to the first GPIO (mdp_vsync0).
as marijn noted,
mdp_vsync0 ---> mdp_vsyncp
Signed-off-by: Dmitry Baryshkov
With that addressed,
On Wed, Jun 19, 2024 at 07:53:23PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 19, 2024 at 02:38:16PM +0300, Ville Syrjälä wrote:
> > On Wed, Jun 12, 2024 at 11:47:03PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > intel_surf_alignment() in particular has devolved into
> > > a
On 6/13/2024 10:05 AM, Dmitry Baryshkov wrote:
Command mode panels provide TE signal back to the DSI host to signal
that the frame display has completed and update of the image will not
cause tearing. Usually it is connected to the first GPIO with the
mdp_vsync function, which is the default.
On 5/22/2024 3:51 AM, Dmitry Baryshkov wrote:
Supporting simultaneous check of native HPD and the external GPIO proved
to be less stable than just native HPD. Drop the hpd-gpios support,
leaving just the native HPD support. In case the native HPD doesn't work
the user is urged to switch to
Timeouts on the AUX bus are to be expected in certain normal operating
conditions. There is no need to raise an error log or re-initialize the
whole AUX state machine. Simply acknowledge the AUX_ERR interrupt and
let upper layers know about the timeout.
Signed-off-by: Lucas Stach
Reviewed-by:
All AUX error responses raise the AUX_ERR interrupt, so there is no
need to read the AUX status register in normal operation. Only read
the status when an error occurred and we can expect a different
status than OK.
Signed-off-by: Lucas Stach
Reviewed-by: Robert Foss
Tested-by: Heiko Stuebner
The PLL will be reconfigured later, which may cause it to go out of lock
anyway, so there is no point in waiting for the PLL to lock here. Instead
we can continue execution of the link setup, which will properly set the
PLL parameters and will wait for the PLL to lock at the appropriate times.
Move the wait loop into its own function, so it doesn't need to be
replicated in multiple locations. Also move the PLL lock checks between
setting the link bandwidth, which may cause the PLL to unlock, and the
MACRO_RST which needs the PLL to be locked.
Signed-off-by: Lucas Stach
Reviewed-by:
Attached is the revert commit that works for me. Tested with Radeon
6800 and Radeon 7900XTX.
Marek
Marek
On Wed, Jun 19, 2024 at 9:50 AM Thomas Zimmermann wrote:
>
> Hi
>
> Am 13.06.24 um 07:59 schrieb Marek Olšák:
> > Hi Thomas,
> >
> > Commit 9eac534db0013aff9b9124985dab114600df9081 as per
On 6/13/24 10:02, Ben Skeggs wrote:
Signed-off-by: Ben Skeggs
...
+
+MODULE_LICENSE("GPL and additional rights");
+module_init(nvkm_init);
+module_exit(nvkm_exit);
missing MODULE_DESCRIPTION() which will cause a warning with make W=1
Make sure the controller is in a basic working state after runtime
resume. Keep the analog function enable in the mode set path as this
enables parts of the PHY that are only required to be powered when
there is a data stream being sent out.
Signed-off-by: Lucas Stach
Reviewed-by: Robert Foss
This isn't used, but gives the impression of the power on and power off
platform calls being non-symmetrical. Remove the unused callback and
rename the power_on_start to simply power_on.
Signed-off-by: Lucas Stach
Reviewed-by: Robert Foss
Tested-by: Heiko Stuebner (rk3288-veyron and
Platform and PHY power isn't only required when the actual display data
stream is active, but may be required earlier to support AUX channel
transactions. Move them into the runtime PM calls, so they are properly
managed whenever various other parts of the driver need them to be active.
There is no reason to enable the controller clock in driver probe, as
there is no HW initialization done in this function. Instead rely on
either runtime PM to handle the controller clock or statically enable
it in the driver bind routine, after which real hardware access is
required to work.
Now that the clock is handled dynamically through
analogix_dp_resume/suspend and it isn't statically enabled in the
driver probe routine, there is no need for the remove function anymore.
Signed-off-by: Lucas Stach
Reviewed-by: Robert Foss
Tested-by: Heiko Stuebner (rk3288-veyron and
The clock is already managed by runtime PM, which is properly invoked
from the analogix_dp_set_bridge function, so there is no need for an
additional reference.
Signed-off-by: Lucas Stach
Reviewed-by: Robert Foss
Tested-by: Heiko Stuebner (rk3288-veyron and rk3399-gru)
---
Hook up the runtime PM suspend/resume paths to make the rockchip
glue behave more like the exynos one. The same suspend/resume
functions are used for system sleep via the runtime PM force
suspend/resume.
Signed-off-by: Lucas Stach
Reviewed-by: Robert Foss
Reviewed-by: Heiko Stuebner
Tested-by:
This check is way too late in the DP enable flow. The PLL must be
locked much earlier, before any link training can happen. If the
PLL is unlocked at that point in time there is something seriously
wrong in the enable flow.
Signed-off-by: Lucas Stach
Reviewed-by: Robert Foss
Tested-by: Heiko
AUX transactions require the controller to be in working state and
take a runtime PM reference. To avoid potential races beween the
first transactions on the bus and runtime PM being set up, move the
AUX registration behind the runtime PM setup.
Signed-off-by: Lucas Stach
Reviewed-by: Robert
Setting the link bandwidth may change the PLL parameters, which will cause
the PLL to go out of lock, so make sure to apply the MACRO_RST, which
according to the comment is required to be pulsed after the PLL is locked.
Signed-off-by: Lucas Stach
Reviewed-by: Robert Foss
Tested-by: Heiko
On 5/22/2024 3:51 AM, Dmitry Baryshkov wrote:
Expand the HDMI_CFG() macro in HDMI config description. It has no added
value other than hiding some boilerplate declarations.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/hdmi/hdmi.c | 16
On 5/22/2024 3:51 AM, Dmitry Baryshkov wrote:
As these clocks are now used in the runtime PM callbacks, they have no
connection to 'HPD'. Rename corresponding fields to follow clocks
purpose, to power up the HDMI controller.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
On 5/22/2024 3:51 AM, Dmitry Baryshkov wrote:
It is completely not obvious, but the so-called 'hpd' clocks and
regulators are required for the HDMI host to function properly. Merge
pwr and hpd regulators. Use regulators, clocks and pinctrl to implement
proper runtime PM callbacks.
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode on in OVL.
Before this patch, only the "coverage" mode is supported.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +---
1 file changed, 25 insertions(+), 7
From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
From: Hsiao Chien Sung
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
For more information, there are three pixel blend modes in DRM driver:
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode in Mixer.
Before this patch, only the coverage mode is supported.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
Signed-off-by: Hsiao Chien Sung
---
Hsiao Chien Sung (5):
drm/mediatek: Support "None" blending
From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
On 6/18/2024 8:26 PM, Dmitry Baryshkov wrote:
On Wed, 19 Jun 2024 at 01:56, Abhinav Kumar wrote:
On 6/13/2024 4:20 PM, Abhinav Kumar wrote:
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
The dpu_crtc_atomic_check() already calls the function
_dpu_crtc_check_and_setup_lm_bounds(). There is
Hi Dave & Sima -
The main i915 pull request for v6.11. A bit more commits than usual.
Should've started sending periodic PR's earlier to keep it more
manageable. My bad.
Highlights are BMG display, panel replay enabling, and link training
failure fallback for DP MST.
A big chunk of the commit
On Wed, Jun 19, 2024 at 12:27 PM Christian König
wrote:
>
> Am 18.06.24 um 16:12 schrieb Demi Marie Obenour:
> > On Tue, Jun 18, 2024 at 08:33:38AM +0200, Christian König wrote:
> > > Am 18.06.24 um 02:57 schrieb Demi Marie Obenour:
> > >> On Mon, Jun 17, 2024 at 10:46:13PM +0200, Marek
On Wed, Jun 19, 2024 at 12:16:47PM +0300, Sergey Shtylyov wrote:
> On 6/19/24 10:54 AM, Jiapeng Chong wrote:
>
> > The function are defined in the rcar_cmm.c file, but not called
>
>s/are/is/.
>
> > elsewhere, so delete the unused function.
>
>Anywhere, maybe?
I'll fix those.
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