Move the variables tracking the current dynamic state into a struct
to separate it a bit better from the static device properties.
Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
---
v2/v3: no changes
---
drivers/gpu/ipu-v3/ipu-pre.c | 27 +++
1 file changed, 15
reconfiguration of the buffer layout from
one frame to another. As switching between (super-)tiled and linear
prefetch needs to touch the CTRL register make sure to do the
reconfiguration inside the safe window.
Signed-off-by: Lucas Stach
---
v3:
- remove unnecessary copy of safe_window_end in local
, so time spent away from the CPU is not
accounted against the timeout budget.
Signed-off-by: Lucas Stach
---
v3: new patch
---
drivers/gpu/ipu-v3/ipu-pre.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-pre.c b/drivers/gpu/ipu-v3
Am Freitag, dem 26.01.2024 um 17:46 +0100 schrieb Lucas Stach:
> The etnaviv devcoredump is created in the GPU reset path, which
> must make forward progress to avoid stalling memory reclaim on
> unsignalled dma fences. The currently used __GFP_NORETRY does not
> prohibit sleepi
Am Donnerstag, dem 25.01.2024 um 12:07 +0100 schrieb Philipp Zabel:
> Turn the etnaviv_is_model_rev() macro into a static inline function.
> Use the raw model number as a parameter instead of the chipModel_GC
> defines. This reduces synchronization requirements for the generated
> headers. For
Am Montag, dem 01.04.2024 um 12:26 +0200 schrieb Christian Gmeiner:
> >
> > Core in platform_driver_register() already sets the .owner, so driver
> > does not need to. Whatever is set here will be anyway overwritten by
> > main driver calling platform_driver_register().
> >
> > Signed-off-by:
and there is no need to disable TS when we need to move the
linear window.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
Hi Robert,
Am Dienstag, dem 07.05.2024 um 15:10 +0200 schrieb Robert Foss:
> On Fri, May 3, 2024 at 5:12 PM Lucas Stach wrote:
> >
> > Currently the AUX channel support in the Analogix DP driver is severely
> > limited as the AUX block of the bridge is only initialized wh
Hi Tomeu,
Am Mittwoch, dem 24.04.2024 um 08:37 +0200 schrieb Tomeu Vizoso:
> If we expose a render node for NPUs without rendering capabilities, the
> userspace stack will offer it to compositors and applications for
> rendering, which of course won't work.
>
> Userspace is probably right in not
Hi João Paulo,
Am Dienstag, dem 07.05.2024 um 15:17 -0300 schrieb João Paulo
Gonçalves:
> Hello all,
>
> I did run some benchmark on i.MX8MM GPU and I have some concerns on the
> differences between mainline Linux/etnaviv/Mesa and the proprietary
> NXP/Vivante
> solution.
>
> The tests were
Timeouts on the AUX bus are to be expected in certain normal operating
conditions. There is no need to raise an error log or re-initialize the
whole AUX state machine. Simply acknowledge the AUX_ERR interrupt and
let upper layers know about the timeout.
Signed-off-by: Lucas Stach
---
drivers
Move the wait loop into its own function, so it doesn't need to be
replicated in multiple locations. Also move the PLL lock checks between
setting the link bandwidth, which may cause the PLL to unlock, and the
MACRO_RST, which needs the PLL to be locked.
Signed-off-by: Lucas Stach
---
.../drm
All AUX error responses raise the AUX_ERR interrupt, so there is no
need to read the AUX status register in normal operation. Only read
the status when an error occured and we can expect a different status
than OK.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index d267cf05cbca..e9c643a8b6fc
Setting the link bandwidth may change the PLL parameters, which will cause
the PLL to go out of lock, so make sure to apply the MACRO_RST, which
according to the comment is required to be pulsed after the PLL is locked.
Signed-off-by: Lucas Stach
---
.../gpu/drm/bridge/analogix
This check is way too late in the DP enable flow. The PLL must be locked
much earlier, before any link training can happen. If the PLL is unlocked
at that point in time there is something seriously wrong in the enable flow.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/bridge/analogix
Make sure the controller is in a basic working state after runtime
resume. Keep the analog function enable in the mode set path as this
enables parts of the PHY that are only required to be powered when
there is a data stream being sent out.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/bridge
Now that the clock is handled dynamically through
analogix_dp_resume/suspend and it isn't statically enabled in the
driver probe routine, there is no need for the remove function anymore.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 5 -
drivers/gpu
This isn't used, but gives the impression of the power on and power off
platform calls being non-symmetrical. Remove the unused callback and
rename the power_on_start to simplay power_on.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 7 ++-
drivers/gpu
.
Signed-off-by: Lucas Stach
---
.../drm/bridge/analogix/analogix_dp_core.c| 78 +++
1 file changed, 45 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 0af2a70ae5bf
-off-by: Lucas Stach
---
.../drm/bridge/analogix/analogix_dp_core.c| 23 ---
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 311e1e67486d..3281c00a39cd
the driver to allow AUX transactions before the video link is
active.
As this requires to rework some of the controller initialization and
also handling of both internal and external clocks, the series includes
quite a few changes to add better runtime PM handling.
Lucas Stach (14):
drm/bridge
AUX transactions require the controller to be in working state and
take a runtime PM reference. To avoid potential races beween the
first transactions on the bus and runtime PM being set up, move the
AUX registration behind the runtime PM setup.
Signed-off-by: Lucas Stach
---
.../drm/bridge
The clock is already managed by runtime PM, which is properly invoked
from the analogix_dp_set_bridge function, so there is no need for an
additional reference.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +--
1 file changed, 1 insertion(+), 10
Hook up the runtime PM suspend/resume paths to make the rockchip
glue behave more like the exynos one. The same suspend/resume
functions are used for system sleep via the runtime PM force
suspend/resume.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 13
Hi Dave, Sima,
please pull the following fixes for the upcoming -rc.
One small fix to properly disable TX clock gating on cores where it is
known to be broken.
The other patch is a bit more controversial, as it reverts a UAPI
change that was introduced in the last merge window to better support
reconfiguration of the buffer layout from
one frame to another. As switching between (super-)tiled and linear
prefetch needs to touch the CTRL register make sure to do the
reconfiguration inside the safe window.
Signed-off-by: Lucas Stach
---
v2:
- move modifier configuration into separate function
- move
Move the variables tracking the current dynamic state into a struct
to separate it a bit better from the static device properties.
Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-pre.c | 27 +++
1 file changed, 15 insertions(+), 12
Am Donnerstag, dem 04.04.2024 um 10:17 +0200 schrieb Lucas Stach:
> Old and new state parameters are swapped, so the old state was cleared
> instead of the new duplicated state.
>
To be clear, as the commit message may do a poor job at conveying the
consequences: this fixes a major me
Am Dienstag, dem 09.04.2024 um 10:34 +1000 schrieb Dave Airlie:
> From: Dave Airlie
>
> Running a lot of VK CTS in parallel against nouveau, once every
> few hours you might see something like this crash.
>
> BUG: kernel NULL pointer dereference, address: 0008
> PGD 800114e6e067
Am Donnerstag, dem 04.04.2024 um 15:15 +0200 schrieb Helge Deller:
> On 4/4/24 14:18, Lucas Stach wrote:
> > This change strips $abs_srctree of the input file containing the
> > PNM data in the generated output. The motivation for this change
> > is Yocto emi
.c
in package linux-foo-src contains reference to TMPDIR
So this change brings us one step closer to make the build result
reproducible independent of the build path.
Signed-off-by: Lucas Stach
---
drivers/video/logo/pnmtologo.c | 14 +-
1 file changed, 13 insertions(+), 1
Old and new state parameters are swapped, so the old state was cleared
instead of the new duplicated state.
Fixes: 903674588a48 ("drm/atomic-helper: Add format-conversion state to
shadow-plane state")
Signed-off-by: Lucas Stach
Tested-by: Leonard Göhrs
---
drive
From: Wyon Bi
There is no need for separate functions for each lane, as we can deduct the
register offset to read/write from the lane index.
Signed-off-by: Wyon Bi
Signed-off-by: Lucas Stach
---
.../drm/bridge/analogix/analogix_dp_core.c| 97 ++-
.../drm/bridge/analogix
Take a early return from the clock recovery training when the sink reports
CR_DONE for all lanes. There is no point in trying to adjust the link
parameters further.
Signed-off-by: Lucas Stach
---
.../drm/bridge/analogix/analogix_dp_core.c| 58 +--
1 file changed, 29
Address only transactions without any data are valid and should not
be flagged as short transactions. Simply return the message size when
no transaction errors occured.
CC: sta...@vger.kernel.org
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 5 +
1 file
some id values
Justin Stitt (1):
drm/etnaviv: Replace strncpy with strscpy_pad
Lucas Stach (1):
drm/etnaviv: disable MLCG and pulse eater on GPU reset
Sui Jingfeng (6):
drm/etnaviv: Drop the second argument of the etnaviv_gem_new_impl()
drm/etnaviv: Fix coding style
Hi Christian,
prefix for etnaviv kernel patches should be "drm/etnaviv: ..."
Am Donnerstag, dem 29.02.2024 um 20:55 +0100 schrieb Christian Gmeiner:
> From: Christian Gmeiner
>
> The hwdb selection logic as a feature that allows it to mark some fields
> as 'don't care'. If we match with such a
The dma sync operation needs to be done with DMA_BIDIRECTIONAL when
the BO is prepared for both read and write operations. With the
current inverted if ladder it would only be synced for DMA_FROM_DEVICE.
Fixes: a8c21a5451d8 ("drm/etnaviv: add initial etnaviv DRM driver")
Signed-off
allows background reclaim
to be triggered, but avoids any stalls waiting for direct reclaim.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_dump.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_dump.c
b/drivers/gpu/drm
Am Donnerstag, dem 25.01.2024 um 17:27 +0100 schrieb Christian Gmeiner:
> Hi Philipp
>
> >
> > Turn the etnaviv_is_model_rev() macro into a static inline function.
> > Use the raw model number as a parameter instead of the chipModel_GC
> > defines. This reduces synchronization requirements
Am Mittwoch, dem 24.01.2024 um 10:22 +0100 schrieb Philipp Zabel:
> Disable SH_EU clock gating for the VIPNano-Si+ NPU on i.MX8MP.
> Taken from linux-imx lf-6.1.36-2.1.0, specifically [1].
>
> [1]
>
ividers. Add the extra limit.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Lucas Stach
> ---
> Cc: Andrzej Hajda
> Cc: Daniel Vetter
> Cc: David Airlie
> Cc: Jernej Skrabec
> Cc: Jonas Karlman
> Cc: Laurent Pinchart
> Cc: Lucas Stach
> Cc: Neil
The VOP2 driver needs this port ID to properly configure the
display data routing.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
b/drivers/gpu/drm/rockchip
Hi Fabio,
Am Dienstag, dem 12.12.2023 um 15:28 -0300 schrieb Fabio Estevam:
> Hi Lucas,
>
> On Tue, Dec 12, 2023 at 3:19 PM Lucas Stach wrote:
>
> > I don't really like this series. While we don't make any strong
> > guarantees in this way, it breaks booting older kerne
Hi Fabio,
Am Montag, dem 11.12.2023 um 17:41 -0300 schrieb Fabio Estevam:
> From: Fabio Estevam
>
> On i.MX6SX, the LCDIF has an associated power domain.
>
> However, i.MX8MQ does not have an LCDIF power domain.
>
> imx8mq.dtsi has the following compatible string:
>
> compatible =
Am Donnerstag, dem 07.12.2023 um 08:43 +0100 schrieb Christian Gmeiner:
> From: Christian Gmeiner
>
> 0x1540 is the address of 4th render target address pair (two pixel pipes).
>
Are there any corresponding TS states for this region?
Regards,
Lucas
> Signed-off-by: Christian Gmeiner
> ---
>
Am Donnerstag, dem 02.11.2023 um 11:48 +0100 schrieb Christian König:
[...]
> I was considering to change the dma_fence semantics so that
> dma_fence_signal() could only be called from the interrupt contexts of
> devices and then put a big fat WARN_ON(!in_interrupt()) in there.
>
> It's a
Am Samstag, dem 07.10.2023 um 15:03 +0800 schrieb Sui Jingfeng:
> The 'len' parameter is the 4th argument, because it is not get used, so
> drop it. No functional change.
>
> Signed-off-by: Sui Jingfeng
Thanks, applied to my etnaviv/next branch.
Regards,
Lucas
> ---
>
Am Montag, dem 02.10.2023 um 19:12 +0800 schrieb Sui Jingfeng:
> v2:
> * refine on v1 and update
>
Thanks, series applied to my etnaviv/next branch.
Regards,
Lucas
> Sui Jingfeng (5):
> drm/etnaviv: Drop the second argument of the etnaviv_gem_new_impl()
> drm/etnaviv: Fix coding style
Am Montag, dem 18.09.2023 um 13:34 + schrieb Justin Stitt:
> `strncpy` is deprecated for use on NUL-terminated destination strings [1].
>
> We should prefer more robust and less ambiguous string interfaces.
>
> A suitable replacement is `strscpy_pad` due to the fact that it
> guarantees
Hi all,
recently I've been looking at inconsistent frame times in one of our
graphics workloads and it seems the culprit lies within the MM
subsystem. During workload execution sporadically some graphics
buffers, which are typically single digit megabytes in size, are freed.
The pages are freed
Hi Luca,
Am Freitag, dem 29.09.2023 um 18:48 +0200 schrieb Luca Ceresoli:
> Hi Lucas,
>
> On Thu, 28 Sep 2023 14:55:35 +0200
> Lucas Stach wrote:
>
> > Add binding for the i.MX8MP HDMI parallel video interface block.
> >
> > Signed-off-by: Lucas Stach
to act in bypass mode.
Signed-off-by: Lucas Stach
Reviewed-by: Luca Ceresoli (v2)
Tested-by: Marek Vasut (v1)
Tested-by: Luca Ceresoli (v2)
Tested-by: Richard Leitner (v2)
Tested-by: Frieder Schrempf (v2)
Reviewed-by: Laurent Pinchart (v3)
---
drivers/gpu/drm/bridge/imx/Kconfig
Add binding for the i.MX8MP HDMI parallel video interface block.
Signed-off-by: Lucas Stach
Reviewed-by: Laurent Pinchart
---
.../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 83 +++
1 file changed, 83 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display
a modeset.
For now just always force a modeset when the FB format changes to
properly reconfigure all parts of the device for the new format.
Signed-off-by: Lucas Stach
Reviewed-by: Marek Vasut
---
v3: no changes
v2: fix indentation
---
drivers/gpu/drm/mxsfb/lcdif_drv.c | 18
The buffer pitch may change when switching the buffer on a
atomic update. As the register is double buffered it can be
safely changed while the display is active.
Signed-off-by: Lucas Stach
Reviewed-by: Marek Vasut
---
v2/3: no changes
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 26
and then shut down DMA.
Signed-off-by: Lucas Stach
---
v3: new patch
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 23 ---
1 file changed, 8 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c
b/drivers/gpu/drm/mxsfb/lcdif_kms.c
index e277592e5fa5..6a292f4b332b
The display clock only required to be running when the CRTC
is enabled, so we have well defined points in the DRM atomic
sequence when this clock should be enabled or disabled.
Signed-off-by: Lucas Stach
---
v3: new patch
---
drivers/gpu/drm/mxsfb/lcdif_drv.c | 4
drivers/gpu/drm/mxsfb
Now that the plane state is fully programmed into the hardware before
the scanout is started there is no need to program the plane framebuffer
DMA address from the CRTC atomic_enable anymore.
Signed-off-by: Lucas Stach
Reviewed-by: Marek Vasut
---
v2/3: no changes
---
drivers/gpu/drm/mxsfb
-by: Lucas Stach
---
v3: add static qualifier
v2: new patch
---
drivers/gpu/drm/mxsfb/lcdif_drv.c | 22 +-
drivers/gpu/drm/mxsfb/lcdif_kms.c | 12 ++--
2 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/lcdif_drv.c
b/drivers/gpu/drm/mxsfb
The comment regarding AXI bust size configuration is a bit hard
to read. Improve the wording somewhat.
Signed-off-by: Lucas Stach
Reviewed-by: Marco Felsch
Reviewed-by: Marek Vasut
---
v3: no changes
v2: Some more rewording.
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 8
1 file changed
The CTRLDESCL0_5 register also holds other bits that are not related to the
format, which should not be overwritten when the format is set up. Use a
proper RMW access in lcdif_set_formats().
Signed-off-by: Lucas Stach
---
v3: no changes
v2: new patch
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 40
Am Freitag, dem 22.09.2023 um 09:51 + schrieb Ying Liu:
> On Friday, September 22, 2023 4:03 AM Lucas Stach
> wrote:
> > drm_atomic_helper_commit_tail_rpm makes it hard for drivers to follow
> > the documented encoder/bridge enable flow, as it commits all CRTC enables
>
The buffer pitch may change when switching the buffer on a
atomic update. As the register is double buffered it can be
safely changed while the display is active.
Signed-off-by: Lucas Stach
Reviewed-by: Marek Vasut
---
v2: no changes
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 26
The comment regarding AXI bust size configuration is a bit hard
to read. Improve the wording somewhat.
Signed-off-by: Lucas Stach
Reviewed-by: Marco Felsch
Reviewed-by: Marek Vasut
---
v2: Some more rewording.
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 8
1 file changed, 4 insertions
The CTRLDESCL0_5 register also holds other bits that are not related to the
format, which should not be overwritten when the format is set up. Use a
proper RMW access in lcdif_set_formats().
Signed-off-by: Lucas Stach
---
v2: new patch
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 40
Now that the plane state is fully programmed into the hardware before
the scanout is started there is no need to program the plane framebuffer
DMA address from the CRTC atomic_enable anymore.
Signed-off-by: Lucas Stach
Reviewed-by: Marek Vasut
---
v2: no changes
---
drivers/gpu/drm/mxsfb
-by: Lucas Stach
---
v2: new patch
---
drivers/gpu/drm/mxsfb/lcdif_drv.c | 22 +-
drivers/gpu/drm/mxsfb/lcdif_kms.c | 12 ++--
2 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/lcdif_drv.c
b/drivers/gpu/drm/mxsfb/lcdif_drv.c
index
a modeset.
For now just always force a modeset when the FB format changes to
properly reconfigure all parts of the device for the new format.
Signed-off-by: Lucas Stach
Reviewed-by: Marek Vasut
---
v2: fix indentation
---
drivers/gpu/drm/mxsfb/lcdif_drv.c | 18 +-
drivers/gpu
Am Donnerstag, dem 21.09.2023 um 08:18 + schrieb Ying Liu:
> On Thursday, September 21, 2023 3:55 PM Lucas Stach
> wrote:
> > Am Donnerstag, dem 21.09.2023 um 07:13 + schrieb Ying Liu:
> > > Hi,
> > >
> > > On Wednesday, September 20, 2023 6:31 P
Am Donnerstag, dem 21.09.2023 um 07:34 + schrieb Ying Liu:
> Hi,
>
> On Wednesday, September 20, 2023 6:31 PM Lucas Stach
> wrote:
> > Force a modeset if the new FB has a different format than the
> > currently active one. While it might be possible to change betwee
Am Donnerstag, dem 21.09.2023 um 07:13 + schrieb Ying Liu:
> Hi,
>
> On Wednesday, September 20, 2023 6:31 PM Lucas Stach
> wrote:
> > Allow drm_atomic_helper_commit_tail_rpm to setup all the plane
> > state before the scanout is started.
> >
to act in bypass mode.
Signed-off-by: Lucas Stach
Reviewed-by: Luca Ceresoli (v2)
Tested-by: Marek Vasut (v1)
Tested-by: Luca Ceresoli (v2)
Tested-by: Richard Leitner (v2)
Tested-by: Frieder Schrempf (v2)
---
drivers/gpu/drm/bridge/imx/Kconfig | 7 +
drivers/gpu/drm/bridge/imx
Add binding for the i.MX8MP HDMI parallel video interface block.
Signed-off-by: Lucas Stach
---
.../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 80 +++
1 file changed, 80 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
The comment regarding AXI bust size configuration is a bit hard
to read. Improve the wording somewhat.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c
b/drivers/gpu
/caockunwmu6tjwwtnu+coggrr--g19evzahrxap0-0i5dk39...@mail.gmail.com/
Lucas Stach (5):
drm: lcdif: improve burst size configuration comment
drm: lcdif: move controller enable into atomic_flush
drm: lcdif: remove superfluous setup of framebuffer DMA address
drm: lcdif: move pitch setup to plane atomic
The buffer pitch may change when switching the buffer on a
atomic update. As the register is double buffered it can be
safely changed while the display is active.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 26 +-
1 file changed, 13 insertions
Allow drm_atomic_helper_commit_tail_rpm to setup all the plane
state before the scanout is started.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c
b/drivers/gpu/drm
a modeset.
For now just always force a modeset when the FB format changes to
properly reconfigure all parts of the device for the new format.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/mxsfb/lcdif_drv.c | 18 +-
drivers/gpu/drm/mxsfb/lcdif_kms.c | 26
Now that the plane state is fully programmed into the hardware before
the scanout is started there is no need to program the plane framebuffer
DMA address from the CRTC atomic_enable anymore.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 10 --
1 file changed, 10
/etnaviv: fix error code in event_alloc()
Lucas Stach (12):
drm/etnaviv: slow down FE idle polling
drm/etnaviv: fix dumping of active MMU context
drm/etnaviv: add HWDB entry for VIP8000 Nano r8002
drm/etnaviv: add HWDB entry for GC520 r5341 c204
drm/etnaviv: move down
Jander
Signed-off-by: Lucas Stach
Reviewed-by: Marek Vasut
Tested-by: Marek Vasut # TC9595
Reviewed-by: Marek Vasut
---
v2: correct comment
---
drivers/gpu/drm/bridge/tc358767.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/tc358767.c
b
lue equal to the HFP + 10 for DSI->DP
use-case. For DSI->DPI this value should be > 2 and for DPI->DP
it seems to always be 0x64.
Signed-off-by: David Jander
Signed-off-by: Lucas Stach
Tested-by: Marek Vasut # TC9595
Reviewed-by: Marek Vasut
---
drivers/gpu/drm/bridge/tc358767.c
Hi Dan,
Am Mittwoch, dem 19.07.2023 um 13:17 +0300 schrieb Dan Carpenter:
> There are two "ret" variables declared in this function so setting
> "ret = -EBUSY;" sets the wrong one. The function ends up returning an
> uninitialized variable.
>
Thanks for the fix. Applied to the etnaviv/next
Hi Jingfeng,
Am Mittwoch, dem 19.07.2023 um 00:16 +0800 schrieb suijingfeng:
> Hi,
> > >
[...]
> > > I don't think you are right here.
> > >
> > Yes, clearly I was not taking into account the differences between
> > drm_gem_private_object_init and drm_gem_object_init properly. Please
> >
Hi Jingfeng,
Am Dienstag, dem 18.07.2023 um 02:34 +0800 schrieb suijingfeng:
> Hi, Lucas
>
>
> Thanks for you guidance!
>
>
> On 2023/7/17 17:51, Lucas Stach wrote:
> > Hi Jingfeng,
> >
> > Am Freitag, dem 23.06.2023 um 18:08 +0800 schrieb
Am Montag, dem 17.07.2023 um 18:12 +0800 schrieb Sui Jingfeng:
> Hi
>
> On 2023/7/17 17:43, Lucas Stach wrote:
> > Hi Jingfeng,
> >
> > Am Freitag, dem 23.06.2023 um 18:08 +0800 schrieb Sui Jingfeng:
> > > From: Sui Jingfeng
> > >
> > > B
Hi Jingfeng,
Am Montag, dem 17.07.2023 um 16:36 +0800 schrieb suijingfeng:
> Hi, Dear etnaviv folks
>
>
> Would you like to review this cleanup patch set ?
>
> I am asking because I'm wondering that
>
> if I should re-spin my other patch from the code base
>
> which *with* this series
Am Freitag, dem 23.06.2023 um 18:08 +0800 schrieb Sui Jingfeng:
> From: Sui Jingfeng
>
> This make the code in etnaviv_pdev_probe() less twisted, drop the reference
> to device node after finished. Also kill a double blank line.
>
I can't spot the double blank line you claim to remove.
>
Am Freitag, dem 23.06.2023 um 18:08 +0800 schrieb Sui Jingfeng:
> From: Sui Jingfeng
>
> Because the 'else' is not generally useful after the 'return'.
While your cleanup is a correct rewrite of the function, the current
code in this function is bogus, as we need to check for the
bidirectional
Hi Jingfeng,
Am Freitag, dem 23.06.2023 um 18:08 +0800 schrieb Sui Jingfeng:
> From: Sui Jingfeng
>
> Because it is not used by the etnaviv_gem_new_impl() function,
> no functional change.
>
I think it would make sense to move into the opposite direction: in
both callsites of
Hi Jingfeng,
Am Freitag, dem 23.06.2023 um 18:08 +0800 schrieb Sui Jingfeng:
> From: Sui Jingfeng
>
> Because the etnaviv_gem_new_private() function receives the size_t argument
> for the number of pages. And the number of pages should be unsigned.
>
> Note that Most 32-bit architectures use
Sorry, accidentally hit sent on the previous mail.
Am Mittwoch, dem 12.07.2023 um 12:39 +0200 schrieb Christian König:
> Am 12.07.23 um 10:59 schrieb Lucas Stach:
> > Am Mittwoch, dem 12.07.2023 um 10:37 +0200 schrieb Christian König:
> > > Am 11.07.23 um 23:34 sch
Am Mittwoch, dem 12.07.2023 um 12:39 +0200 schrieb Christian König:
> Am 12.07.23 um 10:59 schrieb Lucas Stach:
> > Am Mittwoch, dem 12.07.2023 um 10:37 +0200 schrieb Christian König:
> > > Am 11.07.23 um 23:34 schrieb André Almeida:
> > > > Instead of stori
Am Mittwoch, dem 12.07.2023 um 10:37 +0200 schrieb Christian König:
> Am 11.07.23 um 23:34 schrieb André Almeida:
> > Instead of storing coredump information inside amdgpu_device struct,
> > move if to a proper separated struct and allocate it dynamically. This
> > will make it easier to further
Hi,
Am Sonntag, dem 25.06.2023 um 11:51 +0800 schrieb Sui Jingfeng:
> Hi,
>
> On 2023/6/22 01:45, Lucas Stach wrote:
> > Am Donnerstag, dem 22.06.2023 um 01:21 +0800 schrieb Sui Jingfeng:
> > > Hi,
> > >
> > > On 2023/6/21 23:58, Lucas Stach wrote:
&g
Am Samstag, dem 24.06.2023 um 23:53 +0800 schrieb Sui Jingfeng:
> Hi,
>
> On 2023/6/21 18:16, Lucas Stach wrote:
> > Am Mittwoch, dem 21.06.2023 um 17:20 +0800 schrieb Sui Jingfeng:
> > > Hi,
> > >
> > > On 2023/6/21 17:07, Lucas Stach wrote:
> >
Am Donnerstag, dem 22.06.2023 um 01:31 +0800 schrieb Sui Jingfeng:
> Hi,
>
> On 2023/6/22 00:07, Lucas Stach wrote:
> > And as the HW guarantees it on your platform, your platform
> > implementation makes this function effectively a no-op. Skipping the
> > call t
Am Donnerstag, dem 22.06.2023 um 01:21 +0800 schrieb Sui Jingfeng:
> Hi,
>
> On 2023/6/21 23:58, Lucas Stach wrote:
> > Am Mittwoch, dem 21.06.2023 um 23:30 +0800 schrieb Sui Jingfeng:
> > > Hi,
> > >
> > > On 2023/6/21 18:00, Lucas Stach wrote:
> &
1 - 100 of 1756 matches
Mail list logo