Re: [PATCH v2 08/11] drm/i915/psr: Check if source supports sink specific SU granularity

On Mon, 2018-12-03 at 14:45 -0800, Souza, Jose wrote: > On Mon, 2018-12-03 at 12:59 -0800, Dhinakaran Pandiyan wrote: > > On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote: > > > According to eDP spec, sink can required specific selective > > > update > > > granularity that source

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Send DPCD ON for MST before phy_up

On Thu, 2018-04-05 at 17:19 -0400, Lyude Paul wrote: > When doing a modeset where the sink is transitioning from D3 to D0 , it > would sometimes be possible for the initial power_up_phy() to start > timing out. This would only be observed in the last action before the > sink went into D3 mode

Re: [PATCH v2] drm/i915/dp: Send DPCD ON for MST before phy_up

On Thu, 2018-04-05 at 16:36 -0400, Lyude Paul wrote: > When doing a modeset where the sink is transitioning from D3 to D0 , it > would sometimes be possible for the initial power_up_phy() to start > timing out. This would only be observed in the last action before the > sink went into D3 mode

Re: [Intel-gfx] [PATCH v5 04/10] drm/dp_mst: Remove all evil duplicate state pointers

On Mon, 2018-04-02 at 18:47 -0400, Lyude Paul wrote: > There's no reason to track the atomic state three times. Unfortunately, > this is currently what we're doing, and even worse is that there is only > one actually correct state pointer: the one in mst_state->base.state. > mgr->state never seems

Re: [PATCH] i915/dp_mst: Keep AUX block running when disabling DPMS

On Mon, 2018-04-02 at 17:21 -0400, Lyude Paul wrote: > While enabling/disabling DPMS before link training with MST hubs is > perfectly valid; unfortunately disabling DPMS results in some devices > disabling their AUX CH block as well. For SST this isn't as much of a > problem, but for MST we

Re: [Intel-gfx] [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status

On Fri, 2018-03-30 at 19:19 +, Souza, Jose wrote: > On Fri, 2018-03-30 at 11:28 -0700, Pandiyan, Dhinakaran wrote: > > On Wed, 2018-03-28 at 15:30 -0700, José Roberto de Souza wrote: > > > IGT tests could be improved with sink status, knowing for sure that > >

Re: [Intel-gfx] [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status

On Wed, 2018-03-28 at 15:30 -0700, José Roberto de Souza wrote: > IGT tests could be improved with sink status, knowing for sure that > hardware have activate or exit PSR. > > Cc: Dhinakaran Pandiyan > Cc: Rodrigo Vivi > Signed-off-by:

Re: [Intel-gfx] [PATCH v3 05/10] drm/i915/psr/cnl: Enable Y-coordinate support in source

On Wed, 2018-03-28 at 15:30 -0700, José Roberto de Souza wrote: > For Geminilake and Cannonlake+ the Y-coordinate support must be > enabled in PSR2_CTL too. > > Spec: 7713 and 7720 > > Cc: Dhinakaran Pandiyan > Reviewed-by: Rodrigo Vivi

Re: [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4

On Tue, 2018-03-06 at 17:36 -0800, Manasi Navare wrote: > On Wed, Mar 07, 2018 at 12:24:46AM +0000, Pandiyan, Dhinakaran wrote: > > > > > > > > On Tue, 2018-03-06 at 15:24 -0800, Rodrigo Vivi wrote: > > > On Tue, Mar 06, 2018 at 10:37:48AM -0800, mat

Re: [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4

On Tue, 2018-03-06 at 16:48 -0800, Dhinakaran Pandiyan wrote: > > > On Tue, 2018-03-06 at 15:24 -0800, Rodrigo Vivi wrote: > > On Tue, Mar 06, 2018 at 10:37:48AM -0800, matthew.s.atw...@intel.com wrote: > > > From: Matt Atwood > > > > > >

Re: [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4

On Tue, 2018-03-06 at 15:24 -0800, Rodrigo Vivi wrote: > On Tue, Mar 06, 2018 at 10:37:48AM -0800, matthew.s.atw...@intel.com wrote: > > From: Matt Atwood > > > > DP_TRAINING_AUX_RD_INTERVAL with DP 1.3 spec changed bit scheme from 8 > > bits to 7 bits in DPCD

Re: [Intel-gfx] [PATCH 01/10] drm/vblank: Data type fixes for 64-bit vblank sequences.

gt;> Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com> writes: > >>> > >>> > From: "Pandiyan, Dhinakaran" <dhinakaran.pandi...@intel.com> > >>> > > >>> > drm_vblank_count() has an u32 type returning what is a 64-bit vbla

Re: [Intel-gfx] [PATCH] drm/i915: Improve PSR activation timing

On Thu, 2018-02-08 at 23:39 -0800, Rodrigo Vivi wrote: > Rodrigo Vivi <rodrigo.v...@intel.com> writes: > > > "Pandiyan, Dhinakaran" <dhinakaran.pandi...@intel.com> writes: > > > >> On Thu, 2018-02-08 at 14:48 -0800, Rodrigo Vivi wrote: >

Re: [Intel-gfx] [PATCH] drm/i915: Improve PSR activation timing

On Thu, 2018-02-08 at 17:01 -0800, Andy Lutomirski wrote: > > > > On Feb 8, 2018, at 4:39 PM, Pandiyan, Dhinakaran > > <dhinakaran.pandi...@intel.com> wrote: > > > > > >> On Thu, 2018-02-08 at 14:48 -0800, Rodrigo Vivi wrote: > >> Hi

Re: [Intel-gfx] [PATCH] drm/i915: Improve PSR activation timing

On Thu, 2018-02-08 at 14:48 -0800, Rodrigo Vivi wrote: > Hi Andy, > > thanks for getting involved with PSR and sorry for not replying sooner. > > I first saw this patch on that bugzilla entry but only now I stop to > really think why I have written the code that way. > > So some clarity below.

Re: [Intel-gfx] [PATCH 06/10] drm/tegra: Handle 64-bit return from drm_crtc_vblank_count()

On Wed, 2018-02-07 at 10:41 +0100, Thierry Reding wrote: > On Wed, Feb 07, 2018 at 01:41:18AM +0000, Pandiyan, Dhinakaran wrote: > > On Fri, 2018-02-02 at 21:12 -0800, Dhinakaran Pandiyan wrote: > > > 570e86963a51 ("drm: Widen vblank count to 64-bits [v3]") c

Re: [Intel-gfx] [PATCH 06/10] drm/tegra: Handle 64-bit return from drm_crtc_vblank_count()

On Fri, 2018-02-02 at 21:12 -0800, Dhinakaran Pandiyan wrote: > 570e86963a51 ("drm: Widen vblank count to 64-bits [v3]") changed the > return type for drm_crtc_vblank_count() to u64. This could cause > potential problems if the return value is used in arithmetic operations > with a 32-bit

Re: [Intel-gfx] Enabling i915 Panel Self Refresh by default on some devices ?

On Thu, 2018-02-01 at 13:31 +0100, Hans de Goede wrote: > Hi All, > > As you may have heard I've recently been working on improving > Linux laptop battery life, specifically the OOTB experience > without tweaking any options such as e.g. powertop --auto-tune > would do, see: > >

Re: [Intel-gfx] i915 PSR test results and cursor lag

On Mon, 2018-02-05 at 20:35 +, Andy Lutomirski wrote: > On Mon, Feb 5, 2018 at 6:53 PM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote: > > > > > > > > On Sun, 2018-02-04 at 21:50 +, Andy Lutomirski wrote: > >> On Sat, Feb 3, 2018

Re: [Intel-gfx] [PATCH 01/10] drm/vblank: Data type fixes for 64-bit vblank sequences.

t; > >> Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com> writes: > > >> > > >> > From: "Pandiyan, Dhinakaran" <dhinakaran.pandi...@intel.com> > > >> > > > >> > drm_vblank_count() has an u32 type returning

Re: [Intel-gfx] i915 PSR test results and cursor lag

On Sun, 2018-02-04 at 21:50 +, Andy Lutomirski wrote: > On Sat, Feb 3, 2018 at 5:08 PM, Andy Lutomirski <l...@kernel.org> wrote: > > On Sat, Feb 3, 2018 at 5:20 AM, Pandiyan, Dhinakaran > > <dhinakaran.pandi...@intel.com> wrote: > >> > >> On Fr

Re: [Intel-gfx] i915 PSR test results and cursor lag

On Fri, 2018-02-02 at 19:18 +, Andy Lutomirski wrote: > On Fri, Feb 2, 2018 at 1:24 AM, Andy Lutomirski wrote: > > On Thu, Feb 1, 2018 at 9:20 PM, Chris Wilson > > wrote: > >> Quoting Andy Lutomirski (2018-02-01 21:04:30) > >>> I got this after a

Re: [Intel-gfx] [PATCH 4/5] drm/vblank: Restoring vblank counts after device PM events.

On Fri, 2018-01-19 at 00:01 -0800, Rodrigo Vivi wrote: > On Fri, Jan 12, 2018 at 09:57:06PM +, Dhinakaran Pandiyan wrote: > > The HW frame counter can get reset if device enters a low power state after > > vblank interrupts were disabled. This messes up any following vblank count > > update

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Estimate and update missed vblanks.

On Thu, 2018-01-18 at 23:26 -0800, Rodrigo Vivi wrote: > On Fri, Jan 12, 2018 at 09:57:07PM +, Dhinakaran Pandiyan wrote: > > The frame counter may have got reset between disabling and enabling vblank > > interrupts due to DMC putting the hardware to DC5/6 state if PSR was > > active. The

Re: [Intel-gfx] [PATCH 1/5] drm/vblank: Fix return type for drm_vblank_count()

On Thu, 2018-01-18 at 23:36 -0800, Rodrigo Vivi wrote: > On Fri, Jan 12, 2018 at 09:57:03PM +, Dhinakaran Pandiyan wrote: > > drm_vblank_count() has a u32 type returning what is a 64-bit vblank count. > > The effect of this is when drm_wait_vblank_ioctl() tries to widen the user > > space

Re: [Intel-gfx] [PATCH 1/5] drm/vblank: Fix return type for drm_vblank_count()

ping for review. Let me know if there's anything that needs to be done, thanks! On Fri, 2018-01-12 at 13:57 -0800, Dhinakaran Pandiyan wrote: > drm_vblank_count() has a u32 type returning what is a 64-bit vblank count. > The effect of this is when drm_wait_vblank_ioctl() tries to widen the user

Re: [Intel-gfx] [PATCH 1/5] drm/vblank: Fix return type for drm_vblank_count()

On Mon, 2018-01-15 at 10:38 +0100, Daniel Vetter wrote: > On Fri, Jan 12, 2018 at 01:57:03PM -0800, Dhinakaran Pandiyan wrote: > > drm_vblank_count() has a u32 type returning what is a 64-bit vblank count. > > The effect of this is when drm_wait_vblank_ioctl() tries to widen the user > > space

Re: [Intel-gfx] [PATCH] drm/dp: Power cycle display if LINK_ADDRESS fails.

On Thu, 2018-01-04 at 23:46 +, Pandiyan, Dhinakaran wrote: > On Thu, 2018-01-04 at 18:21 -0500, Lyude Paul wrote: > > Sorry for the late reply, I've been having very similar issues on my own > > MST hub > > and I wanted to make sure that they were the same iss

Re: [PATCH] drm/dp: Power cycle display if LINK_ADDRESS fails.

On Thu, 2018-01-04 at 18:21 -0500, Lyude Paul wrote: > Sorry for the late reply, I've been having very similar issues on my own MST > hub > and I wanted to make sure that they were the same issue, although it seems > like > they aren't. > > So; I've been doing a lot of MST debugging this week

Re: [Intel-gfx] [PATCH] drm/dp: Power cycle display if LINK_ADDRESS fails.

On Fri, 2017-12-22 at 00:48 +, Pandiyan, Dhinakaran wrote: > On Thu, 2017-12-21 at 08:53 +0200, Jani Nikula wrote: > > On Wed, 20 Dec 2017, Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com> > > wrote: > > > Occasionally there are LINK_ADDRES

Re: [Intel-gfx] [PATCH v2 6/8] drm/i915: Use an atomic_t array to track power domain use count.

On Thu, 2017-12-21 at 13:37 +0100, Maarten Lankhorst wrote: > Hey, > > Op 19-12-17 om 06:26 schreef Dhinakaran Pandiyan: > > Convert the power_domains->domain_use_count array that tracks per-domain > > use count to atomic_t type. This is needed to be able to read/write the use > > counts outside

Re: [Intel-gfx] [PATCH] drm/dp: Power cycle display if LINK_ADDRESS fails.

On Thu, 2017-12-21 at 10:52 -0800, Manasi Navare wrote: > On Wed, Dec 20, 2017 at 10:36:24PM -0800, Dhinakaran Pandiyan wrote: > > Occasionally there are LINK_ADDRESS sideband messages timing out with the > > Lenovo MST dock + Dell MST monitor(w/ in-built branch) setup I have. These > > failures

Re: [Intel-gfx] [PATCH] drm/dp: Power cycle display if LINK_ADDRESS fails.

On Thu, 2017-12-21 at 08:53 +0200, Jani Nikula wrote: > On Wed, 20 Dec 2017, Dhinakaran Pandiyan > wrote: > > Occasionally there are LINK_ADDRESS sideband messages timing out with the > > Lenovo MST dock + Dell MST monitor(w/ in-built branch) setup I have. These >

Re: [Intel-gfx] [PATCH v2 7/8] drm/i915: Introduce a non-blocking power domain for vblank interrupts

On Tue, 2017-12-19 at 13:41 -0800, Rodrigo Vivi wrote: > On Tue, Dec 19, 2017 at 05:26:58AM +, Dhinakaran Pandiyan wrote: > > When DC states are enabled and PSR is active, the hardware enters DC5/DC6 > > states resulting in frame counter resets. The frame counter resets mess > > up the

Re: [PATCH v2 3/8] drm/i915/psr: Avoid initializing PSR if there is no sink support.

On Tue, 2017-12-19 at 13:29 -0800, Rodrigo Vivi wrote: > On Tue, Dec 19, 2017 at 05:26:54AM +, Dhinakaran Pandiyan wrote: > > DPCD read for the eDP is complete by the time intel_psr_init() is > > called, which means we can avoid initializing PSR structures and state > > if there is no sink

Re: [Intel-gfx] [PATCH 4/5] drm/atomic: document how to handle driver private objects

On Thu, 2017-12-14 at 21:30 +0100, Daniel Vetter wrote: > DK put some nice docs into the commit introducing driver private > state, but in the git history alone it'll be lost. > > Also, since Ville remove the void* usage it's a good opportunity to > give the driver private stuff some tlc on the

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Introduce a non-blocking power domain for vblank interrupts

On Wed, 2017-12-06 at 15:54 -0800, Rodrigo Vivi wrote: > On Wed, Dec 06, 2017 at 10:47:40PM +, Dhinakaran Pandiyan wrote: > > When DC states are enabled and PSR is active, the hardware enters DC5/DC6 > > states resulting in frame counter resets. The frame counter resets mess > > up the

Re: [Intel-gfx] [RFC PATCH] drm/vblanks: Deal with HW vblank counter resets.

On Tue, 2017-11-07 at 13:39 +0100, Daniel Vetter wrote: > On Tue, Nov 07, 2017 at 10:47:00AM +0100, Michel Dänzer wrote: > > On 07/11/17 07:26 AM, Dhinakaran Pandiyan wrote: > > > Some HW vblank counters reset due to power management events, which messes > > > up the vblank counting logic. This

Re: [Intel-gfx] [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

On Thu, 2017-10-26 at 10:59 +0300, Jani Nikula wrote: > On Thu, 10 Aug 2017, Dhinakaran Pandiyan wrote: > > DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state > > > > 101 = Set Main-Link for local Sink device and all downstream Sink > > devices to D3 (power-down

Re: [Intel-gfx] [PATCH] drm/dp: DPCD register defines for link

On Thu, 2017-09-14 at 09:00 +0300, Jani Nikula wrote: > On Wed, 13 Sep 2017, Dhinakaran Pandiyan > wrote: > > Link status is available in the ESI field on devices with DPCD r1.2 or > > higher. DP spec also says "An MST upstream device shall use this field > >

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mst: Use MST sideband message transaction for dpms

On Tue, 2017-09-12 at 19:08 +, Pandiyan, Dhinakaran wrote: > On Tue, 2017-09-12 at 19:17 +0300, Ville Syrjälä wrote: > > On Tue, Sep 12, 2017 at 07:11:32PM +0300, Ville Syrjälä wrote: > > > On Tue, Sep 05, 2017 at 06:26:34PM -0700, Dhinakaran Pandiyan wrote: > > &g

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mst: Use MST sideband message transaction for dpms

On Tue, 2017-09-12 at 19:17 +0300, Ville Syrjälä wrote: > On Tue, Sep 12, 2017 at 07:11:32PM +0300, Ville Syrjälä wrote: > > On Tue, Sep 05, 2017 at 06:26:34PM -0700, Dhinakaran Pandiyan wrote: > > > Use the POWER_DOWN_PHY and POWER_UP_PHY sideband message trasactions to > > > set power states for

Re: [Intel-gfx] [PATCH v2] drm/dp/mst: Sideband message transaction to power up/down nodes

On Mon, 2017-09-11 at 16:33 +0300, Ville Syrjälä wrote: > On Wed, Sep 06, 2017 at 05:14:58PM -0700, Dhinakaran Pandiyan wrote: > > The POWER_DOWN_PHY and POWER_UP_PHY sideband message transactions allow > > the source to reqest any node in a mst path or a whole path to be > > powered down or up.

Re: [Intel-gfx] [PATCH v2] drm/dp/mst: Sideband message transaction to power up/down nodes

On Thu, 2017-09-07 at 14:04 -0400, Lyude Paul wrote: > Looks good to me. > > Reviewed-by: Lyude Paul > Thanks for the review. -DK > On Wed, 2017-09-06 at 17:14 -0700, Dhinakaran Pandiyan wrote: > > The POWER_DOWN_PHY and POWER_UP_PHY sideband message transactions > >

Re: [Intel-gfx] [PATCH 1/2] drm/dp/mst: Sideband message transaction to power up/down nodes

On Wed, 2017-09-06 at 11:40 -0400, Lyude Paul wrote: > On Tue, 2017-09-05 at 18:26 -0700, Dhinakaran Pandiyan wrote: > > The POWER_DOWN_PHY and POWER_UP_PHY sideband message transactions > > allow > > the source to reqest any node in a mst path or a whole path to be > > powered down or up. This

Re: [Intel-gfx] [PATCH] drm/i915: Synchronize connectors states when switching from poll to irq

On Mon, 2017-06-26 at 15:32 +0300, Paul Kocialkowski wrote: > After detecting an IRQ storm, hotplug detection will switch from > irq-based detection to poll-based detection. After a short delay or > when resetting storm detection from debugfs, detection will switch > back to being irq-based. > >

Re: [Intel-gfx] [PATCH v2] drm/i915: Explicit the connector name for DP link training result

On Tue, 2017-07-18 at 17:25 +0300, Paul Kocialkowski wrote: > This adds the connector name when printing a debug message about the DP > link training result. It is useful to figure out what connector is > failing when multiple DP connectors are used. > > Signed-off-by: Paul Kocialkowski

Re: [Intel-gfx] [PATCH] drm/i915: Return correct EDP voltage swing table for 0.85V

On Mon, 2017-07-17 at 18:55 +, Pandiyan, Dhinakaran wrote: > Looks like a typo in > > cf54ca8 ("drm/i915/cnl: Implement voltage swing sequence.") > > but Cc'ing Rodrigo, Clint to make sure this wasn't a workaround. > > -DK Checked with Clint, this was

Re: [Intel-gfx] [PATCH] drm/i915: Return correct EDP voltage swing table for 0.85V

Looks like a typo in cf54ca8 ("drm/i915/cnl: Implement voltage swing sequence.") but Cc'ing Rodrigo, Clint to make sure this wasn't a workaround. -DK On Mon, 2017-07-17 at 11:21 -0700, Matthias Kaehlcke wrote: > For 0.85V cnl_get_buf_trans_edp() returns the DP table, instead of EDP. > Use

Re: [PATCH 1/3] drm/dp/mst: Handle errors from drm_atomic_get_private_obj_state() correctly

On Wed, 2017-07-12 at 18:51 +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > On failure drm_atomic_get_private_obj_state() returns and error > pointer instead of NULL. Adjust the checks in the callers to match. > > Cc: sta...@vger.kernel.org >

Re: [Intel-gfx] [PATCH v12 3/3] drm/i915: Add option to support dynamic backlight via DPCD

On Tue, 2017-06-27 at 16:23 +0300, David Weinehall wrote: > On Mon, Jun 26, 2017 at 05:18:19PM +0300, David Weinehall wrote: > > On Thu, Jun 22, 2017 at 12:03:39PM -0700, Puthikorn Voravootivat wrote: > > > This patch adds option to enable dynamic backlight for eDP > > > panel that supports

Re: [Intel-gfx] [PATCH] drm: Fix GETCONNECTOR regression

edesktop.org > Reported-by: "H.J. Lu" <hjl.to...@gmail.com> > Tested-by: "H.J. Lu" <hjl.to...@gmail.com> > Cc: <sta...@vger.kernel.org> # v4.11+ > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100576 > Cc: "H.J. Lu" <hjl.to...@gm

Re: [Intel-gfx] [PATCH] drm: Fix GETCONNECTOR regression

On Tue, 2017-06-20 at 11:16 +0200, Daniel Vetter wrote: > In > > commit 91eefc05f0ac71902906b2058360e61bd25137fe > Author: Daniel Vetter > Date: Wed Dec 14 00:08:10 2016 +0100 > > drm: Tighten locking in drm_mode_getconnector > > I reordered the logic a bit in

Re: [Intel-gfx] [PATCH RESEND v11 0/3] Enhancement to intel_dp_aux_backlight driver

On Tue, 2017-06-20 at 11:03 +0200, Daniel Vetter wrote: > On Mon, Jun 05, 2017 at 02:56:04PM -0700, Puthikorn Voravootivat wrote: > > This patch set contain 3 patches which are already reviewed by DK. > > Another 6 patches in previous version was already merged in v7 and v9. > > - First patch

Re: [Intel-gfx] [PATCH v11 3/3] drm/i915: Add option to support dynamic backlight via DPCD

> > On Mon, Jun 5, 2017 at 11:49 AM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote: > On Fri, 2017-06-02 at 19:04 -0700, Puthikorn Voravootivat > wrote: > > This patch adds option to enable dynamic backlight for eDP > >

Re: [Intel-gfx] [PATCH v11 3/3] drm/i915: Add option to support dynamic backlight via DPCD

On Fri, 2017-06-02 at 19:04 -0700, Puthikorn Voravootivat wrote: > This patch adds option to enable dynamic backlight for eDP > panel that supports this feature via DPCD register and > set minimum / maximum brightness to 0% and 100% of the > normal brightness. > > Change-Id:

Re: [Intel-gfx] [PATCH v10 2/3] drm/i915: Add option to support dynamic backlight via DPCD

On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote: > This patch adds option to enable dynamic backlight for eDP > panel that supports this feature via DPCD register and > set minimum / maximum brightness to 0% and 100% of the > normal brightness. > > Signed-off-by: Puthikorn

Re: [Intel-gfx] [PATCH v10 1/3] drm/i915: Add heuristic to determine better way to adjust brightness

On Fri, 2017-06-02 at 17:42 +, Pandiyan, Dhinakaran wrote: Somehow the CC's got removed in my previous reply, adding them back. See one additional comment below. > On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote: > > Add heuristic to decide that AUX or PWM pin s

Re: [Intel-gfx] [PATCH v10 1/3] drm/i915: Add heuristic to determine better way to adjust brightness

On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote: > Add heuristic to decide that AUX or PWM pin should use for > backlight brightness adjustment and modify i915 param description > to have auto, force disable, and force enable. > > The heuristic to determine that using AUX pin is

Re: [Intel-gfx] [PATCH v10 2/3] drm/i915: Add option to support dynamic backlight via DPCD

On Wed, 2017-05-31 at 14:37 -0700, Puthikorn Voravootivat wrote: > > > On Tue, May 30, 2017 at 9:18 PM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote: > On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat > wrote: > > Th

Re: [Intel-gfx] [PATCH v10 3/3] drm/i915: Set PWM divider to match desired frequency in vbt

The patch looks good overall, it would have been easier to merge if you'd sent this as the first patch in this version. Some comments inline. On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote: > Read desired PWM frequency from panel vbt and calculate the > value for divider in

Re: [Intel-gfx] [PATCH v10 2/3] drm/i915: Add option to support dynamic backlight via DPCD

On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote: > This patch adds option to enable dynamic backlight for eDP > panel that supports this feature via DPCD register and > set minimum / maximum brightness to 0% and 100% of the > normal brightness. > > Signed-off-by: Puthikorn

RE: [Intel-gfx] [PATCH v8 3/5] drm/i915: Add option to support dynamic backlight via DPCD

Yeah, looks fine to me. -DK From: put...@google.com [mailto:put...@google.com] On Behalf Of Puthikorn Voravootivat Sent: Friday, May 19, 2017 2:00 PM To: Pandiyan, Dhinakaran <dhinakaran.pandi...@intel.com> Cc: put...@chromium.org; dri-devel@lists.freedesktop.org;

Re: [Intel-gfx] [PATCH 3/4] drm/dp: start a DPCD based DP sink/branch device quirk database

On Thu, 2017-05-18 at 14:10 +0300, Jani Nikula wrote: > Face the fact, there are Display Port sink and branch devices out there > in the wild that don't follow the Display Port specifications, or they > have bugs, or just otherwise require special treatment. Start a common > quirk database the

Re: [Intel-gfx] [PATCH v8 1/5] drm/i915: Drop AUX backlight enable check for backlight control

On Wed, 2017-05-17 at 14:04 -0700, Puthikorn Voravootivat wrote: > > On Wed, May 17, 2017 at 1:09 PM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote: > > > From: Puthikorn Voravootivat [put.

RE: [PATCH v8 1/5] drm/i915: Drop AUX backlight enable check for backlight control

From: Puthikorn Voravootivat [put...@google.com] on behalf of Puthikorn Voravootivat [put...@chromium.org] Sent: Tuesday, May 16, 2017 5:33 PM To: intel-...@lists.freedesktop.org; Pandiyan, Dhinakaran Cc: dri-devel@lists.freedesktop.org; Jani Nikula

Re: [Intel-gfx] [PATCH v8 3/5] drm/i915: Add option to support dynamic backlight via DPCD

On Tue, 2017-05-16 at 17:34 -0700, Puthikorn Voravootivat wrote: > This patch adds option to enable dynamic backlight for eDP > panel that supports this feature via DPCD register and > set minimum / maximum brightness to 0% and 100% of the > normal brightness. > > Signed-off-by: Puthikorn

Re: [Intel-gfx] [PATCH v7 9/9] drm/i915: Set PWM divider to match desired frequency in vbt

On Tue, 2017-05-16 at 11:07 -0700, Puthikorn Voravootivat wrote: > > > On Mon, May 15, 2017 at 11:21 PM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote: > On Mon, 2017-05-15 at 17:43 -0700, Puthikorn Voravootivat > wrote: > >

Re: [Intel-gfx] [PATCH v8 5/5] drm/i915: Set PWM divider to match desired frequency in vbt

On Tue, 2017-05-16 at 17:34 -0700, Puthikorn Voravootivat wrote: > Read desired PWM frequency from panel vbt and calculate the > value for divider in DPCD address 0x724 and 0x728 to have > as many bits as possible for PWM duty cyle for granularity of > brightness adjustment while the frequency

Re: [Intel-gfx] [PATCH v7 9/9] drm/i915: Set PWM divider to match desired frequency in vbt

On Tue, 2017-05-16 at 17:39 -0700, Puthikorn Voravootivat wrote: > > > On Tue, May 16, 2017 at 2:21 PM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote: > On Tue, 2017-05-16 at 13:56 -0700, Puthikorn Voravootivat > wrote: > >

Re: [Intel-gfx] [PATCH v7 9/9] drm/i915: Set PWM divider to match desired frequency in vbt

On Mon, 2017-05-15 at 17:43 -0700, Puthikorn Voravootivat wrote: > > > On Mon, May 15, 2017 at 4:07 PM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote: > On Fri, 2017-05-12 at 17:31 -0700, Puthikorn Voravoo

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Detect USB-C specific dongles before reducing M and N

On Thu, 2017-05-11 at 09:12 -0700, Clint Taylor wrote: > > On 05/11/2017 02:57 AM, Jani Nikula wrote: > > From: Clint Taylor > > > > The Analogix 7737 DP to HDMI converter requires reduced M and N values > > when to operate correctly at HBR2. Detect this IC by its OUI

Re: [Intel-gfx] [PATCH 1/2] drm/dp: start a DPCD based DP sink/branch device quirk database

On Thu, 2017-05-11 at 12:57 +0300, Jani Nikula wrote: > Face the fact, there are Display Port sink and branch devices out there > in the wild that don't follow the Display Port specifications, or they > have bugs, or just otherwise require special treatment. Start a common > quirk database the

Re: [Intel-gfx] [PATCH v7 9/9] drm/i915: Set PWM divider to match desired frequency in vbt

On Fri, 2017-05-12 at 17:31 -0700, Puthikorn Voravootivat wrote: > > > > On Fri, May 12, 2017 at 5:12 PM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote: > On Thu, 2017-05-11 at 16:02 -0700, Puthikorn Voravootivat > wrote: >

Re: [Intel-gfx] [PATCH v7 9/9] drm/i915: Set PWM divider to match desired frequency in vbt

On Thu, 2017-05-11 at 16:02 -0700, Puthikorn Voravootivat wrote: > Read desired PWM frequency from panel vbt and calculate the > value for divider in DPCD address 0x724 and 0x728 to have > as many bits as possible for PWM duty cyle for granularity of > brightness adjustment while the frequency is

Re: [PATCH v7 3/9] drm/i915: Drop AUX backlight enable check for backlight control

On Fri, 2017-05-12 at 11:10 -0700, Puthikorn Voravootivat wrote: > > > On Fri, May 12, 2017 at 6:14 AM, Jani Nikula > <jani.nik...@linux.intel.com> wrote: > On Fri, 12 May 2017, "Pandiyan, Dhinakaran" > <dhinakaran.pandi...@intel.com> wro

Re: [PATCH v7 6/9] drm/i915: Add option to support dynamic backlight via DPCD

On Thu, 2017-05-11 at 16:02 -0700, Puthikorn Voravootivat wrote: > This patch adds option to enable dynamic backlight for eDP > panel that supports this feature via DPCD register and > set minimum / maximum brightness to 0% and 100% of the > normal brightness. > > Signed-off-by: Puthikorn

Re: [PATCH v7 3/9] drm/i915: Drop AUX backlight enable check for backlight control

On Thu, 2017-05-11 at 16:02 -0700, Puthikorn Voravootivat wrote: > There are some panel that > (1) does not support display backlight enable via AUX > (2) support display backlight adjustment via AUX > (3) support display backlight enable via eDP BL_ENABLE pin > > The current driver required that

Re: [Intel-gfx] [PATCH v6 6/9] drm/i915: Support dynamic backlight via DPCD register

On Tue, 2017-05-09 at 16:40 -0700, Puthikorn Voravootivat wrote: > This patch enables dynamic backlight by default for eDP > panel that supports this feature via DPCD register and > set minimum / maximum brightness to 0% and 100% of the > normal brightness. I realized I replied to the previous

Re: [Intel-gfx] [PATCH v6 1/9] drm/i915: Fix cap check for intel_dp_aux_backlight driver

On Tue, 2017-05-09 at 16:40 -0700, Puthikorn Voravootivat wrote: > intel_dp_aux_backlight driver should check for the > DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP before enable the driver. > > Signed-off-by: Puthikorn Voravootivat Reviewed-by: Dhinakaran Pandiyan

Re: [Intel-gfx] [PATCH v6 3/9] drm/i915: Drop AUX backlight enable check for backlight control

On Tue, 2017-05-09 at 16:40 -0700, Puthikorn Voravootivat wrote: > There are some panel that > (1) does not support display backlight enable via AUX > (2) support display backlight adjustment via AUX > (3) support display backlight enable via eDP BL_ENABLE pin > > The current driver required that

Re: [Intel-gfx] [PATCH v5 3/9] drm/i915: Drop AUX backlight enable check for backlight control

On Wed, 2017-05-10 at 13:05 +0300, Jani Nikula wrote: > On Wed, 10 May 2017, "Pandiyan, Dhinakaran" <dhinakaran.pandi...@intel.com> > wrote: > > On Tue, 2017-05-09 at 16:39 -0700, Puthikorn Voravootivat wrote: > >> > How is backlight enabled in

Re: [Intel-gfx] [PATCH v6 4/9] drm/i915: Allow choosing how to adjust brightness if both supported

On Tue, 2017-05-09 at 16:40 -0700, Puthikorn Voravootivat wrote: > Add option to allow choosing how to adjust brightness if > panel supports both PWM pin and AUX channel. > > Signed-off-by: Puthikorn Voravootivat > --- > drivers/gpu/drm/i915/i915_params.c| 8

Re: [Intel-gfx] [PATCH v5 6/9] drm/i915: Support dynamic backlight via DPCD register

On Wed, 2017-05-03 at 17:28 -0700, Puthikorn Voravootivat wrote: > This patch enables dynamic backlight by default for eDP > panel that supports this feature via DPCD register and > set minimum / maximum brightness to 0% and 100% of the > normal brightness. I read the link that you shared last

Re: [Intel-gfx] [PATCH v6 8/9] drm: Add definition for eDP backlight frequency

On Tue, 2017-05-09 at 16:40 -0700, Puthikorn Voravootivat wrote: > This patch adds the following definition > - Bit mask for EDP_PWMGEN_BIT_COUNT and min/max cap > register which only use bit 0:4 > - Base frequency (27 MHz) for backlight PWM frequency > generator. > > Signed-off-by: Puthikorn

Re: [Intel-gfx] [PATCH v5 3/9] drm/i915: Drop AUX backlight enable check for backlight control

hing very obvious. If intel_dp_aux_init_backlight_funcs() returned -ENODEV, then one of the platform specific PWM enable callbacks would be called. But in this case, dp_aux_enable_backlight() just returns without doing anything. -DK > > > On Sat, May 6, 2017 at 1:59 AM, Pa

Re: [Intel-gfx] [PATCH v5 2/9] drm/i915: Correctly enable backlight brightness adjustment via DPCD

On Wed, 2017-05-03 at 17:28 -0700, Puthikorn Voravootivat wrote: > intel_dp_aux_enable_backlight() assumed that the register > BACKLIGHT_BRIGHTNESS_CONTROL_MODE can only has value 01 > (DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET) when initialize. > > This patch fixed that by handling all cases of that

Re: [Intel-gfx] [PATCH v5 1/9] drm/i915: Fix cap check for intel_dp_aux_backlight driver

On Wed, 2017-05-03 at 17:28 -0700, Puthikorn Voravootivat wrote: > intel_dp_aux_backlight driver should check for the > DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP before enable the driver. > > Signed-off-by: Puthikorn Voravootivat > --- >

Re: [Intel-gfx] [PATCH v5 9/9] drm/i915: Set PWM divider to match desired frequency in vbt

and then again "Allowing Pn to be adjustable provides the flexibility of backlight dimming granularity vs. maximum backlight frequency." > > On Sat, May 6, 2017 at 1:35 AM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote: > On Wed, 2017-05-03 at 17:28 -0700,

Re: [Intel-gfx] [PATCH v5 1/9] drm/i915: Fix cap check for intel_dp_aux_backlight driver

->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP)) { You can then make the PWM PIN/AUX preference changes in patch 4. Jani, please correct me if I'm wrong here. -DK > > > On Mon, May 8, 2017 at 10:55 AM, Pandiyan, Dhinakaran > <dhinakaran.pandi...@intel.com> wrote:

Re: [Intel-gfx] [PATCH v5 5/9] drm/i915: Set backlight mode before enable backlight

On Wed, 2017-05-03 at 17:28 -0700, Puthikorn Voravootivat wrote: > We should set backlight mode register before set register to > enable the backlight. > Sounds reasonable, although I did not find anything in the spec. that says we should do this. If you've tested and it works, Reviewed-by:

Re: [Intel-gfx] [PATCH v5 7/9] drm/i915: Restore brightness level in aux backlight driver

On Wed, 2017-05-03 at 17:28 -0700, Puthikorn Voravootivat wrote: > Some panel will default to zero brightness when turning the > panel off and on again. This patch restores last brightness > level back when panel is turning back on. > > Signed-off-by: Puthikorn Voravootivat

Re: [Intel-gfx] [PATCH v5 3/9] drm/i915: Drop AUX backlight enable check for backlight control

On Wed, 2017-05-03 at 17:28 -0700, Puthikorn Voravootivat wrote: > There are some panel that > (1) does not support display backlight enable via AUX > (2) support display backlight adjustment via AUX > (3) support display backlight enable via eDP BL_ENABLE pin > > The current driver required that

Re: [Intel-gfx] [PATCH v5 9/9] drm/i915: Set PWM divider to match desired frequency in vbt

On Wed, 2017-05-03 at 17:28 -0700, Puthikorn Voravootivat wrote: > Read desired PWM frequency from panel vbt and calculate the > value for divider in DPCD address 0x724 and 0x728 to match > that frequency as close as possible. > > Signed-off-by: Puthikorn Voravootivat > ---

Re: [Intel-gfx] [PATCH v8 4/4] drm/dp: Track MST link bandwidth

On Mon, 2017-05-01 at 10:24 +0200, Maarten Lankhorst wrote: > Op 29-04-17 om 01:14 schreef Dhinakaran Pandiyan: > > From: "Pandiyan, Dhinakaran" <dhinakaran.pandi...@intel.com> > > > > Use the added helpers to track MST link bandwidth for ato

Re: [Intel-gfx] [PATCH v7 4/4] drm/dp: Track MST link bandwidth

On Tue, 2017-04-25 at 09:51 +0200, Maarten Lankhorst wrote: > On 21-04-17 07:51, Dhinakaran Pandiyan wrote: > > From: "Pandiyan, Dhinakaran" <dhinakaran.pandi...@intel.com> > > > > Use the added helpers to track MST link bandwidth for atomic modesets. > >

Re: [Intel-gfx] [PATCH v7 0/4] Adding driver-private objects to atomic state

On Mon, 2017-04-24 at 11:53 -0400, Harry Wentland wrote: > Patches 1-3: Reviewed-by: Harry Wentland > Patch 4: Acked-by: Harry Wentland > > Harry > Thanks for the review. -DK ___ dri-devel mailing

Re: [PATCH v7 4/4] drm/dp: Track MST link bandwidth

On Tue, 2017-04-25 at 09:51 +0200, Maarten Lankhorst wrote: > On 21-04-17 07:51, Dhinakaran Pandiyan wrote: > > From: "Pandiyan, Dhinakaran" <dhinakaran.pandi...@intel.com> > > > > Use the added helpers to track MST link bandwidth for atomic modesets. > >

Re: [Intel-gfx] [PATCH] drm/atomic: Add connector atomic_check function.

On Wed, 2017-04-05 at 12:06 +0200, Daniel Vetter wrote: > On Wed, Apr 05, 2017 at 10:41:24AM +0200, Maarten Lankhorst wrote: > > The connector atomic check function may be called multiple times, > > or not at all. It's mostly useful for implementing properties but if you > > call check_modeset

Re: [Intel-gfx] [PATCH v5 3/5] drm/dp: Add DP MST helpers to atomically find and release vcpi slots

On Thu, 2017-03-30 at 01:42 -0700, Dhinakaran Pandiyan wrote: > From: "Pandiyan, Dhinakaran" <dhinakaran.pandi...@intel.com> > > drm_dp_atomic_find_vcpi_slots() should be called from ->atomic_check() to > check there are sufficient vcpi slots for a mode and to add t

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