[PATCH] drm/vmwgfx: Add back ->detect() and ->fill_modes()

[Sebastian Herbszt]

Thierry Reding wrote:
> From: Thierry Reding 
> 
> This partially reverts commit d56f57ac969c ("drm/gma500: Move to private
> save/restore hooks") which removed these lines by mistake.
> 
> Reported-by: Sebastian Herbszt 
> Acked-by: Daniel Vetter 
> Signed-off-by: Thierry Reding 
> ---
> Hi Dave,
> 
> Daniel and I introduced this in v4.5-rc1, so it'd be good to have this
> go into v4.5 final once Sebastian and Thomas have confirmed that it is
> fixed.
> 
>  drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c 
> b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> index db082bea8daf..c5a1a08b0449 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> @@ -563,6 +563,8 @@ static void vmw_sou_connector_destroy(struct 
> drm_connector *connector)
>  
>  static const struct drm_connector_funcs vmw_sou_connector_funcs = {
>   .dpms = vmw_du_connector_dpms,
> + .detect = vmw_du_connector_detect,
> + .fill_modes = vmw_du_connector_fill_modes,
>   .set_property = vmw_du_connector_set_property,
>   .destroy = vmw_sou_connector_destroy,
>  };

Tested-by: Sebastian Herbszt 

[PATCH] drm/vmwgfx: Add back ->detect() and ->fill_modes()

[Dave Airlie]

On 8 March 2016 at 09:15, Sebastian Herbszt  wrote:
> Thierry Reding wrote:
>> From: Thierry Reding 
>>
>> This partially reverts commit d56f57ac969c ("drm/gma500: Move to private
>> save/restore hooks") which removed these lines by mistake.
>>

Thanks I've pulled this into drm-fixes.

Dave.

[PATCH] drm/i2c: tda998x: Choose between atomic or non atomic dpms helper

[Dave Airlie]

On 8 March 2016 at 07:47, Jyri Sarha  wrote:
> Hi,
> Based on discussion around this patch:
>
> https://lists.freedesktop.org/archives/dri-devel/2016-February/100685.html
>
> I think the patch below should get into queued for v4.5 fixes as the
> Beaglebone-Black display is currently broken in linux-master and probably
> Armada is broken too. What should I do to get it there?

I've pushed this to drm-fixes.

Dave.

[Bug 113341] GPU Lockup on AMD Kaveri

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113341

--- Comment #8 from Michel Dänzer  ---
FWIW, right now it's better to try LLVM 3.8 than SVN/Git, because the latter
will expose you to https://bugs.freedesktop.org/show_bug.cgi?id=94242 .

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[Bug 113861] [radeon] Xorg fatal freeze upon startx

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113861

--- Comment #6 from Michel Dänzer  ---
Does radeon.runpm=0 on the kernel command line avoid the problem?

Can you bisect?

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[Bug 113861] [radeon] Xorg fatal freeze upon startx

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113861

--- Comment #7 from Alex Deucher  ---
Probably the same issue as reported here:
https://lists.freedesktop.org/archives/dri-devel/2016-March/102379.html
Does reverting dbb17a21c131eca94eb31136eee9a7fe5aff00d9 fix it?

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[Bug 113861] [radeon] Xorg fatal freeze upon startx

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113861

--- Comment #8 from centuryplague at yandex.com ---
(In reply to Michel Dänzer from comment #6)
> Does radeon.runpm=0 on the kernel command line avoid the problem?

Yes, I tried moments ago and radeon.runpm=0 allows x to start! Had no tried
that.

(In reply to Alex Deucher from comment #7)
> Probably the same issue as reported here:
> https://lists.freedesktop.org/archives/dri-devel/2016-March/102379.html
> Does reverting dbb17a21c131eca94eb31136eee9a7fe5aff00d9 fix it?

That sounds exactly the same. I can't compile tonight and may not get it to
work for a couple days (non standard setup). I'll mention to the other guy.

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[CABC PATCH 0/2] CABC patch list

[Adebisi, YetundeX]

> -Original Message-
> From: Deepak, M
> Sent: Tuesday, March 01, 2016 9:04 AM
> To: dri-devel at lists.freedesktop.org
> Cc: Deepak, M; Nikula, Jani; Vetter, Daniel; Adebisi, YetundeX
> Subject: [CABC PATCH 0/2] CABC patch list
> 
> CABC stands for the Content Adaptive Backlight Control.
> In the normal display the backlight which we see is due to the
> backlight which is being modulated by the filter, which is inturn
> dependent on the image. In brief the CABC does the histogram
> analysis of the image and then controls the filter and backlight.
> For example in CABC to display the dark image the backlight is dimmed
> and then controlls the filter to allow more light, because of
> which is power consuption will be reduced.
> 
> Below are the initial set of patches which supports the CABC.
> A field exits in the mipi configuration of the VBT which
Should be *exists*
> when enabled indiactes the CABC is supported. Depending on
Should be *indicates*
> this filed the backlight control function pointer are
Should be *field*
> initialized in the intel_panel.c file.
> 
> In case of dual link panels depending on the panel
> the DCS commands have to be send to either PORT A,
> PORT C or both PORT A and PORT C. Again a filed is
Should be *field*
> added in the VBT to get this data from the version 197 onwards.
> One of the below patches parses these fields from the
> VBT.
> 
> Addressed the review comments of Jani, which were mentioned in
> the below
> https://lists.freedesktop.org/archives/intel-gfx/2015-
> November/081233.html
> 
> Cc: Jani Nikula 
> Cc: Daniel Vetter 
> Cc: Yetunde Adebisi 
> 
> 
> Deepak M (2):
>   drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT
>   drm/i915: CABC support for backlight control
> 
>  drivers/gpu/drm/i915/Makefile |   1 +
>  drivers/gpu/drm/i915/i915_drv.h   |   2 +-
>  drivers/gpu/drm/i915/intel_bios.c |  10 ++
>  drivers/gpu/drm/i915/intel_bios.h |   5 +-
>  drivers/gpu/drm/i915/intel_dsi.c  |  17 +++-
>  drivers/gpu/drm/i915/intel_dsi.h  |  13 +++
>  drivers/gpu/drm/i915/intel_dsi_cabc.c | 179
> ++
>  drivers/gpu/drm/i915/intel_panel.c|   4 +
>  8 files changed, 228 insertions(+), 3 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_dsi_cabc.c
> 
> --
> 1.9.1

[GIT PULL] imx-drm crtc and plane fixes, ipu-v3 probe fixes

[Philipp Zabel]

Hi Dave,

Am Freitag, den 19.02.2016, 10:44 +0100 schrieb Philipp Zabel:
> Hi Dave,
> 
> here are a couple of fixes for the imx-drm drivers. With these, the
> ipu-v3 driver probe doesn't bail out if nodes that are marked as
> optional are not present in the device tree. The reset is moved before
> irq initialization, and the DRM core is made aware of the vblank
> interrupt enable state.

this pull request hasn't yet made it into drm-fixes. Please consider
merging it for v4.6 if it just fell through the cracks, or let me know
if there are any issue with it?
Without the optional port node patch imx-drm is broken for i.MX53.

best regards
Philipp

> regards
> Philipp
> 
> The following changes since commit 92e963f50fc74041b5e9e744c330dca48e04f08d:
> 
>   Linux 4.5-rc1 (2016-01-24 13:06:47 -0800)
> 
> are available in the git repository at:
> 
>   git://git.pengutronix.de/git/pza/linux.git tags/imx-drm-fixes-2016-02-19
> 
> for you to fetch changes up to 33bee520cbaee22118fb96ab500ba4cd4e8cb749:
> 
>   drm/imx: Add missing DRM_FORMAT_RGB565 to ipu_plane_formats (2016-02-10 
> 14:26:53 +0100)
> 
> 
> ipu-v3 probe and imx-drm crtc and plane fixes
> 
> - Fix ipu probe if optional port nodes are not present in the device tree
> - Reset the ipu before initializing interrupts, not thereafter
> - Notify DRM core about the state of vblank interrupts
> - Add missing RGB565 format to the list of plate formats
> 
> 
> David Jander (1):
>   gpu: ipu-v3: Reset IPU before activating IRQ
> 
> Enrico Jorns (1):
>   drm/imx: Add missing DRM_FORMAT_RGB565 to ipu_plane_formats
> 
> Lucas Stach (1):
>   drm/imx: notify DRM core about CRTC vblank state
> 
> Philipp Zabel (1):
>   gpu: ipu-v3: Do not bail out on missing optional port nodes
> 
>  drivers/gpu/drm/imx/ipuv3-crtc.c  |  2 ++
>  drivers/gpu/drm/imx/ipuv3-plane.c |  1 +
>  drivers/gpu/ipu-v3/ipu-common.c   | 31 +--
>  3 files changed, 20 insertions(+), 14 deletions(-)

Atomic mode-setting drivers

[Daniel Vetter]

On Mon, Mar 07, 2016 at 08:42:10PM +0800, Chih-Wei Huang wrote:
> 2016-03-05 0:32 GMT+08:00 Daniel Vetter :
> > Adding relevant mailing lists and people. Please don't send private
> > mails to maintainers ;-)
> 
> Thank you for the reply and pointing it.
> 
> > On Fri, Mar 4, 2016 at 1:47 PM, Chih-Wei Huang  
> > wrote:
> >> Hi Daniel,
> >> This is the Android-x86 project.
> >> I'm looking for info about atomic mode-setting drivers
> >> and then found your presentation at
> >> http://www.x.org/wiki/Events/XDC2015/Program/xdc-2015.pdf
> >>
> >> Especially page 16 talks about the Android support,
> >> exactly what I want.
> >>
> >> It said "no one has an open-source atomic hwc".
> >> Actually there is one in the AOSP 6.0 release:
> >>
> >> https://android.googlesource.com/platform/external/drm_hwcomposer
> >>
> >> It's developed by the Chromium team.
> >> An update repo is here:
> >> https://chromium.googlesource.com/chromiumos/drm_hwcomposer
> >
> > Yup, my presentation is already outdated - the latest one for LCA2016
> > mentions that hwc exists.
> 
> Thanks! Do you have a link for it?
> 
> >> Contributing instructions are here:
> >> https://sites.google.com/a/chromium.org/dev/contributing-to-drm_hwcomposer
> >>
> >> We are trying to enable the drm_hwcomposer for Android-x86.
> >> However, it requires atomic mode-setting drivers
> >> which seems are not ready in the vanilla kernel 4.4,
> >> the kernel we are using now.
> >>
> >> Unfortunately none of us is an expert of kernel drm drivres.
> >> Could you give me a brief status of the
> >> current atomic mode-setting drivers in vanilla kernel?
> >> What are still missing? fences? deadlock?
> >> More important, how much effort do we need
> >> to make them work with AOSP's drm_hwcomposer?
> >
> > There's a pile of drivers, but for classic x86 desktop only i915.ko,
> > and that is still not yet enabled by default. i915.nuclear_pageflip=1
> > will give you experimental atomic support but not sure whether that's
> > good enough for hwcomposer.
> 
> Yes. I've tried i915.nuclear_pageflip=1
> (before sent you the email)
> The atomic call pass, but I got further errors:
> 
> 02-25 17:37:28.320  1641  1641 I hwc-drm-plane: Could not get alpha property
> 02-25 17:37:28.320  1641  1641 I hwc-drm-plane: Could not get alpha property
> 02-25 17:37:28.321  1641  1641 I hwc-drm-plane: Could not get alpha property
> 02-25 17:37:28.321  1641  1641 I hwc-drm-plane: Could not get alpha property
> 02-25 17:37:28.321  1641  1641 I hwc-drm-plane: Could not get alpha property
> 02-25 17:37:28.322  1641  1641 I hwc-drm-plane: Could not get alpha property
> 02-25 17:37:28.322  1641  1641 I hwc-drm-plane: Could not get alpha property
> 02-25 17:37:28.322  1641  1641 I hwc-drm-plane: Could not get alpha property
> 02-25 17:37:28.322  1641  1641 I hwc-drm-plane: Could not get alpha property
> 02-25 17:37:28.323  1641  1641 E hwc-drm-resources: Could not find a
> suitable encoder/crtc for display 3
> 02-25 17:37:28.323  1641  1641 E hwc-drm-resources: Failed
> CreateDisplayPipe 47 with -19
> 02-25 17:37:28.323  1641  1641 E hwcomposer-drm: Can't initialize Drm object 
> -19
> 
> Still black screen.
> 
> The other x86 drivers I've tried are radeon and vmwgfx.
> Both seems don't support atomic mode-setting yet.
> 
> The only x86 GPU works with drm_hwcomposer
> is virgl (with patches by Rob Herring).

Sounds like trouble in hwcomposer, not in the i915 driver. I guess you
need to trace what makes hwc unhappy and then adjust the code to be more
flexible - not all hw supports e.g. alpha blending on all planes. Given
that hwc was written for some specific hw plane model (pretty much
universal hw planes with blending) and intel doesn't implement this (at
least on older platforms) there's some work needed.
-Daniel

> 
> > Fences are being worked on in upstream kernel, but nothing to show
> > yet.. Otherwise I don't know what's all needed to make it, I haven't
> > had a chance to play around with it yet.
> >
> >> More discussion about it can be found in
> >> our devel group:
> >> https://groups.google.com/d/msg/android-x86-devel/RErWaXk3b7g/g_OSPGf4AwAJ
> >
> > Please include that mailing list too, to make sure everyone is on board.
> 
> Included. Thanks!
> 
> -- 
> Chih-Wei
> Android-x86 project
> http://www.android-x86.org

-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch

[Bug 113891] [radeon] Display jitter

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113891

--- Comment #1 from Jean Delvare  ---
Kernel v4.5-rc7 is affected too.

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[PATCH] drm/gma500: Make mdfld_dsi_connector_dpms() return a value

[Daniel Wagner]

On 03/05/2016 02:54 PM, Ingo Molnar wrote:
> 
> * Ingo Molnar  wrote:
> 
>> as we have this in Makefile:
>>
>>  # enforce correct pointer usage
>>  KBUILD_CFLAGS   += $(call cc-option,-Werror=incompatible-pointer-types)
> 
> Sorry, never mind - this is a recent commit that is not upstream.
> 
> So there's no upstream build regression.

Sorry about that. I got it wrong and didn't sent the kbuild change via
the proper tree. Still learning.

Oops (NULL pointer dereference) in radeon_fence_ref in 3.14.63

[Christian König]

Am 08.03.2016 um 03:54 schrieb Nicolai Hähnle:
> Hi,
>
> On 05.03.2016 16:24, Christian König wrote:
>> just an educated guess, but I think the problem is simply that kernel
>> 3.14 doesn't yet contain the code so that radeon_fence_get() can safely
>> called with a NULL pointer.
>>
>> So the backport of Nicolai's patch needs and extra check for the case
>> when the fence is NULL.
>
> Oops indeed. Only the ref call should need the guard, the unref has 
> always had a NULL pointer test as far as I can see.
>
> Lutz, could you please test whether the attached patch on top of 
> 3.14.63 fixes the problem?

Patch is Reviewed-by: Christian König .

Regards,
Christian.

>
> Thanks,
> Nicolai
>
>> Regards,
>> Christian.
>>
>> Am 05.03.2016 um 18:16 schrieb Lutz Euler:
>>> Hi,
>>>
>>> after upgrading from kernel 3.14.62 to 3.14.63, while surfing, the
>>> screen suddenly got black and the mouse cursor froze. I had to reset
>>> the machine and found an oops followed by repeated messages
>>> "BUG: scheduling while atomic: Xorg/3757/0x0002" in the logs.
>>> I have copied the oops and the first of these messages below.
>>>
>>> This was repeatable: After the reboot, when the browser restored its
>>> tabs, the oops occurred again. I then rebooted into 3.14.62 and the
>>> problem didn't occur again.
>>>
>>> Just guessing: Of the commits regarding radeon between these two
>>> kernel versions might the following be involved
>>>
>>> Nicolai Hähnle (1):
>>>drm/radeon: hold reference to fences in radeon_sa_bo_new
>>>
>>> as it mentions fences and the stack trace starts with radeon_sa_bo_new?
>>>
>>> Thanks and Regards,
>>>
>>> Lutz
>>>
>>>  From lspci -v:
>>>
>>> 05:00.0 VGA compatible controller: ATI Technologies Inc NI Caicos [AMD
>>> RADEON HD 6450] (prog-if 00 [VGA controller])
>>> Subsystem: PC Partner Limited Device e164
>>> Flags: bus master, fast devsel, latency 0, IRQ 53
>>> Memory at d000 (64-bit, prefetchable) [size=256M]
>>> Memory at fe9e (64-bit, non-prefetchable) [size=128K]
>>> I/O ports at e000 [size=256]
>>> Expansion ROM at fe9c [disabled] [size=128K]
>>> Capabilities: [50] Power Management version 3
>>> Capabilities: [58] Express Legacy Endpoint, MSI 00
>>> Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
>>> Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1
>>> Len=010 
>>> Capabilities: [150] Advanced Error Reporting
>>> Kernel driver in use: radeon
>>> Kernel modules: radeon
>>>
>>> X.Org version: 1.10.4
>>>
>>> decodecode of the oops:
>>>
>>> Mar 5 15:04:58 lutz kernel: [ 6995.216776] Code: c7 c6 d8 3e 36 a0 31
>>> c0 45 31 e4 e8 7b 70 15 e1 eb b5 66 0f 1f 84 00 00 00 00 00 55 48 89
>>> f8 ba 01 00 00 00 48 89 e5 48 83 ec 10  0f c1 57 08 ff c2 ff ca 7e
>>> 02 c9 c3 80 3d 10 ae 10 00 01 74
>>> All code
>>> 
>>> 0:c7 c6 d8 3e 36 a0mov$0xa0363ed8,%esi
>>> 6:31 c0xor%eax,%eax
>>> 8:45 31 e4 xor%r12d,%r12d
>>> b:e8 7b 70 15 e1   callq  0xe115708b
>>>10:eb b5jmp0xffc7
>>>12:66 0f 1f 84 00 00 00 nopw   0x0(%rax,%rax,1)
>>>19:00 00
>>>1b:55   push   %rbp
>>>1c:48 89 f8 mov%rdi,%rax
>>>1f:ba 01 00 00 00   mov$0x1,%edx
>>>24:48 89 e5 mov%rsp,%rbp
>>>27:48 83 ec 10  sub$0x10,%rsp
>>>2b:*f0 0f c1 57 08   lock xadd %edx,0x8(%rdi)
>>> <-- trapping instruction
>>>30:ff c2inc%edx
>>>32:ff cadec%edx
>>>34:7e 02jle0x38
>>>36:c9   leaveq
>>>37:c3   retq
>>>38:80 3d 10 ae 10 00 01 cmpb $0x1,0x10ae10(%rip)#
>>> 0x10ae4f
>>>3f:74   .byte 0x74
>>>
>>> Code starting with the faulting instruction
>>> ===
>>> 0:f0 0f c1 57 08   lock xadd %edx,0x8(%rdi)
>>> 5:ff c2inc%edx
>>> 7:ff cadec%edx
>>> 9:7e 02jle0xd
>>> b:c9   leaveq
>>> c:c3   retq
>>> d:80 3d 10 ae 10 00 01 cmpb $0x1,0x10ae10(%rip)#
>>> 0x10ae24
>>>14:74   .byte 0x74
>>>
>>> Mar  5 15:04:58 lutz kernel: [ 6995.192330] BUG: unable to handle
>>> kernel NULL pointer dereference at 0008
>>> Mar  5 15:04:58 lutz kernel: [ 6995.192375] IP: []
>>> radeon_fence_ref+0x10/0x50 [radeon]
>>> Mar  5 15:04:58 lutz kernel: [ 6995.192441] PGD 22a86a067 PUD
>>> 22d8e8067 PMD 0
>>> Mar  5 15:04:58 lutz kernel: [ 6995.192463] Oops: 0002 [#1] PREEMPT SMP
>>> Mar  5 15:04:58 lutz kernel: [ 6995.192484] Modules 

[Bug 113951] Kernel bug in AMDGPU

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113951

Zdeněk Janeček  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |CODE_FIX

--- Comment #3 from Zdeněk Janeček  ---
(In reply to Alex Deucher from comment #2)
> Created attachment 208101 [details]
> fix
> 
> This patch should fix it.

Great, it's working now, thanks!

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[Bug 113891] [radeon] Display jitter

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113891

Jean Delvare  changed:

   What|Removed |Added

 Kernel Version|4.4.4   |4.4.4, 4.5-rc7

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[patch] drm/vc4: Return -EFAULT on copy_from_user() failure

[Dan Carpenter]

The copy_from_user() function returns the number of bytes not copied but
we want to return a negative error code.

Fixes: 463873d57014 ('drm/vc4: Add an API for creating GPU shaders in GEM BOs.')
Signed-off-by: Dan Carpenter 

diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c
index 034ef2d..9807bc9 100644
--- a/drivers/gpu/drm/vc4/vc4_bo.c
+++ b/drivers/gpu/drm/vc4/vc4_bo.c
@@ -498,11 +498,12 @@ vc4_create_shader_bo_ioctl(struct drm_device *dev, void 
*data,
if (IS_ERR(bo))
return PTR_ERR(bo);

-   ret = copy_from_user(bo->base.vaddr,
+   if (copy_from_user(bo->base.vaddr,
 (void __user *)(uintptr_t)args->data,
-args->size);
-   if (ret != 0)
+args->size)) {
+   ret = -EFAULT;
goto fail;
+   }
/* Clear the rest of the memory from allocating from the BO
 * cache.
 */

[Intel-gfx] [PATCH 0/5] Pipe level color management V10

[Daniel Stone]

Hi,

On 8 March 2016 at 11:45, Rob Bradford  wrote:
> On Fri, 2016-02-26 at 17:04 +, Lionel Landwerlin wrote:
>> This series introduces pipe level color management through a set of
>> properties
>> attached to the CRTC. It also provides an implementation for some
>> Intel
>> platforms.
>> > This series is based of a previous set of patches by Shashank Sharma.
>
> Acked-by: Rob Bradford 

And for the non-Intel-specific parts (e.g. I haven't checked the exact
maths for conversion to/from BDW fixed-point, or CHV at all):
Reviewed-by: Daniel Stone 

Thanks,
Daniel

[Bug 94443] Compilation libva , No package 'libdrm' found

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94443

Bug ID: 94443
   Summary: Compilation libva , No package 'libdrm' found
   Product: DRI
   Version: unspecified
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Severity: normal
  Priority: medium
 Component: General
  Assignee: dri-devel at lists.freedesktop.org
  Reporter: swojskichlopak at wp.pl

I'm trying compile libva 32bit on 64 bit system
and from ./configure command:

#---
...
configure: error: Package requirements (libdrm >= 2.4) were not met:

No package 'libdrm' found

Consider adjusting the PKG_CONFIG_PATH environment variable if you
installed software in a non-standard prefix.

Alternatively, you may set the environment variables DRM_CFLAGS
and DRM_LIBS to avoid the need to call pkg-config.
See the pkg-config man page for more details.
#---

#--
$ cat /usr/lib/pkgconfig/libdrm.pc
prefix=/usr/local
exec_prefix=${prefix}
libdir=/usr/lib
includedir=/usr/include

Name: libdrm
Description: Userspace interface to kernel DRM services
Version: 2.4.66
Libs: -L${libdir} -ldrm
Cflags: -I${includedir} -I${includedir}/libdrm
#--

#
$ ls /usr/lib/*drm*
/usr/lib/libdrm_amdgpu.so@/usr/lib/libdrm_nouveau.so.1.0.0*
/usr/lib/libdrm_amdgpu.so.1@  /usr/lib/libdrm_radeon.so@
/usr/lib/libdrm_amdgpu.so.1.0.0*  /usr/lib/libdrm_radeon.so.1@
/usr/lib/libdrm_intel.so@ /usr/lib/libdrm_radeon.so.1.0.1*
/usr/lib/libdrm_intel.so.1@   /usr/lib/libdrm.so@
/usr/lib/libdrm_intel.so.1.0.0*   /usr/lib/libdrm.so.2@
/usr/lib/libdrm_nouveau.so@   /usr/lib/libdrm.so.2.4.0*
/usr/lib/libdrm_nouveau.so.1@
#

If is something wrong with configure (I dont know)
 how use DRM_CFLAGS ?
I tried 
#---
./configure --disable-static --enable-glx \
  --libdir=/usr/lib \
  --bindir=/usr/bin32 \
  DRM_CFLAGS=/usr/lib \
  --includedir=/usr/include 
#---
 but not working.

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[Intel-gfx] [PATCH v3 7/7] drm/atomic: Clean up update_connector_routing.

[Daniel Vetter]

On Fri, Mar 04, 2016 at 03:29:03PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 03, 2016 at 10:17:42AM +0100, Maarten Lankhorst wrote:
> > connector_state->crtc can no longer be unset by accident,
> > so that check can be removed. The other code open-codes
> > drm_atomic_get_existing_crtc_state, so use that.
> > 
> > Signed-off-by: Maarten Lankhorst 
> > ---
> >  drivers/gpu/drm/drm_atomic_helper.c | 17 -
> >  1 file changed, 4 insertions(+), 13 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
> > b/drivers/gpu/drm/drm_atomic_helper.c
> > index 2395201eb7ab..9f0d16eb04b2 100644
> > --- a/drivers/gpu/drm/drm_atomic_helper.c
> > +++ b/drivers/gpu/drm/drm_atomic_helper.c
> > @@ -265,7 +265,7 @@ update_connector_routing(struct drm_atomic_state *state,
> > const struct drm_connector_helper_funcs *funcs;
> > struct drm_encoder *new_encoder;
> > struct drm_crtc_state *crtc_state;
> > -   int idx, ret;
> > +   int ret;
> >  
> > DRM_DEBUG_ATOMIC("Updating routing for [CONNECTOR:%d:%s]\n",
> >  connector->base.id,
> > @@ -273,16 +273,12 @@ update_connector_routing(struct drm_atomic_state 
> > *state,
> >  
> > if (connector->state->crtc != connector_state->crtc) {
> > if (connector->state->crtc) {
> > -   idx = drm_crtc_index(connector->state->crtc);
> > -
> > -   crtc_state = state->crtc_states[idx];
> > +   crtc_state = drm_atomic_get_existing_crtc_state(state, 
> > connector->state->crtc);
> > crtc_state->connectors_changed = true;
> > }
> >  
> > if (connector_state->crtc) {
> > -   idx = drm_crtc_index(connector_state->crtc);
> > -
> > -   crtc_state = state->crtc_states[idx];
> > +   crtc_state = drm_atomic_get_existing_crtc_state(state, 
> > connector_state->crtc);
> > crtc_state->connectors_changed = true;
> > }
> > }
> > @@ -336,14 +332,9 @@ update_connector_routing(struct drm_atomic_state 
> > *state,
> >  
> > steal_encoder(state, new_encoder);
> >  
> > -   if (WARN_ON(!connector_state->crtc))
> > -   return -EINVAL;
> > -
> 
> I was going to suggest just this when I read the code previously.
> 
> > set_best_encoder(state, connector_state, new_encoder);
> >  
> > -   idx = drm_crtc_index(connector_state->crtc);
> > -
> > -   crtc_state = state->crtc_states[idx];
> > +   crtc_state = drm_atomic_get_existing_crtc_state(state, 
> > connector_state->crtc);
> 
> These could have been a separate patch, but no biggie
> 
> Reviewed-by: Ville Syrjälä 

Remaining patches applied to drm-misc, thanks.
-Daniel

> 
> > crtc_state->connectors_changed = true;
> >  
> > DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] using [ENCODER:%d:%s] on 
> > [CRTC:%d:%s]\n",
> > -- 
> > 2.1.0
> > 
> > ___
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel OTC
> ___
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

[Bug 94443] Compilation libva , No package 'libdrm' found

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94443

--- Comment #1 from tele  ---
*
#---
./configure --disable-static --enable-glx \
  --libdir=/usr/lib \
  --bindir=/usr/bin32 \
  DRM_LIBS=/usr/lib \
  --includedir=/usr/include 
#---

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[Bug 94443] Compilation libva , No package 'libdrm' found

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94443

--- Comment #2 from tele  ---
I forgot , libva in this case looking in 
/usr/lib64/pkgconfig/ not my /usr/lib/pkgconfig/

I will check now.

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[Bug 91518] [TAHITI] Crash caused by GPU faults while launching Unigine Heaven 4.0

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=91518

Marek Olšák  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|NEEDINFO|RESOLVED

--- Comment #6 from Marek Olšák  ---
This must be fixed, because we've tested Heaven a lot and fixed a bunch of bugs
for VI and nonVI. please reopen if you can reproduce this.

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[Intel-gfx] [PATCH 0/5] Pipe level color management V10

[Daniel Vetter]

On Tue, Mar 08, 2016 at 12:13:22PM +, Daniel Stone wrote:
> Hi,
> 
> On 8 March 2016 at 11:45, Rob Bradford  wrote:
> > On Fri, 2016-02-26 at 17:04 +, Lionel Landwerlin wrote:
> >> This series introduces pipe level color management through a set of
> >> properties
> >> attached to the CRTC. It also provides an implementation for some
> >> Intel
> >> platforms.
> >> > This series is based of a previous set of patches by Shashank Sharma.
> >
> > Acked-by: Rob Bradford 
> 
> And for the non-Intel-specific parts (e.g. I haven't checked the exact
> maths for conversion to/from BDW fixed-point, or CHV at all):
> Reviewed-by: Daniel Stone 

Applied the drm core patch to drm-misc, will apply the i915 parts as soon
as I can backmerge (but pls ping me again if that doesn't happen).
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

[Bug 94443] Compilation libva , No package 'libdrm' found

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94443

Emil Velikov  changed:

   What|Removed |Added

 Resolution|--- |DUPLICATE
 Status|NEW |RESOLVED

--- Comment #3 from Emil Velikov  ---
As mentioned in bug 94394, (and hinted in the error message) you should set
your PKG_CONFIG_PATH so that it points to the .pc files of the 32 bit setup.

Namely
export PKG_CONFIG_PATH=/usr/lib/pkgconfig/
./configure .

Please, avoid touching *any* _CFLAGS/_LIBS variables. Do reopen if the
suggestion does not work as opposed to opening yet another bug.

Thank you

*** This bug has been marked as a duplicate of bug 94394 ***

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[PATCH v13 00/14] MT8173 DRM support

[Philipp Zabel]

Once more, the MT8173 DRM driver. I have dropped the iommus property
from the mmsys device tree node and changed the GEM code to use an
OVL device with the iommus property for allocations instead of the
mmsys device.

Changes since v12:
 - use OVL device instead of mmsys device for DMA allocations
 - Remove iommus property from mmsys DT node

regards
Philipp

CK Hu (5):
  dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding
  drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.
  drm/mediatek: Add DSI sub driver
  arm64: dts: mt8173: Add display subsystem related nodes
  arm64: dts: mt8173: Add HDMI related nodes

Jie Qiu (3):
  drm/mediatek: Add DPI sub driver
  drm/mediatek: Add HDMI support
  drm/mediatek: enable hdmi output control bit

Philipp Zabel (6):
  dt-bindings: drm/mediatek: Add Mediatek HDMI dts binding
  clk: mediatek: make dpi0_sel propagate rate changes
  clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
  dt-bindings: hdmi-connector: add DDC I2C bus phandle documentation
  clk: mediatek: remove hdmitx_dig_cts from TOP clocks
  arm64: dts: mt8173-evb: enable HDMI output

 .../bindings/display/connector/hdmi-connector.txt  |   1 +
 .../bindings/display/mediatek/mediatek,disp.txt| 203 +
 .../bindings/display/mediatek/mediatek,dpi.txt |  35 +
 .../bindings/display/mediatek/mediatek,dsi.txt |  60 ++
 .../bindings/display/mediatek/mediatek,hdmi.txt| 148 
 arch/arm64/boot/dts/mediatek/mt8173-evb.dts|  38 +
 arch/arm64/boot/dts/mediatek/mt8173.dtsi   | 300 +++
 drivers/clk/mediatek/clk-mt8173.c  |  12 +-
 drivers/clk/mediatek/clk-mtk.h |  15 +-
 drivers/gpu/drm/Kconfig|   2 +
 drivers/gpu/drm/Makefile   |   1 +
 drivers/gpu/drm/mediatek/Kconfig   |  21 +
 drivers/gpu/drm/mediatek/Makefile  |  23 +
 drivers/gpu/drm/mediatek/mtk_cec.c | 245 ++
 drivers/gpu/drm/mediatek/mtk_cec.h |  25 +
 drivers/gpu/drm/mediatek/mtk_disp_ovl.c| 302 +++
 drivers/gpu/drm/mediatek/mtk_disp_rdma.c   | 240 ++
 drivers/gpu/drm/mediatek/mtk_dpi.c | 757 +
 drivers/gpu/drm/mediatek/mtk_dpi.h |  85 ++
 drivers/gpu/drm/mediatek/mtk_dpi_regs.h| 228 +
 drivers/gpu/drm/mediatek/mtk_drm_crtc.c| 582 +
 drivers/gpu/drm/mediatek/mtk_drm_crtc.h|  32 +
 drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 355 
 drivers/gpu/drm/mediatek/mtk_drm_ddp.h |  41 +
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c| 225 +
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h| 150 
 drivers/gpu/drm/mediatek/mtk_drm_drv.c | 596 +
 drivers/gpu/drm/mediatek/mtk_drm_drv.h |  57 ++
 drivers/gpu/drm/mediatek/mtk_drm_fb.c  | 165 
 drivers/gpu/drm/mediatek/mtk_drm_fb.h  |  23 +
 drivers/gpu/drm/mediatek/mtk_drm_gem.c | 269 ++
 drivers/gpu/drm/mediatek/mtk_drm_gem.h |  59 ++
 drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c| 579 +
 drivers/gpu/drm/mediatek/mtk_drm_plane.c   | 240 ++
 drivers/gpu/drm/mediatek/mtk_drm_plane.h   |  59 ++
 drivers/gpu/drm/mediatek/mtk_dsi.c | 942 +
 drivers/gpu/drm/mediatek/mtk_hdmi.c| 479 +++
 drivers/gpu/drm/mediatek/mtk_hdmi.h| 221 +
 drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c| 362 
 drivers/gpu/drm/mediatek/mtk_hdmi_hw.c | 664 +++
 drivers/gpu/drm/mediatek/mtk_hdmi_hw.h |  73 ++
 drivers/gpu/drm/mediatek/mtk_hdmi_regs.h   | 222 +
 drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 487 +++
 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 505 +++
 include/dt-bindings/clock/mt8173-clk.h |   3 +-
 45 files changed, 10126 insertions(+), 5 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
 create mode 100644 
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt
 create mode 100644 
Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
 create mode 100644 
Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
 create mode 100644 drivers/gpu/drm/mediatek/Kconfig
 create mode 100644 drivers/gpu/drm/mediatek/Makefile
 create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ovl.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_rdma.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi_regs.h
 create mode 100644 

[PATCH v13 01/14] dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding

[Philipp Zabel]

From: CK Hu 

Add device tree binding documentation for the display subsystem in
Mediatek MT8173 SoCs.

Signed-off-by: CK Hu 
Signed-off-by: Philipp Zabel 
Acked-by: Rob Herring 
---
 .../bindings/display/mediatek/mediatek,disp.txt| 203 +
 .../bindings/display/mediatek/mediatek,dpi.txt |  35 
 .../bindings/display/mediatek/mediatek,dsi.txt |  60 ++
 3 files changed, 298 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
 create mode 100644 
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt
 create mode 100644 
Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt

diff --git 
a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt 
b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
new file mode 100644
index 000..db6e77e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
@@ -0,0 +1,203 @@
+Mediatek display subsystem
+==
+
+The Mediatek display subsystem consists of various DISP function blocks in the
+MMSYS register space. The connections between them can be configured by output
+and input selectors in the MMSYS_CONFIG register space. Pixel clock and start
+of frame signal are distributed to the other function blocks by a DISP_MUTEX
+function block.
+
+All DISP device tree nodes must be siblings to the central MMSYS_CONFIG node.
+For a description of the MMSYS_CONFIG binding, see
+Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt.
+
+DISP function blocks
+
+
+A display stream starts at a source function block that reads pixel data from
+memory and ends with a sink function block that drives pixels on a display
+interface, or writes pixels back to memory. All DISP function blocks have
+their own register space, interrupt, and clock gate. The blocks that can
+access memory additionally have to list the IOMMU and local arbiter they are
+connected to.
+
+For a description of the display interface sink function blocks, see
+Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt and
+Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt.
+
+Required properties (all function blocks):
+- compatible: "mediatek,-disp-", one of
+   "mediatek,-disp-ovl"   - overlay (4 layers, blending, csc)
+   "mediatek,-disp-rdma"  - read DMA / line buffer
+   "mediatek,-disp-wdma"  - write DMA
+   "mediatek,-disp-color" - color processor
+   "mediatek,-disp-aal"   - adaptive ambient light controller
+   "mediatek,-disp-gamma" - gamma correction
+   "mediatek,-disp-merge" - merge streams from two RDMA sources
+   "mediatek,-disp-split" - split stream to two encoders
+   "mediatek,-disp-ufoe"  - data compression engine
+   "mediatek,-dsi"- DSI controller, see mediatek,dsi.txt
+   "mediatek,-dpi"- DPI controller, see mediatek,dpi.txt
+   "mediatek,-disp-mutex" - display mutex
+   "mediatek,-disp-od"- overdrive
+- reg: Physical base address and length of the function block register space
+- interrupts: The interrupt signal from the function block (required, except 
for
+  merge and split function blocks).
+- clocks: device clocks
+  See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+  For most function blocks this is just a single clock input. Only the DSI and
+  DPI controller nodes have multiple clock inputs. These are documented in
+  mediatek,dsi.txt and mediatek,dpi.txt, respectively.
+
+Required properties (DMA function blocks):
+- compatible: Should be one of
+   "mediatek,-disp-ovl"
+   "mediatek,-disp-rdma"
+   "mediatek,-disp-wdma"
+- larb: Should contain a phandle pointing to the local arbiter device as 
defined
+  in Documentation/devicetree/bindings/soc/mediatek/mediatek,smi-larb.txt
+- iommus: Should point to the respective IOMMU block with master port as
+  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
+  for details.
+
+Examples:
+
+mmsys: clock-controller at 1400 {
+   compatible = "mediatek,mt8173-mmsys", "syscon";
+   reg = <0 0x1400 0 0x1000>;
+   power-domains = < MT8173_POWER_DOMAIN_MM>;
+   #clock-cells = <1>;
+};
+
+ovl0: ovl at 1400c000 {
+   compatible = "mediatek,mt8173-disp-ovl";
+   reg = <0 0x1400c000 0 0x1000>;
+   interrupts = ;
+   power-domains = < MT8173_POWER_DOMAIN_MM>;
+   clocks = < CLK_MM_DISP_OVL0>;
+   iommus = < M4U_PORT_DISP_OVL0>;
+   mediatek,larb = <>;
+};
+
+ovl1: ovl at 1400d000 {
+   compatible = "mediatek,mt8173-disp-ovl";
+   reg = <0 0x1400d000 0 0x1000>;
+   interrupts = ;
+   power-domains = < MT8173_POWER_DOMAIN_MM>;
+   clocks = < CLK_MM_DISP_OVL1>;
+   iommus = < M4U_PORT_DISP_OVL1>;
+   mediatek,larb = <>;
+};
+
+rdma0: rdma at 1400e000 {
+   compatible = 

[PATCH v13 07/14] drm/mediatek: enable hdmi output control bit

[Philipp Zabel]

From: Jie Qiu 

MT8173 HDMI hardware has a output control bit to enable/disable HDMI
output. Because of security reason, so this bit can ONLY be controlled
in ARM supervisor mode. Now the only way to enter ARM supervisor is the
ARM trusted firmware. So atf provides a API for HDMI driver to call to
setup this HDMI control bit to enable HDMI output in supervisor mode.

Signed-off-by: Jie Qiu 
Signed-off-by: Philipp Zabel 
---
 drivers/gpu/drm/mediatek/mtk_hdmi_hw.c   | 12 
 drivers/gpu/drm/mediatek/mtk_hdmi_regs.h |  1 +
 2 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c 
b/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c
index 99c7ffc..ea4e35f 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c
@@ -15,6 +15,7 @@
 #include "mtk_hdmi_regs.h"
 #include "mtk_hdmi.h"

+#include 
 #include 
 #include 
 #include 
@@ -50,6 +51,17 @@ void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi,

 void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable)
 {
+   struct arm_smccc_res res;
+
+   /*
+* MT8173 HDMI hardware has an output control bit to enable/disable HDMI
+* output. This bit can only be controlled in ARM supervisor mode.
+* The ARM trusted firmware provides an API for the HDMI driver to set
+* this control bit to enable HDMI output in supervisor mode.
+*/
+   arm_smccc_smc(MTK_SIP_SET_AUTHORIZED_SECURE_REG, 0x14000904, 0x8000,
+ 0, 0, 0, 0, 0, );
+
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
   HDMI_PCLK_FREE_RUN, enable ? HDMI_PCLK_FREE_RUN : 0);
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h 
b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
index 8c1d318..d88279f 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
@@ -218,4 +218,5 @@
 #define MHL_SYNC_AUTO_EN   BIT(30)
 #define HDMI_PCLK_FREE_RUN BIT(31)

+#define MTK_SIP_SET_AUTHORIZED_SECURE_REG 0x8201
 #endif
-- 
2.7.0

[PATCH v13 02/14] drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.

[Philipp Zabel]

From: CK Hu 

This patch adds an initial DRM driver for the Mediatek MT8173 DISP
subsystem. It currently supports two fixed output streams from the
OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively.

Signed-off-by: CK Hu 
Signed-off-by: YT Shen 
Signed-off-by: Daniel Kurtz 
Signed-off-by: Bibby Hsieh 
Signed-off-by: Mao Huang 
Signed-off-by: Philipp Zabel 
---
Changes since v12:
 - use OVL device instead of mmsys device for DMA allocations
---
 drivers/gpu/drm/Kconfig |   2 +
 drivers/gpu/drm/Makefile|   1 +
 drivers/gpu/drm/mediatek/Kconfig|  12 +
 drivers/gpu/drm/mediatek/Makefile   |  11 +
 drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 302 ++
 drivers/gpu/drm/mediatek/mtk_disp_rdma.c| 240 +++
 drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 582 +++
 drivers/gpu/drm/mediatek/mtk_drm_crtc.h |  32 ++
 drivers/gpu/drm/mediatek/mtk_drm_ddp.c  | 355 +
 drivers/gpu/drm/mediatek/mtk_drm_ddp.h  |  41 ++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 225 +++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 150 +++
 drivers/gpu/drm/mediatek/mtk_drm_drv.c  | 592 
 drivers/gpu/drm/mediatek/mtk_drm_drv.h  |  54 +++
 drivers/gpu/drm/mediatek/mtk_drm_fb.c   | 165 
 drivers/gpu/drm/mediatek/mtk_drm_fb.h   |  23 ++
 drivers/gpu/drm/mediatek/mtk_drm_gem.c  | 269 +
 drivers/gpu/drm/mediatek/mtk_drm_gem.h  |  59 +++
 drivers/gpu/drm/mediatek/mtk_drm_plane.c| 240 +++
 drivers/gpu/drm/mediatek/mtk_drm_plane.h|  59 +++
 20 files changed, 3414 insertions(+)
 create mode 100644 drivers/gpu/drm/mediatek/Kconfig
 create mode 100644 drivers/gpu/drm/mediatek/Makefile
 create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ovl.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_rdma.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_crtc.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_crtc.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_drv.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_drv.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_fb.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_fb.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_gem.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_gem.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_plane.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_plane.h

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 8ae7ab6..f7b0d79 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -269,3 +269,5 @@ source "drivers/gpu/drm/imx/Kconfig"
 source "drivers/gpu/drm/vc4/Kconfig"

 source "drivers/gpu/drm/etnaviv/Kconfig"
+
+source "drivers/gpu/drm/mediatek/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 61766de..7b0d1ab 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_DRM_MSM) += msm/
 obj-$(CONFIG_DRM_TEGRA) += tegra/
 obj-$(CONFIG_DRM_STI) += sti/
 obj-$(CONFIG_DRM_IMX) += imx/
+obj-$(CONFIG_DRM_MEDIATEK) += mediatek/
 obj-y  += i2c/
 obj-y  += panel/
 obj-y  += bridge/
diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig
new file mode 100644
index 000..8dad892
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/Kconfig
@@ -0,0 +1,12 @@
+config DRM_MEDIATEK
+   tristate "DRM Support for Mediatek SoCs"
+   depends on DRM
+   depends on ARCH_MEDIATEK || (ARM && COMPILE_TEST)
+   select DRM_KMS_HELPER
+   select IOMMU_DMA
+   select MTK_SMI
+   help
+ Choose this option if you have a Mediatek SoCs.
+ The module will be called mediatek-drm
+ This driver provides kernel mode setting and
+ buffer management to userspace.
diff --git a/drivers/gpu/drm/mediatek/Makefile 
b/drivers/gpu/drm/mediatek/Makefile
new file mode 100644
index 000..d4bde7c
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -0,0 +1,11 @@
+mediatek-drm-y := mtk_disp_ovl.o \
+ mtk_disp_rdma.o \
+ mtk_drm_crtc.o \
+ mtk_drm_ddp.o \
+ mtk_drm_ddp_comp.o \
+ mtk_drm_drv.o \
+ mtk_drm_fb.o \
+ mtk_drm_gem.o \
+ mtk_drm_plane.o
+
+obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
new file mode 100644
index 000..8f62671f
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -0,0 +1,302 @@
+/*
+ * 

[PATCH v13 03/14] drm/mediatek: Add DSI sub driver

[Philipp Zabel]

From: CK Hu 

This patch add a drm encoder/connector driver for the MIPI DSI function
block of the Mediatek display subsystem and a phy driver for the MIPI TX
D-PHY control module.

Signed-off-by: Jitao Shi 
Signed-off-by: Philipp Zabel 
--
 drivers/gpu/drm/mediatek/Kconfig   |   2 +
 drivers/gpu/drm/mediatek/Makefile  |   4 +-
 drivers/gpu/drm/mediatek/mtk_drm_drv.c |   2 +
 drivers/gpu/drm/mediatek/mtk_drm_drv.h |   2 +
 drivers/gpu/drm/mediatek/mtk_dsi.c | 942 +
 drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 487 +
 6 files changed, 1438 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/mediatek/mtk_dsi.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_mipi_tx.c

diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig
index 8dad892..0c49a94 100644
--- a/drivers/gpu/drm/mediatek/Kconfig
+++ b/drivers/gpu/drm/mediatek/Kconfig
@@ -3,6 +3,8 @@ config DRM_MEDIATEK
depends on DRM
depends on ARCH_MEDIATEK || (ARM && COMPILE_TEST)
select DRM_KMS_HELPER
+   select DRM_MIPI_DSI
+   select DRM_PANEL
select IOMMU_DMA
select MTK_SMI
help
diff --git a/drivers/gpu/drm/mediatek/Makefile 
b/drivers/gpu/drm/mediatek/Makefile
index d4bde7c..e781db5a 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -6,6 +6,8 @@ mediatek-drm-y := mtk_disp_ovl.o \
  mtk_drm_drv.o \
  mtk_drm_fb.o \
  mtk_drm_gem.o \
- mtk_drm_plane.o
+ mtk_drm_plane.o \
+ mtk_dsi.o \
+ mtk_mipi_tx.o

 obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c 
b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 8a21ca7..4fcc0e0 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -551,6 +551,8 @@ static struct platform_driver * const mtk_drm_drivers[] = {
_drm_platform_driver,
_disp_ovl_driver,
_disp_rdma_driver,
+   _dsi_driver,
+   _mipi_tx_driver,
 };

 static int __init mtk_drm_init(void)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h 
b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
index efb744c..161a362 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
@@ -50,5 +50,7 @@ struct mtk_drm_private {

 extern struct platform_driver mtk_disp_ovl_driver;
 extern struct platform_driver mtk_disp_rdma_driver;
+extern struct platform_driver mtk_dsi_driver;
+extern struct platform_driver mtk_mipi_tx_driver;

 #endif /* MTK_DRM_DRV_H */
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c 
b/drivers/gpu/drm/mediatek/mtk_dsi.c
new file mode 100644
index 000..463d389
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -0,0 +1,942 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mtk_drm_ddp_comp.h"
+
+#define DSI_VIDEO_FIFO_DEPTH   (1920 / 4)
+#define DSI_HOST_FIFO_DEPTH64
+
+#define DSI_START  0x00
+
+#define DSI_CON_CTRL   0x10
+#define DSI_RESET  BIT(0)
+#define DSI_EN BIT(1)
+
+#define DSI_MODE_CTRL  0x14
+#define MODE   (3)
+#define CMD_MODE   0
+#define SYNC_PULSE_MODE1
+#define SYNC_EVENT_MODE2
+#define BURST_MODE 3
+#define FRM_MODE   BIT(16)
+#define MIX_MODE   BIT(17)
+
+#define DSI_TXRX_CTRL  0x18
+#define VC_NUM (2 << 0)
+#define LANE_NUM   (0xf << 2)
+#define DIS_EOTBIT(6)
+#define NULL_ENBIT(7)
+#define TE_FREERUN BIT(8)
+#define EXT_TE_EN  BIT(9)
+#define EXT_TE_EDGEBIT(10)
+#define MAX_RTN_SIZE   (0xf << 12)
+#define HSTX_CKLP_EN   BIT(16)
+
+#define DSI_PSCTRL 0x1c
+#define DSI_PS_WC  0x3fff
+#define DSI_PS_SEL (3 << 16)
+#define PACKED_PS_16BIT_RGB565 (0 << 16)
+#define LOOSELY_PS_18BIT_RGB666(1 << 16)
+#define PACKED_PS_18BIT_RGB666 (2 << 16)
+#define 

[PATCH v13 08/14] arm64: dts: mt8173: Add display subsystem related nodes

[Philipp Zabel]

From: CK Hu 

This patch adds the device nodes for the DISP function blocks
comprising the display subsystem.

Signed-off-by: CK Hu 
Signed-off-by: Cawa Cheng 
Signed-off-by: Jie Qiu 
Signed-off-by: Daniel Kurtz 
Signed-off-by: Philipp Zabel 
---
Changes since v12:
 - Remove iommus property from mmsys node
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 231 +++
 1 file changed, 231 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 8048811..6fb996f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -26,6 +26,23 @@
#address-cells = <2>;
#size-cells = <2>;

+   aliases {
+   ovl0 = 
+   ovl1 = 
+   rdma0 = 
+   rdma1 = 
+   rdma2 = 
+   wdma0 = 
+   wdma1 = 
+   color0 = 
+   color1 = 
+   split0 = 
+   split1 = 
+   dpi0 = 
+   dsi0 = 
+   dsi1 = 
+   };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -295,6 +312,26 @@
#clock-cells = <1>;
};

+   mipi_tx0: mipi-dphy at 10215000 {
+   compatible = "mediatek,mt8173-mipi-tx";
+   reg = <0 0x10215000 0 0x1000>;
+   clocks = <>;
+   clock-output-names = "mipi_tx0_pll";
+   #clock-cells = <0>;
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+
+   mipi_tx1: mipi-dphy at 10216000 {
+   compatible = "mediatek,mt8173-mipi-tx";
+   reg = <0 0x10216000 0 0x1000>;
+   clocks = <>;
+   clock-output-names = "mipi_tx1_pll";
+   #clock-cells = <0>;
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+
gic: interrupt-controller at 1022 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@@ -441,6 +478,14 @@
status = "disabled";
};

+   hdmiddc0: i2c at 11012000 {
+   compatible = "mediatek,mt8173-hdmi-ddc";
+   interrupts = ;
+   reg = <0 0x11012000 0 0x1C>;
+   clocks = < CLK_PERI_I2C5>;
+   clock-names = "ddc-i2c";
+   };
+
i2c6: i2c at 11013000 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x11013000 0 0x70>,
@@ -576,9 +621,181 @@
mmsys: clock-controller at 1400 {
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
+   power-domains = < MT8173_POWER_DOMAIN_MM>;
#clock-cells = <1>;
};

+   ovl0: ovl at 1400c000 {
+   compatible = "mediatek,mt8173-disp-ovl";
+   reg = <0 0x1400c000 0 0x1000>;
+   interrupts = ;
+   power-domains = < MT8173_POWER_DOMAIN_MM>;
+   clocks = < CLK_MM_DISP_OVL0>;
+   iommus = < M4U_PORT_DISP_OVL0>;
+   mediatek,larb = <>;
+   };
+
+   ovl1: ovl at 1400d000 {
+   compatible = "mediatek,mt8173-disp-ovl";
+   reg = <0 0x1400d000 0 0x1000>;
+   interrupts = ;
+   power-domains = < MT8173_POWER_DOMAIN_MM>;
+   clocks = < CLK_MM_DISP_OVL1>;
+   iommus = < M4U_PORT_DISP_OVL1>;
+   mediatek,larb = <>;
+   };
+
+   rdma0: rdma at 1400e000 {
+   compatible = "mediatek,mt8173-disp-rdma";
+   reg = <0 0x1400e000 0 0x1000>;
+   interrupts = ;
+   power-domains = < MT8173_POWER_DOMAIN_MM>;
+   clocks = < CLK_MM_DISP_RDMA0>;
+   iommus = < M4U_PORT_DISP_RDMA0>;
+   mediatek,larb = <>;
+   };
+
+   rdma1: rdma at 1400f000 {
+   compatible = "mediatek,mt8173-disp-rdma";
+   reg = <0 0x1400f000 0 0x1000>;
+   interrupts = ;
+   power-domains = < MT8173_POWER_DOMAIN_MM>;
+   clocks = < CLK_MM_DISP_RDMA1>;
+   iommus = < M4U_PORT_DISP_RDMA1>;
+   mediatek,larb = <>;
+   };
+
+   rdma2: rdma at 

[PATCH v13 10/14] clk: mediatek: make dpi0_sel propagate rate changes

[Philipp Zabel]

This mux is supposed to select a fitting divider after the PLL
is already set to the correct rate.

Signed-off-by: Philipp Zabel 
Acked-by: James Liao 
Acked-by: Stephen Boyd 
---
 drivers/clk/mediatek/clk-mt8173.c |  6 +-
 drivers/clk/mediatek/clk-mtk.h| 15 +--
 2 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8173.c 
b/drivers/clk/mediatek/clk-mt8173.c
index 227e356..85c0bfc 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -558,7 +558,11 @@ static const struct mtk_composite top_muxes[] __initconst 
= {
MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x0090, 16, 2, 23),
MUX_GATE(CLK_TOP_VENC_LT_SEL, "venclt_sel", venc_lt_parents, 0x0090, 
24, 4, 31),
/* CLK_CFG_6 */
-   MUX_GATE(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0, 3, 7),
+   /*
+* The dpi0_sel clock should not propagate rate changes to its parent
+* clock so the dpi driver can have full control over PLL and divider.
+*/
+   MUX_GATE_FLAGS(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0, 
3, 7, 0),
MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0x00a0, 8, 2, 15),
MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0, 16, 
3, 23),
MUX_GATE(CLK_TOP_AUD_1_SEL, "aud_1_sel", aud_1_parents, 0x00a0, 24, 2, 
31),
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 32d2e45..9f24fcf 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -83,7 +83,11 @@ struct mtk_composite {
signed char num_parents;
 };

-#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) {  \
+/*
+ * In case the rate change propagation to parent clocks is undesirable,
+ * this macro allows to specify the clock flags manually.
+ */
+#define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate, 
_flags) {\
.id = _id,  \
.name = _name,  \
.mux_reg = _reg,\
@@ -94,9 +98,16 @@ struct mtk_composite {
.divider_shift = -1,\
.parent_names = _parents,   \
.num_parents = ARRAY_SIZE(_parents),\
-   .flags = CLK_SET_RATE_PARENT,   \
+   .flags = _flags,\
}

+/*
+ * Unless necessary, all MUX_GATE clocks propagate rate changes to their
+ * parent clock by default.
+ */
+#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate)\
+   MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate, 
CLK_SET_RATE_PARENT)
+
 #define MUX(_id, _name, _parents, _reg, _shift, _width) {  \
.id = _id,  \
.name = _name,  \
-- 
2.7.0

[PATCH v13 11/14] clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output

[Philipp Zabel]

The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.

Signed-off-by: Philipp Zabel 
Acked-by: James Liao 
Acked-by: Stephen Boyd 
---
 drivers/clk/mediatek/clk-mt8173.c  | 5 +
 include/dt-bindings/clock/mt8173-clk.h | 3 ++-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/mediatek/clk-mt8173.c 
b/drivers/clk/mediatek/clk-mt8173.c
index 85c0bfc..cf4fcb6 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -1095,6 +1095,11 @@ static void __init mtk_apmixedsys_init(struct 
device_node *node)
clk_data->clks[cku->id] = clk;
}

+   clk = clk_register_divider(NULL, "hdmi_ref", "tvdpll_594m", 0,
+  base + 0x40, 16, 3, CLK_DIVIDER_POWER_OF_TWO,
+  NULL);
+   clk_data->clks[CLK_APMIXED_HDMI_REF] = clk;
+
r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
diff --git a/include/dt-bindings/clock/mt8173-clk.h 
b/include/dt-bindings/clock/mt8173-clk.h
index 7956ba1..6094bf7 100644
--- a/include/dt-bindings/clock/mt8173-clk.h
+++ b/include/dt-bindings/clock/mt8173-clk.h
@@ -176,7 +176,8 @@
 #define CLK_APMIXED_LVDSPLL13
 #define CLK_APMIXED_MSDCPLL2   14
 #define CLK_APMIXED_REF2USB_TX 15
-#define CLK_APMIXED_NR_CLK 16
+#define CLK_APMIXED_HDMI_REF   16
+#define CLK_APMIXED_NR_CLK 17

 /* INFRA_SYS */

-- 
2.7.0

[PATCH v13 12/14] dt-bindings: hdmi-connector: add DDC I2C bus phandle documentation

[Philipp Zabel]

Add an optional ddc-i2c-bus phandle property that points to
an I2C master controller that handles the connector DDC pins.

Signed-off-by: Philipp Zabel 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/display/connector/hdmi-connector.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git 
a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt 
b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt
index acd5668..508aee4 100644
--- a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt
+++ b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt
@@ -8,6 +8,7 @@ Required properties:
 Optional properties:
 - label: a symbolic name for the connector
 - hpd-gpios: HPD GPIO number
+- ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing

 Required nodes:
 - Video port for HDMI input
-- 
2.7.0

[PATCH v13 13/14] clk: mediatek: remove hdmitx_dig_cts from TOP clocks

[Philipp Zabel]

The hdmitx_dig_cts clock signal is not a child of tvdpll_445p5m,
but is routed out of the HDMI PHY module.

Signed-off-by: Philipp Zabel 
Acked-by: Stephen Boyd 
---
 drivers/clk/mediatek/clk-mt8173.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/clk/mediatek/clk-mt8173.c 
b/drivers/clk/mediatek/clk-mt8173.c
index cf4fcb6..10c9860 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -61,7 +61,6 @@ static const struct mtk_fixed_factor top_divs[] __initconst = 
{
FACTOR(CLK_TOP_CLKRTC_INT, "clkrtc_int", "clk26m", 1, 793),
FACTOR(CLK_TOP_FPC, "fpc_ck", "clk26m", 1, 1),

-   FACTOR(CLK_TOP_HDMITX_DIG_CTS, "hdmitx_dig_cts", "tvdpll_445p5m", 1, 3),
FACTOR(CLK_TOP_HDMITXPLL_D2, "hdmitxpll_d2", "hdmitx_dig_cts", 1, 2),
FACTOR(CLK_TOP_HDMITXPLL_D3, "hdmitxpll_d3", "hdmitx_dig_cts", 1, 3),

-- 
2.7.0

[PATCH v13 14/14] arm64: dts: mt8173-evb: enable HDMI output

[Philipp Zabel]

Add an HDMI connector node and enable the devices that are part of the
HDMI display path: cec, dpi0, hdmi_phy, and hdmi0.

Signed-off-by: Philipp Zabel 
---
 arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 38 +
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts 
b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index e427f04..5ee7f24 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -42,6 +42,44 @@
gpio = < 130 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+   connector {
+   compatible = "hdmi-connector";
+   label = "hdmi";
+   type = "d";
+
+   port {
+   hdmi_connector_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+_phy {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+
+   ports {
+   port at 1 {
+   reg = <1>;
+
+   hdmi0_out: endpoint {
+   remote-endpoint = <_connector_in>;
+   };
+   };
+   };
 };

  {
-- 
2.7.0

[PATCH v13 04/14] drm/mediatek: Add DPI sub driver

[Philipp Zabel]

From: Jie Qiu 

Add DPI connector/encoder to support HDMI output via the
attached HDMI bridge.

Signed-off-by: Jie Qiu 
Signed-off-by: Philipp Zabel 
---
 drivers/gpu/drm/mediatek/Makefile   |   3 +-
 drivers/gpu/drm/mediatek/mtk_dpi.c  | 757 
 drivers/gpu/drm/mediatek/mtk_dpi.h  |  85 
 drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 228 ++
 drivers/gpu/drm/mediatek/mtk_drm_drv.c  |   1 +
 drivers/gpu/drm/mediatek/mtk_drm_drv.h  |   1 +
 6 files changed, 1074 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi_regs.h

diff --git a/drivers/gpu/drm/mediatek/Makefile 
b/drivers/gpu/drm/mediatek/Makefile
index e781db5a..5fcf58e 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -8,6 +8,7 @@ mediatek-drm-y := mtk_disp_ovl.o \
  mtk_drm_gem.o \
  mtk_drm_plane.o \
  mtk_dsi.o \
- mtk_mipi_tx.o
+ mtk_mipi_tx.o \
+ mtk_dpi.o

 obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c 
b/drivers/gpu/drm/mediatek/mtk_dpi.c
new file mode 100644
index 000..ae81906
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -0,0 +1,757 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Jie Qiu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mtk_dpi.h"
+#include "mtk_dpi_regs.h"
+
+enum mtk_dpi_polarity {
+   MTK_DPI_POLARITY_RISING,
+   MTK_DPI_POLARITY_FALLING,
+};
+
+enum mtk_dpi_power_ctl {
+   DPI_POWER_START = BIT(0),
+   DPI_POWER_ENABLE = BIT(1),
+   DPI_POWER_RESUME = BIT(2),
+};
+
+struct mtk_dpi_polarities {
+   enum mtk_dpi_polarity de_pol;
+   enum mtk_dpi_polarity ck_pol;
+   enum mtk_dpi_polarity hsync_pol;
+   enum mtk_dpi_polarity vsync_pol;
+};
+
+struct mtk_dpi_sync_param {
+   u32 sync_width;
+   u32 front_porch;
+   u32 back_porch;
+   bool shift_half_line;
+};
+
+struct mtk_dpi_yc_limit {
+   u16 y_top;
+   u16 y_bottom;
+   u16 c_top;
+   u16 c_bottom;
+};
+
+static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
+{
+   u32 tmp = readl(dpi->regs + offset) & ~mask;
+
+   tmp |= (val & mask);
+   writel(tmp, dpi->regs + offset);
+}
+
+static void mtk_dpi_sw_reset(struct mtk_dpi *dpi, bool reset)
+{
+   mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
+}
+
+static void mtk_dpi_enable(struct mtk_dpi *dpi)
+{
+   mtk_dpi_mask(dpi, DPI_EN, EN, EN);
+}
+
+static void mtk_dpi_disable(struct mtk_dpi *dpi)
+{
+   mtk_dpi_mask(dpi, DPI_EN, 0, EN);
+}
+
+static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
+struct mtk_dpi_sync_param *sync)
+{
+   mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
+sync->sync_width << HPW, HPW_MASK);
+   mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
+sync->back_porch << HBP, HBP_MASK);
+   mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
+HFP_MASK);
+}
+
+static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
+struct mtk_dpi_sync_param *sync,
+u32 width_addr, u32 porch_addr)
+{
+   mtk_dpi_mask(dpi, width_addr,
+sync->sync_width << VSYNC_WIDTH_SHIFT,
+VSYNC_WIDTH_MASK);
+   mtk_dpi_mask(dpi, width_addr,
+sync->shift_half_line << VSYNC_HALF_LINE_SHIFT,
+VSYNC_HALF_LINE_MASK);
+   mtk_dpi_mask(dpi, porch_addr,
+sync->back_porch << VSYNC_BACK_PORCH_SHIFT,
+VSYNC_BACK_PORCH_MASK);
+   mtk_dpi_mask(dpi, porch_addr,
+sync->front_porch << VSYNC_FRONT_PORCH_SHIFT,
+VSYNC_FRONT_PORCH_MASK);
+}
+
+static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
+ struct mtk_dpi_sync_param *sync)
+{
+   mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH, DPI_TGEN_VPORCH);
+}
+
+static void mtk_dpi_config_vsync_leven(struct mtk_dpi *dpi,
+  struct mtk_dpi_sync_param *sync)
+{
+   mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_LEVEN,
+

[PATCH v13 09/14] arm64: dts: mt8173: Add HDMI related nodes

[Philipp Zabel]

From: CK Hu 

This patch adds the device nodes for the HDMI encoder, HDMI PHY,
and HDMI CEC modules.

Signed-off-by: CK Hu 
Signed-off-by: Cawa Cheng 
Signed-off-by: Jie Qiu 
Signed-off-by: Daniel Kurtz 
Signed-off-by: Philipp Zabel 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 69 
 1 file changed, 69 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 6fb996f..78c121f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -199,6 +199,16 @@
 ,
 ;

+   hdmi_pin: xxx {
+
+   /*hdmi htplg pin*/
+   pins1 {
+   pinmux = 
;
+   input-enable;
+   bias-pull-down;
+   };
+   };
+
i2c0_pins_a: i2c0 {
pins1 {
pinmux = 
,
@@ -286,6 +296,14 @@
clock-names = "spi", "wrap";
};

+   cec: cec at 10013000 {
+   compatible = "mediatek,mt8173-cec";
+   reg = <0 0x10013000 0 0xbc>;
+   interrupts = ;
+   clocks = < CLK_INFRA_CEC>;
+   status = "disabled";
+   };
+
sysirq: intpol-controller at 10200620 {
compatible = "mediatek,mt8173-sysirq",
 "mediatek,mt6577-sysirq";
@@ -312,6 +330,19 @@
#clock-cells = <1>;
};

+   hdmi_phy: hdmi-phy at 10209100 {
+   compatible = "mediatek,mt8173-hdmi-phy";
+   reg = <0 0x10209100 0 0x24>;
+   clocks = < CLK_APMIXED_HDMI_REF>;
+   clock-names = "pll_ref";
+   clock-output-names = "hdmitx_dig_cts";
+   mediatek,ibias = <0xa>;
+   mediatek,ibias_up = <0x1c>;
+   #clock-cells = <0>;
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+
mipi_tx0: mipi-dphy at 10215000 {
compatible = "mediatek,mt8173-mipi-tx";
reg = <0 0x10215000 0 0x1000>;
@@ -794,6 +825,12 @@
 < CLK_APMIXED_TVDPLL>;
clock-names = "pixel", "engine", "pll";
status = "disabled";
+
+   port {
+   dpi0_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
};

pwm0: pwm at 1401e000 {
@@ -851,6 +888,38 @@
clocks = < CLK_MM_DISP_OD>;
};

+   hdmi0: hdmi at 14025000 {
+   compatible = "mediatek,mt8173-hdmi";
+   reg = <0 0x14025000 0 0x400>;
+   interrupts = ;
+   clocks = < CLK_MM_HDMI_PIXEL>,
+< CLK_MM_HDMI_PLLCK>,
+< CLK_MM_HDMI_AUDIO>,
+< CLK_MM_HDMI_SPDIF>;
+   clock-names = "pixel", "pll", "bclk", "spdif";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pin>;
+   phys = <_phy>;
+   phy-names = "hdmi";
+   mediatek,syscon-hdmi = < 0x900>;
+   assigned-clocks = < CLK_TOP_HDMI_SEL>;
+   assigned-clock-parents = <_phy>;
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port at 0 {
+   reg = <0>;
+
+   hdmi0_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   };
+   };
+
larb4: larb at 14027000 {
compatible = "mediatek,mt8173-smi-larb";
reg = <0 0x14027000 0 0x1000>;
-- 
2.7.0

[PATCH v13 05/14] dt-bindings: drm/mediatek: Add Mediatek HDMI dts binding

[Philipp Zabel]

Add the device tree binding documentation for Mediatek HDMI,
HDMI PHY and HDMI DDC devices.

Signed-off-by: Philipp Zabel 
Acked-by: Rob Herring 
---
 .../bindings/display/mediatek/mediatek,hdmi.txt| 148 +
 1 file changed, 148 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt

diff --git 
a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt 
b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
new file mode 100644
index 000..7b12424
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
@@ -0,0 +1,148 @@
+Mediatek HDMI Encoder
+=
+
+The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
+its parallel input.
+
+Required properties:
+- compatible: Should be "mediatek,-hdmi".
+- reg: Physical base address and length of the controller's registers
+- interrupts: The interrupt signal from the function block.
+- clocks: device clocks
+  See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- clock-names: must contain "pixel", "pll", "bclk", and "spdif".
+- phys: phandle link to the HDMI PHY node.
+  See Documentation/devicetree/bindings/phy/phy-bindings.txt for details.
+- phy-names: must contain "hdmi"
+- mediatek,syscon-hdmi: phandle link and register offset to the system
+  configuration registers. For mt8173 this must be offset 0x900 into the
+  MMSYS_CONFIG region: < 0x900>.
+- ports: A node containing input and output port nodes with endpoint
+  definitions as documented in Documentation/devicetree/bindings/graph.txt.
+- port at 0: The input port in the ports node should be connected to a DPI 
output
+  port.
+- port at 1: The output port in the ports node should be connected to the input
+  port of a connector node that contains a ddc-i2c-bus property, or to the
+  input port of an attached bridge chip, such as a SlimPort transmitter.
+
+HDMI CEC
+
+
+The HDMI CEC controller handles hotplug detection and CEC communication.
+
+Required properties:
+- compatible: Should be "mediatek,-cec"
+- reg: Physical base address and length of the controller's registers
+- interrupts: The interrupt signal from the function block.
+- clocks: device clock
+
+HDMI DDC
+
+
+The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
+The Mediatek's I2C controller is used to interface with I2C devices.
+
+Required properties:
+- compatible: Should be "mediatek,-hdmi-ddc"
+- reg: Physical base address and length of the controller's registers
+- clocks: device clock
+- clock-names: Should be "ddc-i2c".
+
+HDMI PHY
+
+
+The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
+output and drives the HDMI pads.
+
+Required properties:
+- compatible: "mediatek,-hdmi-phy"
+- reg: Physical base address and length of the module's registers
+- clocks: PLL reference clock
+- clock-names: must contain "pll_ref"
+- clock-output-names: must be "hdmitx_dig_cts" on mt8173
+- #phy-cells: must be <0>
+- #clock-cells: must be <0>
+
+Optional properties:
+- mediatek,ibias: TX DRV bias current for <1.65Gbps, defaults to 0xa
+- mediatek,ibias_up: TX DRV bias current for >1.65Gbps, defaults to 0x1c
+
+Example:
+
+cec: cec at 10013000 {
+   compatible = "mediatek,mt8173-cec";
+   reg = <0 0x10013000 0 0xbc>;
+   interrupts = ;
+   clocks = < CLK_INFRA_CEC>;
+};
+
+hdmi_phy: hdmi-phy at 10209100 {
+   compatible = "mediatek,mt8173-hdmi-phy";
+   reg = <0 0x10209100 0 0x24>;
+   clocks = < CLK_APMIXED_HDMI_REF>;
+   clock-names = "pll_ref";
+   clock-output-names = "hdmitx_dig_cts";
+   mediatek,ibias = <0xa>;
+   mediatek,ibias_up = <0x1c>;
+   #clock-cells = <0>;
+   #phy-cells = <0>;
+};
+
+hdmi_ddc0: i2c at 11012000 {
+   compatible = "mediatek,mt8173-hdmi-ddc";
+   reg = <0 0x11012000 0 0x1c>;
+   interrupts = ;
+   clocks = < CLK_PERI_I2C5>;
+   clock-names = "ddc-i2c";
+};
+
+hdmi0: hdmi at 14025000 {
+   compatible = "mediatek,mt8173-hdmi";
+   reg = <0 0x14025000 0 0x400>;
+   interrupts = ;
+   clocks = < CLK_MM_HDMI_PIXEL>,
+< CLK_MM_HDMI_PLLCK>,
+< CLK_MM_HDMI_AUDIO>,
+< CLK_MM_HDMI_SPDIF>;
+   clock-names = "pixel", "pll", "bclk", "spdif";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pin>;
+   phys = <_phy>;
+   phy-names = "hdmi";
+   mediatek,syscon-hdmi = < 0x900>;
+   assigned-clocks = < CLK_TOP_HDMI_SEL>;
+   assigned-clock-parents = <_phy>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port at 0 {
+   reg = <0>;
+
+   hdmi0_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port at 1 {
+   reg = 

[PATCH v13 06/14] drm/mediatek: Add HDMI support

[Philipp Zabel]

From: Jie Qiu 

This patch adds drivers for the HDMI bridge connected to the DPI0
display subsystem function block, for the HDMI DDC block, and for
the HDMI PHY to support HDMI output.

Signed-off-by: Jie Qiu 
Signed-off-by: Philipp Zabel 
---
 drivers/gpu/drm/mediatek/Kconfig   |   7 +
 drivers/gpu/drm/mediatek/Makefile  |   9 +
 drivers/gpu/drm/mediatek/mtk_cec.c | 245 ++
 drivers/gpu/drm/mediatek/mtk_cec.h |  25 +
 drivers/gpu/drm/mediatek/mtk_drm_drv.c |   1 +
 drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c| 579 ++
 drivers/gpu/drm/mediatek/mtk_hdmi.c| 479 ++
 drivers/gpu/drm/mediatek/mtk_hdmi.h| 221 +
 drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c| 362 ++
 drivers/gpu/drm/mediatek/mtk_hdmi_hw.c | 652 +
 drivers/gpu/drm/mediatek/mtk_hdmi_hw.h |  73 +++
 drivers/gpu/drm/mediatek/mtk_hdmi_regs.h   | 221 +
 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 505 +++
 13 files changed, 3379 insertions(+)
 create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_hw.c
 create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_hw.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
 create mode 100644 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c

diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig
index 0c49a94..e2ff158 100644
--- a/drivers/gpu/drm/mediatek/Kconfig
+++ b/drivers/gpu/drm/mediatek/Kconfig
@@ -12,3 +12,10 @@ config DRM_MEDIATEK
  The module will be called mediatek-drm
  This driver provides kernel mode setting and
  buffer management to userspace.
+
+config DRM_MEDIATEK_HDMI
+   tristate "DRM HDMI Support for Mediatek SoCs"
+   depends on DRM_MEDIATEK
+   select GENERIC_PHY
+   help
+ DRM/KMS HDMI driver for Mediatek SoCs
diff --git a/drivers/gpu/drm/mediatek/Makefile 
b/drivers/gpu/drm/mediatek/Makefile
index 5fcf58e..6d53bee 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -12,3 +12,12 @@ mediatek-drm-y := mtk_disp_ovl.o \
  mtk_dpi.o

 obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
+
+mediatek-drm-hdmi-objs := mtk_cec.o \
+ mtk_drm_hdmi_drv.o \
+ mtk_hdmi.o \
+ mtk_hdmi_ddc_drv.o \
+ mtk_hdmi_hw.o \
+ mtk_mt8173_hdmi_phy.o
+
+obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o
diff --git a/drivers/gpu/drm/mediatek/mtk_cec.c 
b/drivers/gpu/drm/mediatek/mtk_cec.c
new file mode 100644
index 000..cba3647
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_cec.c
@@ -0,0 +1,245 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Jie Qiu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mtk_cec.h"
+
+#define TR_CONFIG  0x00
+#define CLEAR_CEC_IRQ  BIT(15)
+
+#define CEC_CKGEN  0x04
+#define CEC_32K_PDNBIT(19)
+#define PDNBIT(16)
+
+#define RX_EVENT   0x54
+#define HDMI_PORD  BIT(25)
+#define HDMI_HTPLG BIT(24)
+#define HDMI_PORD_INT_EN   BIT(9)
+#define HDMI_HTPLG_INT_EN  BIT(8)
+
+#define RX_GEN_WD  0x58
+#define HDMI_PORD_INT_32K_STATUS   BIT(26)
+#define RX_RISC_INT_32K_STATUS BIT(25)
+#define HDMI_HTPLG_INT_32K_STATUS  BIT(24)
+#define HDMI_PORD_INT_32K_CLR  BIT(18)
+#define RX_INT_32K_CLR BIT(17)
+#define HDMI_HTPLG_INT_32K_CLR BIT(16)
+#define HDMI_PORD_INT_32K_STA_MASK BIT(10)
+#define RX_RISC_INT_32K_STA_MASK   BIT(9)
+#define HDMI_HTPLG_INT_32K_STA_MASKBIT(8)
+#define HDMI_PORD_INT_32K_EN   BIT(2)
+#define RX_INT_32K_EN  BIT(1)
+#define HDMI_HTPLG_INT_32K_EN  BIT(0)
+
+#define NORMAL_INT_CTRL0x5C
+#define HDMI_HTPLG_INT_STA BIT(0)
+#define HDMI_PORD_INT_STA  BIT(1)
+#define HDMI_HTPLG_INT_CLR   

[Intel-gfx] [PATCH 0/5] Pipe level color management V10

[Rob Bradford]

On Fri, 2016-02-26 at 17:04 +, Lionel Landwerlin wrote:
> This series introduces pipe level color management through a set of
> properties
> attached to the CRTC. It also provides an implementation for some
> Intel
> platforms.
> > This series is based of a previous set of patches by Shashank Sharma.

Acked-by: Rob Bradford 

Userspace parts that use DRM API are lgtm'ed by chromium OWNERS at:

https://codereview.chromium.org/1182063002/

Rob

[PATCH 3/8] drm: atmel-hlcdc: fix connector and encoder types

[Nicolas Ferre]

Le 06/01/2016 11:19, Boris Brezillon a écrit :
> The hlcdc IP keep the pixel stream in raw RGB mode, and does not provide
> any specific connector. Since DRM_MODE_CONNECTOR_RAW_RGB does not exist,
> use DRM_MODE_CONNECTOR_Unknown.
> 
> Signed-off-by: Boris Brezillon 

Yes:
Acked-by: Nicolas Ferre 

> ---
>  drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
> index 0f7ec01..49494e9 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
> @@ -256,7 +256,7 @@ static int atmel_hlcdc_create_panel_output(struct 
> drm_device *dev,
>  _hlcdc_panel_encoder_helper_funcs);
>   ret = drm_encoder_init(dev, >base.encoder,
>  _hlcdc_panel_encoder_funcs,
> -DRM_MODE_ENCODER_LVDS, NULL);
> +DRM_MODE_ENCODER_NONE, NULL);
>   if (ret)
>   return ret;
>  
> @@ -266,7 +266,7 @@ static int atmel_hlcdc_create_panel_output(struct 
> drm_device *dev,
>_hlcdc_panel_connector_helper_funcs);
>   ret = drm_connector_init(dev, >base.connector,
>_hlcdc_panel_connector_funcs,
> -  DRM_MODE_CONNECTOR_LVDS);
> +  DRM_MODE_CONNECTOR_Unknown);
>   if (ret)
>   goto err_encoder_cleanup;
>  
> 


-- 
Nicolas Ferre

[PATCH 5/8] drm: atmel-hlcdc: support extended timing ranges on sama5d4 and sama5d2

[Nicolas Ferre]

Le 06/01/2016 11:19, Boris Brezillon a écrit :
> The display timings on old SoCs older than the sama5d4 are quite limited
> and prevent the use of many displays. Add support for extended timing
> ranges on sama5d2 and sama5d4.
> 
> Signed-off-by: Boris Brezillon 

Absolutely:
Acked-by: Nicolas Ferre 

Thanks.


> ---
>  drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 24 ++--
>  drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h |  6 ++
>  2 files changed, 24 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
> index d760475..66f97e1 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
> @@ -50,6 +50,9 @@ static const struct atmel_hlcdc_dc_desc 
> atmel_hlcdc_dc_at91sam9n12 = {
>   .min_height = 0,
>   .max_width = 1280,
>   .max_height = 860,
> + .max_spw = 0x3f,
> + .max_vpw = 0x3f,
> + .max_hpw = 0xff,
>   .nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9n12_layers),
>   .layers = atmel_hlcdc_at91sam9n12_layers,
>  };
> @@ -134,6 +137,9 @@ static const struct atmel_hlcdc_dc_desc 
> atmel_hlcdc_dc_at91sam9x5 = {
>   .min_height = 0,
>   .max_width = 800,
>   .max_height = 600,
> + .max_spw = 0x3f,
> + .max_vpw = 0x3f,
> + .max_hpw = 0xff,
>   .nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9x5_layers),
>   .layers = atmel_hlcdc_at91sam9x5_layers,
>  };
> @@ -237,6 +243,9 @@ static const struct atmel_hlcdc_dc_desc 
> atmel_hlcdc_dc_sama5d3 = {
>   .min_height = 0,
>   .max_width = 2048,
>   .max_height = 2048,
> + .max_spw = 0x3f,
> + .max_vpw = 0x3f,
> + .max_hpw = 0x1ff,
>   .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d3_layers),
>   .layers = atmel_hlcdc_sama5d3_layers,
>  };
> @@ -320,6 +329,9 @@ static const struct atmel_hlcdc_dc_desc 
> atmel_hlcdc_dc_sama5d4 = {
>   .min_height = 0,
>   .max_width = 2048,
>   .max_height = 2048,
> + .max_spw = 0xff,
> + .max_vpw = 0xff,
> + .max_hpw = 0x3ff,
>   .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d4_layers),
>   .layers = atmel_hlcdc_sama5d4_layers,
>  };
> @@ -358,19 +370,19 @@ int atmel_hlcdc_dc_mode_valid(struct atmel_hlcdc_dc *dc,
>   int hback_porch = mode->htotal - mode->hsync_end;
>   int hsync_len = mode->hsync_end - mode->hsync_start;
>  
> - if (hsync_len > 0x40 || hsync_len < 1)
> + if (hsync_len > dc->desc->max_spw + 1 || hsync_len < 1)
>   return MODE_HSYNC;
>  
> - if (vsync_len > 0x40 || vsync_len < 1)
> + if (vsync_len > dc->desc->max_spw + 1 || vsync_len < 1)
>   return MODE_VSYNC;
>  
> - if (hfront_porch > 0x200 || hfront_porch < 1 ||
> - hback_porch > 0x200 || hback_porch < 1 ||
> + if (hfront_porch > dc->desc->max_hpw + 1 || hfront_porch < 1 ||
> + hback_porch > dc->desc->max_hpw + 1 || hback_porch < 1 ||
>   mode->hdisplay < 1)
>   return MODE_H_ILLEGAL;
>  
> - if (vfront_porch > 0x40 || vfront_porch < 1 ||
> - vback_porch > 0x40 || vback_porch < 0 ||
> + if (vfront_porch > dc->desc->max_vpw + 1 || vfront_porch < 1 ||
> + vback_porch > dc->desc->max_vpw || vback_porch < 0 ||
>   mode->vdisplay < 1)
>   return MODE_V_ILLEGAL;
>  
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> index 6a762c9..864791e 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> @@ -50,6 +50,9 @@
>   * @min_height: minimum height supported by the Display Controller
>   * @max_width: maximum width supported by the Display Controller
>   * @max_height: maximum height supported by the Display Controller
> + * @max_spw: maximum vertical/horizontal pulse width
> + * @max_vpw: maximum vertical back/front porch width
> + * @max_hpw: maximum horizontal back/front porch width
>   * @layers: a layer description table describing available layers
>   * @nlayers: layer description table size
>   */
> @@ -58,6 +61,9 @@ struct atmel_hlcdc_dc_desc {
>   int min_height;
>   int max_width;
>   int max_height;
> + int max_spw;
> + int max_vpw;
> + int max_hpw;
>   const struct atmel_hlcdc_layer_desc *layers;
>   int nlayers;
>  };
> 


-- 
Nicolas Ferre

[PATCH 4/8] drm: atmel-hlcdc: remove leftovers from atomic mode setting migration

[Nicolas Ferre]

Le 06/01/2016 11:19, Boris Brezillon a écrit :
> The ->dpms field is no longer used and can be removed.
> The same goes for the dummy ->mode_fixup() implementation which always
> returns true.
> 
> Signed-off-by: Boris Brezillon 

Acked-by: Nicolas Ferre 

> ---
>  drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c | 12 
>  1 file changed, 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
> index 49494e9..2255dc9 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c
> @@ -44,13 +44,11 @@ enum atmel_hlcdc_connector_rgb_mode {
>   * @connector: DRM connector
>   * @encoder: DRM encoder
>   * @dc: pointer to the atmel_hlcdc_dc structure
> - * @dpms: current DPMS mode
>   */
>  struct atmel_hlcdc_rgb_output {
>   struct drm_connector connector;
>   struct drm_encoder encoder;
>   struct atmel_hlcdc_dc *dc;
> - int dpms;
>  };
>  
>  static inline struct atmel_hlcdc_rgb_output *
> @@ -104,14 +102,6 @@ static void atmel_hlcdc_panel_encoder_disable(struct 
> drm_encoder *encoder)
>   drm_panel_disable(panel->panel);
>  }
>  
> -static bool
> -atmel_hlcdc_panel_encoder_mode_fixup(struct drm_encoder *encoder,
> -  const struct drm_display_mode *mode,
> -  struct drm_display_mode *adjusted)
> -{
> - return true;
> -}
> -
>  static void
>  atmel_hlcdc_rgb_encoder_mode_set(struct drm_encoder *encoder,
>struct drm_display_mode *mode,
> @@ -147,7 +137,6 @@ atmel_hlcdc_rgb_encoder_mode_set(struct drm_encoder 
> *encoder,
>  }
>  
>  static const struct drm_encoder_helper_funcs 
> atmel_hlcdc_panel_encoder_helper_funcs = {
> - .mode_fixup = atmel_hlcdc_panel_encoder_mode_fixup,
>   .mode_set = atmel_hlcdc_rgb_encoder_mode_set,
>   .disable = atmel_hlcdc_panel_encoder_disable,
>   .enable = atmel_hlcdc_panel_encoder_enable,
> @@ -248,7 +237,6 @@ static int atmel_hlcdc_create_panel_output(struct 
> drm_device *dev,
>   if (!panel)
>   return -EINVAL;
>  
> - panel->base.dpms = DRM_MODE_DPMS_OFF;
>  
>   panel->base.dc = dc;
>  
> 


-- 
Nicolas Ferre

[PATCH 1/8] drm: atmel-hlcdc: add a ->cleanup_fb() operation

[Nicolas Ferre]

Le 06/01/2016 11:19, Boris Brezillon a écrit :
> Add a ->cleanup_fb() operation to avoid memory leaks when the atomic
> operation is interrupted after the ->prepare_fb() call.
> 
> Signed-off-by: Boris Brezillon 
> Fixes 2389fc1 ("drm: atmel-hlcdc: Atomic mode-setting conversion")

Seems okay:
Reviewed-by: Nicolas Ferre 


> ---
>  drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h|  2 ++
>  drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 22 +++---
>  2 files changed, 21 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> index cf6b375..e88e349 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> @@ -81,11 +81,13 @@ struct atmel_hlcdc_plane_properties {
>   * @layer: HLCDC layer structure
>   * @properties: pointer to the property definitions structure
>   * @rotation: current rotation status
> + * @prepared: flagging the plane has prepared for an atomic update
>   */
>  struct atmel_hlcdc_plane {
>   struct drm_plane base;
>   struct atmel_hlcdc_layer layer;
>   struct atmel_hlcdc_plane_properties *properties;
> + bool prepared;
>  };
>  
>  static inline struct atmel_hlcdc_plane *
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> index 1ffe9c3..35027d0 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> @@ -715,11 +715,25 @@ static int atmel_hlcdc_plane_prepare_fb(struct 
> drm_plane *p,
>   const struct drm_plane_state *new_state)
>  {
>   struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
> + int ret;
>  
> - if (!new_state->fb)
> - return 0;
> + ret = atmel_hlcdc_layer_update_start(>layer);
> + if (!ret)
> + plane->prepared = true;
> +
> + return ret;
> +}
> +
> +static void atmel_hlcdc_plane_cleanup_fb(struct drm_plane *p,
> + const struct drm_plane_state *old_state)
> +{
> + struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
> +
> + if (!plane->prepared)
> + return;
>  
> - return atmel_hlcdc_layer_update_start(>layer);
> + atmel_hlcdc_layer_update_rollback(>layer);
> + plane->prepared = false;
>  }
>  
>  static void atmel_hlcdc_plane_atomic_update(struct drm_plane *p,
> @@ -739,6 +753,7 @@ static void atmel_hlcdc_plane_atomic_update(struct 
> drm_plane *p,
>   atmel_hlcdc_plane_update_disc_area(plane, state);
>  
>   atmel_hlcdc_layer_update_commit(>layer);
> + plane->prepared = false;
>  }
>  
>  static void atmel_hlcdc_plane_atomic_disable(struct drm_plane *p,
> @@ -844,6 +859,7 @@ static void atmel_hlcdc_plane_init_properties(struct 
> atmel_hlcdc_plane *plane,
>  
>  static struct drm_plane_helper_funcs atmel_hlcdc_layer_plane_helper_funcs = {
>   .prepare_fb = atmel_hlcdc_plane_prepare_fb,
> + .cleanup_fb = atmel_hlcdc_plane_cleanup_fb,
>   .atomic_check = atmel_hlcdc_plane_atomic_check,
>   .atomic_update = atmel_hlcdc_plane_atomic_update,
>   .atomic_disable = atmel_hlcdc_plane_atomic_disable,
> 


-- 
Nicolas Ferre

[PATCH 1/2] drm/radeon: Fix eDP for single-display iMac10,1

[Alex Deucher]

On Sat, Mar 5, 2016 at 8:39 PM, Mario Kleiner
 wrote:
> The late 2009, 27 inch Apple iMac10,1 has an
> internal eDP display and an external Mini-
> Displayport output, driven by a DCE-3.2, RV730
> Radeon Mobility HD-4670.
>
> The machine worked fine in a dual-display setup
> with eDP panel + externally connected HDMI
> or DVI-D digital display sink, connected via
> MiniDP to DVI or HDMI adapter.
>
> However, booting the machine single-display with
> only eDP panel results in a completely black
> display - even backlight powering off, as soon as
> the radeon modesetting driver loads.
>
> This patch fixes the single dispay eDP case by
> assigning encoders based on dig->linkb, similar
> to DCE-4+. While this should not be generally
> necessary (Alex: "...atom on normal boards
> should be able to handle any mapping."), Apple
> seems to use some special routing here.
>
> One remaining problem not solved by this patch
> is that an external Minidisplayport->DP sink
> does still not work on iMac10,1, whereas external
> DVI and HDMI sinks continue to work.
>
> The problem affects at least all tested kernels
> since Linux 3.13 - didn't test earlier kernels, so
> backporting to stable probably makes sense.
>
> Signed-off-by: Mario Kleiner 
> Cc: 

Actually, thinking about this more, this probably needs more
investigation.  There are only two front end encoders, but up to 5
backend transmitters (2 transmitters with 2 links each and 1
transmitter with 1 link) that can be used independently so if you hard
code the front end to backend link, you will not end up with valid
routing in some cases.  E.g., if you have two connectors using linka
of the transmitters you'll end up with the same front end when you
really want separate front ends.

Alex

> ---
>  drivers/gpu/drm/radeon/atombios_encoders.c | 10 --
>  1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c 
> b/drivers/gpu/drm/radeon/atombios_encoders.c
> index 01b20e1..a28377c 100644
> --- a/drivers/gpu/drm/radeon/atombios_encoders.c
> +++ b/drivers/gpu/drm/radeon/atombios_encoders.c
> @@ -2176,9 +2176,15 @@ int radeon_atom_pick_dig_encoder(struct drm_encoder 
> *encoder, int fe_idx)
> goto assigned;
> }
>
> -   /* on DCE32 and encoder can driver any block so just crtc id */
> +   /*
> +* On DCE32 any encoder can drive any block so could just use crtc id,
> +* but Apple thinks different at least on iMac10,1, so use linkb.
> +*/
> if (ASIC_IS_DCE32(rdev)) {
> -   enc_idx = radeon_crtc->crtc_id;
> +   if (dig->linkb)
> +   enc_idx = 1;
> +   else
> +   enc_idx = 0;
> goto assigned;
> }
>
> --
> 2.7.0
>
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

[Bug 114031] New: Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

Bug ID: 114031
   Summary: Radeon Kernel Mode Setting sets wrong mode on Acer
Z5610
   Product: Drivers
   Version: 2.5
Kernel Version: 4.3.6
  Hardware: All
OS: Linux
  Tree: Mainline
Status: NEW
  Severity: normal
  Priority: P1
 Component: Video(DRI - non Intel)
  Assignee: drivers_video-dri at kernel-bugs.osdl.org
  Reporter: massimo.burcheri at gmx.de
Regression: No

This is an All-in-One PC, model Acer Z5610.

$ lspci |grep VGA
01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI]
RV730/M96-XT [Mobility Radeon HD 4670]

As of current kernel 4.3.6, all recent kernels beginning from >3.18.0 are
setting wrong KMS modes:

head -n1 /sys/class/drm/card0-LVDS-1/modes 
1680x1050

This should be the native 1980x1080 resolution.

Last kernel doing that right: 3.18.0




$ xrandr --verbose
Screen 0: minimum 320 x 200, current 1400 x 1050, maximum 8192 x 8192
LVDS connected 1400x1050+0+0 (0x54) normal (normal left inverted right x axis y
axis) 0mm x 0mm
Identifier: 0x51
Timestamp:  24630
Subpixel:   horizontal rgb
Gamma:  1.0:1.0:1.0
Brightness: 1.0
Clones:
CRTC:   0
CRTCs:  0 1
Transform:  1.00 0.00 0.00
0.00 1.00 0.00
0.00 0.00 1.00
   filter: 
scaling mode: Full 
supported: None, Full, Center, Full aspect
  1680x1050 (0x53) 146.250MHz -HSync +VSync
h: width  1680 start 1784 end 1960 total 2240 skew0 clock  65.29KHz
v: height 1050 start 1053 end 1059 total 1089   clock  59.95Hz
  1400x1050 (0x54) 121.750MHz -HSync +VSync *current
h: width  1400 start 1488 end 1632 total 1864 skew0 clock  65.32KHz
v: height 1050 start 1053 end 1057 total 1089   clock  59.98Hz
  1280x1024 (0x55) 109.000MHz -HSync +VSync
h: width  1280 start 1368 end 1496 total 1712 skew0 clock  63.67KHz
v: height 1024 start 1027 end 1034 total 1063   clock  59.89Hz
  1440x900 (0x56) 106.500MHz -HSync +VSync
h: width  1440 start 1528 end 1672 total 1904 skew0 clock  55.93KHz
v: height  900 start  903 end  909 total  934   clock  59.89Hz
  1280x960 (0x57) 101.250MHz -HSync +VSync
h: width  1280 start 1360 end 1488 total 1696 skew0 clock  59.70KHz
v: height  960 start  963 end  967 total  996   clock  59.94Hz
  1280x854 (0x58) 89.250MHz -HSync +VSync
h: width  1280 start 1352 end 1480 total 1680 skew0 clock  53.12KHz
v: height  854 start  857 end  867 total  887   clock  59.89Hz
  1280x800 (0x59) 83.500MHz -HSync +VSync
h: width  1280 start 1352 end 1480 total 1680 skew0 clock  49.70KHz
v: height  800 start  803 end  809 total  831   clock  59.81Hz
  1280x720 (0x5a) 74.500MHz -HSync +VSync
h: width  1280 start 1344 end 1472 total 1664 skew0 clock  44.77KHz
v: height  720 start  723 end  728 total  748   clock  59.86Hz
  1152x768 (0x5b) 71.750MHz -HSync +VSync
h: width  1152 start 1216 end 1328 total 1504 skew0 clock  47.71KHz
v: height  768 start  771 end  781 total  798   clock  59.78Hz
  1024x768 (0x5c) 63.500MHz -HSync +VSync
h: width  1024 start 1072 end 1176 total 1328 skew0 clock  47.82KHz
v: height  768 start  771 end  775 total  798   clock  59.92Hz
  800x600 (0x5d) 38.250MHz -HSync +VSync
h: width   800 start  832 end  912 total 1024 skew0 clock  37.35KHz
v: height  600 start  603 end  607 total  624   clock  59.86Hz
  848x480 (0x5e) 31.500MHz -HSync +VSync
h: width   848 start  872 end  952 total 1056 skew0 clock  29.83KHz
v: height  480 start  483 end  493 total  500   clock  59.66Hz
  720x480 (0x5f) 26.750MHz -HSync +VSync
h: width   720 start  744 end  808 total  896 skew0 clock  29.85KHz
v: height  480 start  483 end  493 total  500   clock  59.71Hz
  640x480 (0x60) 23.750MHz -HSync +VSync
h: width   640 start  664 end  720 total  800 skew0 clock  29.69KHz
v: height  480 start  483 end  487 total  500   clock  59.38Hz

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[Bug 113891] [radeon] Display jitter

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113891

Alex Deucher  changed:

   What|Removed |Added

 CC||alexdeucher at gmail.com

--- Comment #2 from Alex Deucher  ---
I'll just revert it for now.  Sorry for the breakage.

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

Alex Deucher  changed:

   What|Removed |Added

 CC||alexdeucher at gmail.com

--- Comment #1 from Alex Deucher  ---
Please attach your xorg log, xorg config (if you are using one), and dmesg
output.

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #2 from Massimo Burcheri  ---
Hm, I think xorg is not even involved in the issue..

No xorg.config but these snippets:

$ cat /etc/X11/xorg.conf.d/*
Section "Files"
EndSection
Section "Module"
Load"vnc"
EndSection
Section "Screen"
Identifier  "Default Screen"
Option  "PasswordFile"  "/root/.vnc/passwd"
EndSection
Section "InputClass"
Identifier "keyboard-all"
Driver "evdev"
Option "XkbLayout" "de"
MatchIsKeyboard "on"
EndSection

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #3 from Massimo Burcheri  ---
Created attachment 208241
  --> https://bugzilla.kernel.org/attachment.cgi?id=208241=edit
dmesg

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

Massimo Burcheri  changed:

   What|Removed |Added

 Attachment #208241|0   |1
is obsolete||

--- Comment #4 from Massimo Burcheri  ---
Created attachment 208251
  --> https://bugzilla.kernel.org/attachment.cgi?id=208251=edit
dmesg

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #5 from Massimo Burcheri  ---
Created attachment 208261
  --> https://bugzilla.kernel.org/attachment.cgi?id=208261=edit
Xorg.log

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #6 from Alex Deucher  ---
Can you attach a copy if your vbios?

(as root)
(use lspci to get the bus id)
cd /sys/bus/pci/devices/
echo 1 > rom
cat rom > /tmp/vbios.rom
echo 0 > rom

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #7 from Massimo Burcheri  ---
Current workaround is using CONFIG_DRM_LOAD_EDID_FIRMWARE and the generic EDID
by kernel command:
drm_kms_helper.edid_firmware=edid/1920x1080.bin

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #8 from Massimo Burcheri  ---
Created attachment 208271
  --> https://bugzilla.kernel.org/attachment.cgi?id=208271=edit
vbios.rom

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #9 from Alex Deucher  ---
Created attachment 208281
  --> https://bugzilla.kernel.org/attachment.cgi?id=208281=edit
add debugging output

Can you attach your dmesg output with the attached debugging patch applied?

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #10 from Massimo Burcheri  ---
Created attachment 208291
  --> https://bugzilla.kernel.org/attachment.cgi?id=208291=edit
dmesg with debugging patch

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[PATCH 3/3] ARM: bcm2835: Add VC4 to the device tree.

[Eric Anholt]

Stephen Warren  writes:

> On 03/04/2016 01:32 PM, Eric Anholt wrote:
>> VC4 is the GPU (display and 3D) present on the 283x.
>
>> diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts 
>> b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
>
>> + {
>> +hpd-gpios = < 46 GPIO_ACTIVE_LOW>;
>> +};
>
> Isn't that the same everywhere? If so, adding it to bcm2835-rpi.dtsi 
> seems like a better idea; it'd avoid duplicating it everywhere.

It's not the same everywhere (_HIGH vs _LOW), which is why it's in the
individual files.
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[PATCH 3/3] ARM: bcm2835: Add VC4 to the device tree.

[Stephen Warren]

On 03/08/2016 11:04 AM, Eric Anholt wrote:
> Stephen Warren  writes:
>
>> On 03/04/2016 01:32 PM, Eric Anholt wrote:
>>> VC4 is the GPU (display and 3D) present on the 283x.
>>
>>> diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts 
>>> b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
>>
>>> + {
>>> +   hpd-gpios = < 46 GPIO_ACTIVE_LOW>;
>>> +};
>>
>> Isn't that the same everywhere? If so, adding it to bcm2835-rpi.dtsi
>> seems like a better idea; it'd avoid duplicating it everywhere.
>
> It's not the same everywhere (_HIGH vs _LOW), which is why it's in the
> individual files.

Oh right, it looks OK then. The series,
Acked-by: Stephen Warren 

One could reduce the duplication by moving the common block into the 
common .dtsi file, but using a board-defined #define for the polarity:

bcm2835-rpi-a-plus.dts:

#define RPI_HDMI_HPD_POLARITY
#include "bcm2835-rpi.dtsi"

bcm2835-rpi.dtsi:

 {
hpd-gpios = < 46 RPI_HDMI_HPD_POLARITY>;
};

... although this case is so tiny I'm not sure there's any benefit 
trying to unify it like that right now.

[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #11 from Alex Deucher  ---
Created attachment 208301
  --> https://bugzilla.kernel.org/attachment.cgi?id=208301=edit
possible fix 1/2

Odd. it looks like the 1920x1080 mode is getting added.  Do either of these
patches help?

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[Bug 114031] Radeon Kernel Mode Setting sets wrong mode on Acer Z5610

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=114031

--- Comment #12 from Alex Deucher  ---
Created attachment 208311
  --> https://bugzilla.kernel.org/attachment.cgi?id=208311=edit
possible fix 2/2

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[Bug 94445] Tonga llvm assert since RegisterCoalescer: Need to check DstReg+SrcReg for missing undef flags

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94445

Bug ID: 94445
   Summary: Tonga llvm assert since RegisterCoalescer: Need to
check DstReg+SrcReg for missing undef flags
   Product: Mesa
   Version: git
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/Gallium/radeonsi
  Assignee: dri-devel at lists.freedesktop.org
  Reporter: adf.lists at gmail.com
QA Contact: dri-devel at lists.freedesktop.org

R9285 since llvm commit 

commit 817178adc78bbd36ba635d3147cca53070558def
Author: Matthias Braun 
Date:   Sat Mar 5 04:36:10 2016 +

RegisterCoalescer: Need to check DstReg+SrcReg for missing undef flags

copy coalescing with enabled subregister liveness can reveal undef uses,
previously this was only checked for the SrcReg in updateRegDefsUses()
but we need to check DstReg as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk at 262767
91177308-0d34-0410-b5e6-96231b3b80d8

Unigine Valley will assert at start of rendering.

valley_x64: /mnt/sdb1/Gits/llvm/lib/CodeGen/MachineScheduler.cpp:1046: void
llvm::ScheduleDAGMILive::updatePressureDiffs(llvm::ArrayRef):
Assertion `VNI && "No live value at use."' failed.


Other demos don't trigger this.

Valley is running 1920x1080 fullscreen ultra quality + 8x AA.

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[Bug 113861] [radeon] Xorg fatal freeze upon startx

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113861

--- Comment #9 from centuryplague at yandex.com ---
(In reply to Alex Deucher from comment #7)
> Probably the same issue as reported here:
> https://lists.freedesktop.org/archives/dri-devel/2016-March/102379.html
> Does reverting dbb17a21c131eca94eb31136eee9a7fe5aff00d9 fix it?

Went a bit out my way to test this faster. I can now confirm reverting this
commit on a 4.4.4-based kernel (arch linux-grsec 4.4.4.201603032158-1-grsec)
allows startx to start again on my (non-standard) system. I don't know about
the other guy.

Thanks I will report on the arch bug. Will this be in 4.4.5?

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[Bug 113861] [radeon] Xorg fatal freeze upon startx

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113861

--- Comment #10 from centuryplague at yandex.com ---
The exact commit that was reverted is:
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=dbb17a21c131eca94eb31136eee9a7fe5aff00d9

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[Bug 113861] [radeon] Xorg fatal freeze upon startx

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=113861

--- Comment #11 from Alex Deucher  ---
Already reverted upstream:
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=256faedcfd646161477d47a1a78c32a562d2e845

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[pull] radeon and amdgpu drm-fixes-4.5

[Alex Deucher]

Hi Dave,

radeon and amdgpu fixes for 4.5. Three regression fixes and
some fixups for the error handling in the vblank regression fixes
from earlier.

The following changes since commit f0511e66114a6414cfca92d7b94118913a0c11ff:

  Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux 
into drm-fixes (2016-03-03 11:37:07 +1000)

are available in the git repository at:

  git://people.freedesktop.org/~agd5f/linux drm-fixes-4.5

for you to fetch changes up to d74e766e1916d0e09b86e4b5b9d0f819628fd546:

  Revert "drm/radeon/pm: adjust display configuration after powerstate" 
(2016-03-08 13:32:58 -0500)


Alex Deucher (3):
  drm/radeon/dp: add back special handling for NUTMEG
  drm/amdgpu/dp: add back special handling for NUTMEG
  Revert "drm/radeon/pm: adjust display configuration after powerstate"

Mario Kleiner (2):
  drm/amdgpu: Fix error handling in amdgpu_flip_work_func.
  drm/radeon: Fix error handling in radeon_flip_work_func.

 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/atombios_dp.c| 20 
 drivers/gpu/drm/radeon/atombios_dp.c| 20 
 drivers/gpu/drm/radeon/radeon_display.c |  4 ++--
 drivers/gpu/drm/radeon/radeon_pm.c  |  5 ++---
 5 files changed, 38 insertions(+), 15 deletions(-)

[Bug 92912] Full GPU lockups in TF2 - R600

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=92912

pluc-dev at the-pluc.net changed:

   What|Removed |Added

 Attachment #119583|0   |1
is obsolete||

--- Comment #3 from pluc-dev at the-pluc.net ---
Created attachment 122168
  --> https://bugs.freedesktop.org/attachment.cgi?id=122168=edit
journalctl

full journalctl

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[Bug 92912] Full GPU lockups in TF2 - R600

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=92912

--- Comment #4 from pluc-dev at the-pluc.net ---
Created attachment 122169
  --> https://bugs.freedesktop.org/attachment.cgi?id=122169=edit
apitrace (interleaved with steam output)

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[PATCH v6 0/6] Implement generic ASoC HDMI codec and use it in tda998x

[Jyri Sarha]

There is currently two other patch series[1][2] that depend on the
three first (ALSA-) patches of this series. It would be nice to get at
least those three applied sooner rather than later, so please tell me
if I can do anything to get those in.

BTW, I applied the relevant patches from the two series to on top of
this one. Obviously the two series conflicted with each other a bit and
also the IEC958 helper patch from [2] conflicted with the IEC958 patch
from my series (which is weird since Arnaud's series depends on my
series...). After resolving the conflicts everything compiled fine,
but for some reason neither the 'ELD' or IEC958 Playback Default'
appeared on my BBB. I'll try to find time to debug this further at
some point.

[1] http://mailman.alsa-project.org/pipermail/alsa-devel/2016-March/105509.html
[2] http://mailman.alsa-project.org/pipermail/alsa-devel/2016-March/105502.html

Changes since v5
 - Rebased on top of the latest drm-next branch
 - Allow 32 bit samplewidth in snd_pcm_create_iec958_consumer() and
   snd_pcm_create_iec958_consumer_hw_params()
 - Propose new simpler DT binding for tda998x audio
 - Squash tda998x audio DT binding together with hdmi-codec integration

Changes since RFC v4,
 - Rebased on top of the latest drm-next branch
 - Split the hdmi-codec abort functionality into a separate patch for
   better visibility of what it is all about
   - This does not affect the tda998x patches as the abort
 functionality is not used
 - Drop S18_3* formats from I2S_FORMATS and add a comment about formats
   not supported by HDMI

Changes since RFC v3,
 ASoC side:
 - Add "ALSA: pcm: add IEC958 channel status helper for hw_params"
 - Add "tda998x: Improve tda998x_configure_audio() audio related pdata"
 - use snd_pcm_create_iec958_consumer_hw_params() to construct the stream header
 - Remove set_clk() callback from hdmi-codec. It is not needed for now.
 - Refer to stream header in AIF as specified in HDMI standard
 - Set current_stream to NULL only after video side audio_shutdown() has
   been called. Avoid potential race if video side attempts to abort audio
   at the same time.
 - No need to have video side device pointer in the hdmi codec's pdata as
   it is found from dev->parent.
 - Fix hdmi-codec enum: DAI_ID_I2C > DAI_ID_I2S
 - Improve audio_startup API comment
 - Make improved checkpatch happy 
   - BUG_ON > WARN_ON
   - put */ ending the block comment to a separate line

 DRM side:
 - Fix tda998x get_eld() locking
 - Change tda998x audio parameters in pdata to more generic, that can
   be readily used in tda998x_audio_config()
 - Rename and restructure audio port related private data members to
   be more descriptive
 - Require audio configuration trough ASoC hdmi-codec if HDMI audio is
   configured trough DT binding. 

 DTS:
 - Increase McASP fifo usage form 1 to 32

Jyri Sarha (6):
  ALSA: pcm: add IEC958 channel status helper for hw_params
  ASoC: hdmi-codec: Add hdmi-codec for external HDMI-encoders
  ASoC: hdmi-codec: Add audio abort() callback for video side to use
  drm/i2c: tda998x: Improve tda998x_configure_audio() audio related
pdata
  drm/i2c: tda998x: Register ASoC hdmi-codec and add audio DT binding
  ARM: dts: am335x-boneblack: Add HDMI audio support

 .../devicetree/bindings/display/bridge/tda998x.txt |  18 +
 arch/arm/boot/dts/am335x-boneblack.dts |  71 +++-
 drivers/gpu/drm/i2c/Kconfig|   1 +
 drivers/gpu/drm/i2c/tda998x_drv.c  | 271 --
 include/drm/i2c/tda998x.h  |  24 +-
 include/dt-bindings/display/tda998x.h  |   7 +
 include/sound/hdmi-codec.h | 104 ++
 include/sound/pcm_iec958.h |   2 +
 sound/core/pcm_iec958.c|  53 ++-
 sound/soc/codecs/Kconfig   |   6 +
 sound/soc/codecs/Makefile  |   2 +
 sound/soc/codecs/hdmi-codec.c  | 411 +
 12 files changed, 898 insertions(+), 72 deletions(-)
 create mode 100644 include/dt-bindings/display/tda998x.h
 create mode 100644 include/sound/hdmi-codec.h
 create mode 100644 sound/soc/codecs/hdmi-codec.c

-- 
1.9.1

[PATCH v6 3/6] ASoC: hdmi-codec: Add audio abort() callback for video side to use

[Jyri Sarha]

Add audio abort() callback, that is provided at audio stream start,
for video side. This is for video side to use in case there is a
pressing need to tear down the audio playback for some reason.

Signed-off-by: Jyri Sarha 
---
 include/sound/hdmi-codec.h|  8 ++--
 sound/soc/codecs/hdmi-codec.c | 20 +++-
 2 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/include/sound/hdmi-codec.h b/include/sound/hdmi-codec.h
index fc3a481..15fe70f 100644
--- a/include/sound/hdmi-codec.h
+++ b/include/sound/hdmi-codec.h
@@ -55,10 +55,14 @@ struct hdmi_codec_params {

 struct hdmi_codec_ops {
/*
-* Called when ASoC starts an audio stream setup.
+* Called when ASoC starts an audio stream setup. The call
+* provides an audio abort callback for stoping an ongoing
+* stream from video side driver if the HDMI audio becomes
+* unavailable.
 * Optional
 */
-   int (*audio_startup)(struct device *dev);
+   int (*audio_startup)(struct device *dev,
+void (*abort_cb)(struct device *dev));

/*
 * Configures HDMI-encoder for audio stream.
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
index bc47b9a..cc08097 100644
--- a/sound/soc/codecs/hdmi-codec.c
+++ b/sound/soc/codecs/hdmi-codec.c
@@ -47,6 +47,23 @@ enum {
DAI_ID_SPDIF,
 };

+static void hdmi_codec_abort(struct device *dev)
+{
+   struct hdmi_codec_priv *hcp = dev_get_drvdata(dev);
+
+   dev_dbg(dev, "%s()\n", __func__);
+
+   mutex_lock(>current_stream_lock);
+   if (hcp->current_stream && hcp->current_stream->runtime &&
+   snd_pcm_running(hcp->current_stream)) {
+   dev_info(dev, "HDMI audio playback aborted\n");
+   snd_pcm_stream_lock_irq(hcp->current_stream);
+   snd_pcm_stop(hcp->current_stream, SNDRV_PCM_STATE_DISCONNECTED);
+   snd_pcm_stream_unlock_irq(hcp->current_stream);
+   }
+   mutex_unlock(>current_stream_lock);
+}
+
 static int hdmi_codec_new_stream(struct snd_pcm_substream *substream,
 struct snd_soc_dai *dai)
 {
@@ -78,7 +95,8 @@ static int hdmi_codec_startup(struct snd_pcm_substream 
*substream,
return ret;

if (hcp->hcd.ops->audio_startup) {
-   ret = hcp->hcd.ops->audio_startup(dai->dev->parent);
+   ret = hcp->hcd.ops->audio_startup(dai->dev->parent,
+ hdmi_codec_abort);
if (ret) {
mutex_lock(>current_stream_lock);
hcp->current_stream = NULL;
-- 
1.9.1

[PATCH v6 1/6] ALSA: pcm: add IEC958 channel status helper for hw_params

[Jyri Sarha]

Add IEC958 channel status helper that gets the audio properties from
snd_pcm_hw_params instead of snd_pcm_runtime. This is needed to
produce the channel status bits already in audio stream configuration
phase.

Signed-off-by: Jyri Sarha 
---
 include/sound/pcm_iec958.h |  2 ++
 sound/core/pcm_iec958.c| 53 +++---
 2 files changed, 38 insertions(+), 17 deletions(-)

diff --git a/include/sound/pcm_iec958.h b/include/sound/pcm_iec958.h
index 0eed397..36f023a 100644
--- a/include/sound/pcm_iec958.h
+++ b/include/sound/pcm_iec958.h
@@ -6,4 +6,6 @@
 int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs,
size_t len);

+int snd_pcm_create_iec958_consumer_hw_params(struct snd_pcm_hw_params *params,
+u8 *cs, size_t len);
 #endif
diff --git a/sound/core/pcm_iec958.c b/sound/core/pcm_iec958.c
index 36b2d7a..27e0981 100644
--- a/sound/core/pcm_iec958.c
+++ b/sound/core/pcm_iec958.c
@@ -9,30 +9,18 @@
 #include 
 #include 
 #include 
+#include 
 #include 

-/**
- * snd_pcm_create_iec958_consumer - create consumer format IEC958 channel 
status
- * @runtime: pcm runtime structure with ->rate filled in
- * @cs: channel status buffer, at least four bytes
- * @len: length of channel status buffer
- *
- * Create the consumer format channel status data in @cs of maximum size
- * @len corresponding to the parameters of the PCM runtime @runtime.
- *
- * Drivers may wish to tweak the contents of the buffer after creation.
- *
- * Returns: length of buffer, or negative error code if something failed.
- */
-int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs,
-   size_t len)
+static int create_iec958_consumer(uint rate, uint sample_width,
+ u8 *cs, size_t len)
 {
unsigned int fs, ws;

if (len < 4)
return -EINVAL;

-   switch (runtime->rate) {
+   switch (rate) {
case 32000:
fs = IEC958_AES3_CON_FS_32000;
break;
@@ -59,7 +47,7 @@ int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime 
*runtime, u8 *cs,
}

if (len > 4) {
-   switch (snd_pcm_format_width(runtime->format)) {
+   switch (sample_width) {
case 16:
ws = IEC958_AES4_CON_WORDLEN_20_16;
break;
@@ -71,6 +59,7 @@ int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime 
*runtime, u8 *cs,
 IEC958_AES4_CON_MAX_WORDLEN_24;
break;
case 24:
+   case 32: /* Assume 24-bit width for 32-bit samples. */
ws = IEC958_AES4_CON_WORDLEN_24_20 |
 IEC958_AES4_CON_MAX_WORDLEN_24;
break;
@@ -92,4 +81,34 @@ int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime 
*runtime, u8 *cs,

return len;
 }
+
+/**
+ * snd_pcm_create_iec958_consumer - create consumer format IEC958 channel 
status
+ * @runtime: pcm runtime structure with ->rate filled in
+ * @cs: channel status buffer, at least four bytes
+ * @len: length of channel status buffer
+ *
+ * Create the consumer format channel status data in @cs of maximum size
+ * @len corresponding to the parameters of the PCM runtime @runtime.
+ *
+ * Drivers may wish to tweak the contents of the buffer after creation.
+ *
+ * Returns: length of buffer, or negative error code if something failed.
+ */
+int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs,
+   size_t len)
+{
+   return create_iec958_consumer(runtime->rate,
+ snd_pcm_format_width(runtime->format),
+ cs, len);
+}
 EXPORT_SYMBOL(snd_pcm_create_iec958_consumer);
+
+
+int snd_pcm_create_iec958_consumer_hw_params(struct snd_pcm_hw_params *params,
+u8 *cs, size_t len)
+{
+   return create_iec958_consumer(params_rate(params), params_width(params),
+ cs, len);
+}
+EXPORT_SYMBOL(snd_pcm_create_iec958_consumer_hw_params);
-- 
1.9.1

[PATCH v6 2/6] ASoC: hdmi-codec: Add hdmi-codec for external HDMI-encoders

[Jyri Sarha]

The hdmi-codec is a platform device driver to be registered from
drivers of external HDMI encoders with I2S and/or spdif interface. The
driver in turn registers an ASoC codec for the HDMI encoder's audio
functionality.

The structures and definitions in the API header are mostly redundant
copies of similar structures in ASoC headers. This is on purpose to
avoid direct dependencies to ASoC structures in video side driver.

Signed-off-by: Jyri Sarha 
---
 include/sound/hdmi-codec.h| 100 +++
 sound/soc/codecs/Kconfig  |   6 +
 sound/soc/codecs/Makefile |   2 +
 sound/soc/codecs/hdmi-codec.c | 393 ++
 4 files changed, 501 insertions(+)
 create mode 100644 include/sound/hdmi-codec.h
 create mode 100644 sound/soc/codecs/hdmi-codec.c

diff --git a/include/sound/hdmi-codec.h b/include/sound/hdmi-codec.h
new file mode 100644
index 000..fc3a481
--- /dev/null
+++ b/include/sound/hdmi-codec.h
@@ -0,0 +1,100 @@
+/*
+ * hdmi-codec.h - HDMI Codec driver API
+ *
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Jyri Sarha 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef __HDMI_CODEC_H__
+#define __HDMI_CODEC_H__
+
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * Protocol between ASoC cpu-dai and HDMI-encoder
+ */
+struct hdmi_codec_daifmt {
+   enum {
+   HDMI_I2S,
+   HDMI_RIGHT_J,
+   HDMI_LEFT_J,
+   HDMI_DSP_A,
+   HDMI_DSP_B,
+   HDMI_AC97,
+   HDMI_SPDIF,
+   } fmt;
+   int bit_clk_inv:1;
+   int frame_clk_inv:1;
+   int bit_clk_master:1;
+   int frame_clk_master:1;
+};
+
+/*
+ * HDMI audio parameters
+ */
+struct hdmi_codec_params {
+   struct hdmi_audio_infoframe cea;
+   struct snd_aes_iec958 iec;
+   int sample_rate;
+   int sample_width;
+   int channels;
+};
+
+struct hdmi_codec_ops {
+   /*
+* Called when ASoC starts an audio stream setup.
+* Optional
+*/
+   int (*audio_startup)(struct device *dev);
+
+   /*
+* Configures HDMI-encoder for audio stream.
+* Mandatory
+*/
+   int (*hw_params)(struct device *dev,
+struct hdmi_codec_daifmt *fmt,
+struct hdmi_codec_params *hparms);
+
+   /*
+* Shuts down the audio stream.
+* Mandatory
+*/
+   void (*audio_shutdown)(struct device *dev);
+
+   /*
+* Mute/unmute HDMI audio stream.
+* Optional
+*/
+   int (*digital_mute)(struct device *dev, bool enable);
+
+   /*
+* Provides EDID-Like-Data from connected HDMI device.
+* Optional
+*/
+   int (*get_eld)(struct device *dev, uint8_t *buf, size_t len);
+};
+
+/* HDMI codec initalization data */
+struct hdmi_codec_pdata {
+   const struct hdmi_codec_ops *ops;
+   uint i2s:1;
+   uint spdif:1;
+   int max_i2s_channels;
+};
+
+#define HDMI_CODEC_DRV_NAME "hdmi-audio-codec"
+
+#endif /* __HDMI_CODEC_H__ */
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 50693c8..62b62fe 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -86,6 +86,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_MC13783 if MFD_MC13XXX
select SND_SOC_ML26124 if I2C
select SND_SOC_NAU8825 if I2C
+   select SND_SOC_HDMI_CODEC
select SND_SOC_PCM1681 if I2C
select SND_SOC_PCM179X if SPI_MASTER
select SND_SOC_PCM3008
@@ -473,6 +474,11 @@ config SND_SOC_BT_SCO
 config SND_SOC_DMIC
tristate

+config SND_SOC_HDMI_CODEC
+   tristate
+   select SND_PCM_ELD
+   select SND_PCM_IEC958
+
 config SND_SOC_ES8328
tristate "Everest Semi ES8328 CODEC"

diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index d44f7d3..5f7b002 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -79,6 +79,7 @@ snd-soc-max9850-objs := max9850.o
 snd-soc-mc13783-objs := mc13783.o
 snd-soc-ml26124-objs := ml26124.o
 snd-soc-nau8825-objs := nau8825.o
+snd-soc-hdmi-codec-objs := hdmi-codec.o
 snd-soc-pcm1681-objs := pcm1681.o
 snd-soc-pcm179x-codec-objs := pcm179x.o
 snd-soc-pcm3008-objs := pcm3008.o
@@ -283,6 +284,7 @@ obj-$(CONFIG_SND_SOC_MAX9850)   += snd-soc-max9850.o
 obj-$(CONFIG_SND_SOC_MC13783)  += snd-soc-mc13783.o
 obj-$(CONFIG_SND_SOC_ML26124)  += snd-soc-ml26124.o
 obj-$(CONFIG_SND_SOC_NAU8825)   += snd-soc-nau8825.o
+obj-$(CONFIG_SND_SOC_HDMI_CODEC)   += 

[PATCH v6 5/6] drm/i2c: tda998x: Register ASoC hdmi-codec and add audio DT binding

[Jyri Sarha]

Register ASoC HDMI codec for audio functionality and adds device tree
binding for audio configuration.

With the registered HDMI codec the tda998x node can be used like a
regular codec node in ASoC card configurations. HDMI audio info-frame
and audio stream header is generated by the ASoC HDMI codec. The codec
also applies constraints for available sample-rates based on Edid Like
Data from the display. The device tree binding document has been
updated [1].

Part of this patch has been inspired by Jean Francoise's "drm/i2c: tda998x:
Add support of a DT graph of ports"-patch [2]. There may still be some
identical lines left from the original patch and some of the ideas
have come from there.

[1] Documentation/devicetree/bindings/display/bridge/tda998x.txt
[2] http://mailman.alsa-project.org/pipermail/alsa-devel/2015-July/095255.html

Signed-off-by: Jyri Sarha 
---
 .../devicetree/bindings/display/bridge/tda998x.txt |  18 ++
 drivers/gpu/drm/i2c/Kconfig|   1 +
 drivers/gpu/drm/i2c/tda998x_drv.c  | 194 -
 include/drm/i2c/tda998x.h  |   4 +-
 include/dt-bindings/display/tda998x.h  |   7 +
 5 files changed, 219 insertions(+), 5 deletions(-)
 create mode 100644 include/dt-bindings/display/tda998x.h

diff --git a/Documentation/devicetree/bindings/display/bridge/tda998x.txt 
b/Documentation/devicetree/bindings/display/bridge/tda998x.txt
index e178e6b..816f6b5 100644
--- a/Documentation/devicetree/bindings/display/bridge/tda998x.txt
+++ b/Documentation/devicetree/bindings/display/bridge/tda998x.txt
@@ -21,8 +21,19 @@ Optional properties:
   - video-ports: 24 bits value which defines how the video controller
output is wired to the TDA998x input - default: <0x230145>

+  - audio-ports: array of 8-bit values, 2 values per one DAI[1]. 
+   The first value defines the DAI type: TDA998x_SPDIF or TDA998x_I2S[2].
+   The second value defines the tda998x AP_ENA reg content when the DAI
+   in question is used. The implementation allows one or two DAIs. If two
+   DAIs are defined, they must be of different type.
+
+[1] Documentation/sound/alsa/soc/DAI.txt
+[2] include/dt-bindings/display/tda998x.h
+
 Example:

+#include 
+
tda998x: hdmi-encoder {
compatible = "nxp,tda998x";
reg = <0x70>;
@@ -30,4 +41,11 @@ Example:
interrupts = <27 2>;/* falling edge */
pinctrl-0 = <_camera>;
pinctrl-names = "default";
+   video-ports = <0x230145>;
+
+   #sound-dai-cells = <2>;
+/* DAI-format  AP_ENA reg value */
+   audio-ports = < TDA998x_SPDIF   0x04
+   TDA998x_I2S 0x03>;
+
};
diff --git a/drivers/gpu/drm/i2c/Kconfig b/drivers/gpu/drm/i2c/Kconfig
index 22c7ed6..088f278 100644
--- a/drivers/gpu/drm/i2c/Kconfig
+++ b/drivers/gpu/drm/i2c/Kconfig
@@ -28,6 +28,7 @@ config DRM_I2C_SIL164
 config DRM_I2C_NXP_TDA998X
tristate "NXP Semiconductors TDA998X HDMI encoder"
default m if DRM_TILCDC
+   select SND_SOC_HDMI_CODEC if SND_SOC
help
  Support for NXP Semiconductors TDA998X HDMI encoders.

diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c 
b/drivers/gpu/drm/i2c/tda998x_drv.c
index 206df0b..d5733436 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 
 #include 
@@ -30,6 +31,11 @@

 #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)

+struct tda998x_audio_port {
+   u8 format;  /* AFMT_xxx */
+   u8 config;  /* AP value */
+};
+
 struct tda998x_priv {
struct i2c_client *cec;
struct i2c_client *hdmi;
@@ -43,6 +49,8 @@ struct tda998x_priv {
u8 vip_cntrl_2;
struct tda998x_audio_params audio_params;

+   struct platform_device *audio_pdev;
+
wait_queue_head_t wq_edid;
volatile int wq_edid_wait;

@@ -53,6 +61,8 @@ struct tda998x_priv {

struct drm_encoder encoder;
struct drm_connector connector;
+
+   struct tda998x_audio_port audio_port[2];
 };

 #define conn_to_tda998x_priv(x) \
@@ -743,7 +753,7 @@ tda998x_configure_audio(struct tda998x_priv *priv,
break;

default:
-   BUG();
+   dev_err(>hdmi->dev, "Unsupported I2S format\n");
return -EINVAL;
}

@@ -1160,6 +1170,8 @@ static int tda998x_connector_get_modes(struct 
drm_connector *connector)
drm_mode_connector_update_edid_property(connector, edid);
n = drm_add_edid_modes(connector, edid);
priv->is_hdmi_sink = drm_detect_hdmi_monitor(edid);
+   drm_edid_to_eld(connector, edid);
+
kfree(edid);

return n;
@@ -1181,6 +1193,9 @@ static void tda998x_destroy(struct tda998x_priv *priv)
cec_write(priv, 

[PATCH v6 6/6] ARM: dts: am335x-boneblack: Add HDMI audio support

[Jyri Sarha]

Add HDMI audio support. Adds mcasp0_pins, clk_mcasp0_fixed,
clk_mcasp0, mcasp0, sound node, and updates the tda19988 node to
follow the new binding.

Signed-off-by: Jyri Sarha 
---
 arch/arm/boot/dts/am335x-boneblack.dts | 71 --
 1 file changed, 67 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/am335x-boneblack.dts 
b/arch/arm/boot/dts/am335x-boneblack.dts
index 55c0e95..2bae4d1 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -9,6 +9,7 @@

 #include "am33xx.dtsi"
 #include "am335x-bone-common.dtsi"
+#include 

 / {
model = "TI AM335x BeagleBone Black";
@@ -64,6 +65,16 @@
AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
/* xdma_event_intr0 */
>;
};
+
+   mcasp0_pins: mcasp0_pins {
+   pinctrl-single,pins = <
+   AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* 
mcasp0_ahcklx.mcasp0_ahclkx */
+   AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* 
mcasp0_ahclkr.mcasp0_axr2*/
+   AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) /* 
mcasp0_fsx.mcasp0_fsx */
+   AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* 
mcasp0_aclkx.mcasp0_aclkx */
+   AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* 
gpmc_a11.GPIO1_27 */
+   >;
+   };
 };

  {
@@ -76,16 +87,22 @@
 };

  {
-   tda19988 {
+   tda19988: tda19988 {
compatible = "nxp,tda998x";
reg = <0x70>;
+
pinctrl-names = "default", "off";
pinctrl-0 = <_hdmi_bonelt_pins>;
pinctrl-1 = <_hdmi_bonelt_off_pins>;

-   port {
-   hdmi_0: endpoint at 0 {
-   remote-endpoint = <_0>;
+   #sound-dai-cells = <0>;
+   audio-ports = < AFMT_I2S0x03>;
+
+   ports {
+   port at 0 {
+   hdmi_0: endpoint at 0 {
+   remote-endpoint = <_0>;
+   };
};
};
};
@@ -94,3 +111,49 @@
  {
system-power-controller;
 };
+
+{
+   #sound-dai-cells = <0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "okay";
+   op-mode = <0>;  /* MCASP_IIS_MODE */
+   tdm-slots = <2>;
+   serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
+   0 0 1 0
+   >;
+   tx-num-evt = <32>;
+   rx-num-evt = <32>;
+};
+
+/ {
+   clk_mcasp0_fixed: clk_mcasp0_fixed {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <24576000>;
+   };
+
+   clk_mcasp0: clk_mcasp0 {
+   #clock-cells = <0>;
+   compatible = "gpio-gate-clock";
+   clocks = <_mcasp0_fixed>;
+   enable-gpios = < 27 0>; /* BeagleBone Black Clk enable on 
GPIO1_27 */
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,name = "TI BeagleBone Black";
+   simple-audio-card,format = "i2s";
+   simple-audio-card,bitclock-master = <_master>;
+   simple-audio-card,frame-master = <_master>;
+
+   dailink0_master: simple-audio-card,cpu {
+   sound-dai = <>;
+   clocks = <_mcasp0>;
+   };
+
+   simple-audio-card,codec {
+   sound-dai = <>;
+   };
+   };
+};
-- 
1.9.1

[PATCH v6 4/6] drm/i2c: tda998x: Improve tda998x_configure_audio() audio related pdata

[Jyri Sarha]

Define struct tda998x_audio_params in include/drm/i2c/tda998x.h and
use it in pdata and for tda998x_configure_audio() parameters. Also
updates tda998x_write_aif() to take struct hdmi_audio_infoframe *
directly as a parameter.

Signed-off-by: Jyri Sarha 
---
 drivers/gpu/drm/i2c/tda998x_drv.c | 77 ---
 include/drm/i2c/tda998x.h | 24 +++-
 2 files changed, 53 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c 
b/drivers/gpu/drm/i2c/tda998x_drv.c
index b61282d..206df0b 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -41,7 +41,7 @@ struct tda998x_priv {
u8 vip_cntrl_0;
u8 vip_cntrl_1;
u8 vip_cntrl_2;
-   struct tda998x_encoder_params params;
+   struct tda998x_audio_params audio_params;

wait_queue_head_t wq_edid;
volatile int wq_edid_wait;
@@ -666,26 +666,16 @@ tda998x_write_if(struct tda998x_priv *priv, u8 bit, u16 
addr,
reg_set(priv, REG_DIP_IF_FLAGS, bit);
 }

-static void
-tda998x_write_aif(struct tda998x_priv *priv, struct tda998x_encoder_params *p)
+static int tda998x_write_aif(struct tda998x_priv *priv,
+struct hdmi_audio_infoframe *cea)
 {
union hdmi_infoframe frame;

-   hdmi_audio_infoframe_init();
-
-   frame.audio.channels = p->audio_frame[1] & 0x07;
-   frame.audio.channel_allocation = p->audio_frame[4];
-   frame.audio.level_shift_value = (p->audio_frame[5] & 0x78) >> 3;
-   frame.audio.downmix_inhibit = (p->audio_frame[5] & 0x80) >> 7;
-
-   /*
-* L-PCM and IEC61937 compressed audio shall always set sample
-* frequency to "refer to stream".  For others, see the HDMI
-* specification.
-*/
-   frame.audio.sample_frequency = (p->audio_frame[2] & 0x1c) >> 2;
+   frame.audio = *cea;

tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, );
+
+   return 0;
 }

 static void
@@ -710,20 +700,21 @@ static void tda998x_audio_mute(struct tda998x_priv *priv, 
bool on)
}
 }

-static void
+static int
 tda998x_configure_audio(struct tda998x_priv *priv,
-   struct drm_display_mode *mode, struct tda998x_encoder_params *p)
+   struct tda998x_audio_params *params,
+   unsigned mode_clock)
 {
u8 buf[6], clksel_aip, clksel_fs, cts_n, adiv;
u32 n;

/* Enable audio ports */
-   reg_write(priv, REG_ENA_AP, p->audio_cfg);
-   reg_write(priv, REG_ENA_ACLK, p->audio_clk_cfg);
+   reg_write(priv, REG_ENA_AP, params->config);

/* Set audio input source */
-   switch (p->audio_format) {
+   switch (params->format) {
case AFMT_SPDIF:
+   reg_write(priv, REG_ENA_ACLK, 0);
reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_SPDIF);
clksel_aip = AIP_CLKSEL_AIP_SPDIF;
clksel_fs = AIP_CLKSEL_FS_FS64SPDIF;
@@ -731,15 +722,29 @@ tda998x_configure_audio(struct tda998x_priv *priv,
break;

case AFMT_I2S:
+   reg_write(priv, REG_ENA_ACLK, 1);
reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_I2S);
clksel_aip = AIP_CLKSEL_AIP_I2S;
clksel_fs = AIP_CLKSEL_FS_ACLK;
-   cts_n = CTS_N_M(3) | CTS_N_K(3);
+   switch (params->sample_width) {
+   case 16:
+   cts_n = CTS_N_M(3) | CTS_N_K(1);
+   break;
+   case 18:
+   case 20:
+   case 24:
+   cts_n = CTS_N_M(3) | CTS_N_K(2);
+   break;
+   default:
+   case 32:
+   cts_n = CTS_N_M(3) | CTS_N_K(3);
+   break;
+   }
break;

default:
BUG();
-   return;
+   return -EINVAL;
}

reg_write(priv, REG_AIP_CLKSEL, clksel_aip);
@@ -755,11 +760,11 @@ tda998x_configure_audio(struct tda998x_priv *priv,
 * assume 100MHz requires larger divider.
 */
adiv = AUDIO_DIV_SERCLK_8;
-   if (mode->clock > 10)
+   if (mode_clock > 10)
adiv++; /* AUDIO_DIV_SERCLK_16 */

/* S/PDIF asks for a larger divider */
-   if (p->audio_format == AFMT_SPDIF)
+   if (params->format == AFMT_SPDIF)
adiv++; /* AUDIO_DIV_SERCLK_16 or _32 */

reg_write(priv, REG_AUDIO_DIV, adiv);
@@ -768,7 +773,7 @@ tda998x_configure_audio(struct tda998x_priv *priv,
 * This is the approximate value of N, which happens to be
 * the recommended values for non-coherent clocks.
 */
-   n = 128 * p->audio_sample_rate / 1000;
+   n = 128 * params->sample_rate / 1000;

/* Write the CTS and N values */
buf[0] = 0x44;
@@ -787,19 +792,13 @@ 

[Bug 92912] Full GPU lockups in TF2 - R600

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=92912

--- Comment #5 from pluc-dev at the-pluc.net ---
(Sorry didn't see I could have comment when adding the attachments)

I think I have the same issue :

Random lockup while playing TF2, not at a particular moment, but very often
(take less than ~5 minutes of game).

* screen freezes / sound loops
* then black screen or artifacts
* then either X restart or complete freeze

Kernel: 4.4.3-1-ARCH x86_64 (64 bit gcc: 5.3.0)
Desktop: MATE 1.12.1 (Gtk 3.18.8)
Distro: Arch Linux
Mobo: ASRock model: Z77 Extreme4
CPU: Quad core Intel Core i5-3570K (-MCP-) cache: 6144 KB
GPU: Advanced Micro Devices [AMD/ATI] Tahiti XT [Radeon HD 7970/8970 OEM / R9
280X] bus-ID: 01:00.0
Display Server: X.org 1.18.1 driver: radeon
mesa 11.1.2-1
libdrm 2.4.67-1
xf86-video-ati 1:7.6.1-1

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[Bug 60879] [radeonsi] X11 can't start with acceleration enabled

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=60879

--- Comment #134 from Marek Olšák  ---
(In reply to madmalkav from comment #131)
> (In reply to John Bridgman from comment #130)
> > madmalkav, your dmesg log had messages from the fglrx kernel driver... not
> > saying that *is* your problem but it definitely can't help... any chance you
> > can test on a vanilla system that hasn't had fglrx installed ?
> > 
> > [9.614226] <6>[fglrx] Maximum main memory to use for locked dma buffers:
> > 7714 MBytes.
> > [9.614510] <6>[fglrx]   vendor: 1002 device: 679e revision: 0 count: 1
> > [9.615005] <6>[fglrx] ioport: bar 4, base 0xe000, size: 0x100
> > [9.615248] <6>[fglrx] Kernel PAT support is enabled
> > [9.615263] <6>[fglrx] module loaded - fglrx 15.20.3 [Sep  8 2015] with 1
> > minors
> 
> I can't at the moment as I need this computer for working. I can tell you
> the system had problems with OSS driver since minute 1, i.e. I had to use
> the option to use a kernel with propietary drivers in order to manage to
> install Linux in this machine.

You should at least set modprobe.blacklist=fglrx on the kernel command line.

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[PATCH 8/8] drm: atmel-hlcdc: check display mode validity in crtc->mode_fixup()

[Nicolas Ferre]

Le 06/01/2016 11:19, Boris Brezillon a écrit :
> Move the adjusted display mode check into ->mode_fixup().
> 
> Signed-off-by: Boris Brezillon 

Seems okay:
Acked-by: Nicolas Ferre 


> ---
>  drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 10 --
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c 
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> index be30bd2..d5a028f 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> @@ -142,11 +142,13 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct 
> drm_crtc *c)
>  cfg);
>  }
>  
> -static bool atmel_hlcdc_crtc_mode_fixup(struct drm_crtc *crtc,
> +static bool atmel_hlcdc_crtc_mode_fixup(struct drm_crtc *c,
>   const struct drm_display_mode *mode,
>   struct drm_display_mode *adjusted_mode)
>  {
> - return true;
> + struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
> +
> + return atmel_hlcdc_dc_mode_valid(crtc->dc, adjusted_mode) == MODE_OK;
>  }
>  
>  static void atmel_hlcdc_crtc_disable(struct drm_crtc *c)
> @@ -311,12 +313,8 @@ static int atmel_hlcdc_crtc_select_output_mode(struct 
> drm_crtc_state *state)
>  static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c,
>struct drm_crtc_state *s)
>  {
> - struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
>   int ret;
>  
> - if (atmel_hlcdc_dc_mode_valid(crtc->dc, >adjusted_mode) != MODE_OK)
> - return -EINVAL;
> -
>   ret = atmel_hlcdc_crtc_select_output_mode(s);
>   if (ret)
>   return ret;
> 


-- 
Nicolas Ferre

[PATCH 17/23] drm: omapdrm: panel-dsi-cm: add regulator support

[Sebastian Reichel]

The N950's display requires two regulators.

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 57 +++--
 1 file changed, 53 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index 3414c2609320..768e92d1ec8b 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 
 #include 
@@ -60,6 +61,9 @@ struct panel_drv_data {
int reset_gpio;
int ext_te_gpio;

+   struct regulator *vpnl;
+   struct regulator *vddi;
+
bool use_dsi_backlight;

struct omap_dsi_pin_config pin_config;
@@ -597,25 +601,43 @@ static int dsicm_power_on(struct panel_drv_data *ddata)
.lp_clk_max = 1000,
};

+   if (ddata->vpnl) {
+   r = regulator_enable(ddata->vpnl);
+   if (r) {
+   dev_err(>pdev->dev,
+   "failed to enable VPNL: %d\n", r);
+   goto err0;
+   }
+   }
+
+   if (ddata->vddi) {
+   r = regulator_enable(ddata->vddi);
+   if (r) {
+   dev_err(>pdev->dev,
+   "failed to enable VDDI: %d\n", r);
+   goto err1;
+   }
+   }
+
if (ddata->pin_config.num_pins > 0) {
r = in->ops.dsi->configure_pins(in, >pin_config);
if (r) {
dev_err(>pdev->dev,
"failed to configure DSI pins\n");
-   goto err0;
+   goto err2;
}
}

r = in->ops.dsi->set_config(in, _config);
if (r) {
dev_err(>pdev->dev, "failed to configure DSI\n");
-   goto err0;
+   goto err2;
}

r = in->ops.dsi->enable(in);
if (r) {
dev_err(>pdev->dev, "failed to enable DSI\n");
-   goto err0;
+   goto err2;
}

dsicm_hw_reset(ddata);
@@ -673,6 +695,12 @@ err:
dsicm_hw_reset(ddata);

in->ops.dsi->disable(in, true, false);
+err2:
+   if (ddata->vddi)
+   regulator_disable(ddata->vddi);
+err1:
+   if (ddata->vpnl)
+   regulator_disable(ddata->vpnl);
 err0:
return r;
 }
@@ -696,6 +724,11 @@ static void dsicm_power_off(struct panel_drv_data *ddata)

in->ops.dsi->disable(in, true, false);

+   if (ddata->vddi)
+   regulator_disable(ddata->vddi);
+   if (ddata->vpnl)
+   regulator_disable(ddata->vpnl);
+
ddata->enabled = 0;
 }

@@ -1166,7 +1199,7 @@ static int dsicm_probe_of(struct platform_device *pdev)
struct device_node *node = pdev->dev.of_node;
struct panel_drv_data *ddata = platform_get_drvdata(pdev);
struct omap_dss_device *in;
-   int gpio;
+   int gpio, err;

gpio = of_get_named_gpio(node, "reset-gpios", 0);
if (!gpio_is_valid(gpio)) {
@@ -1189,6 +1222,22 @@ static int dsicm_probe_of(struct platform_device *pdev)
return PTR_ERR(in);
}

+   ddata->vpnl = devm_regulator_get_optional(>dev, "vpnl");
+   if (IS_ERR(ddata->vpnl)) {
+   err = PTR_ERR(ddata->vpnl);
+   if (err == -EPROBE_DEFER)
+   return err;
+   ddata->vpnl = NULL;
+   }
+
+   ddata->vddi = devm_regulator_get_optional(>dev, "vddi");
+   if (IS_ERR(ddata->vddi)) {
+   err = PTR_ERR(ddata->vddi);
+   if (err == -EPROBE_DEFER)
+   return err;
+   ddata->vddi = NULL;
+   }
+
ddata->in = in;

/* TODO: ulps, backlight */
-- 
2.7.0

[PATCH 11/23] include: video: omapdss: provide fifo threshold methods

[Sebastian Reichel]

The FIFO thresholds must be configured by omapdrm for
manually updated DSI panels due to a hardware bug.

Signed-off-By: Sebastian Reichel 
---
 include/video/omapdss.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 9bde65b79220..f6cdd809ae5c 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -935,6 +935,12 @@ int dispc_ovl_setup(enum omap_plane plane, const struct 
omap_overlay_info *oi,
bool replication, const struct omap_video_timings *mgr_timings,
bool mem_to_mem);

+void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
+   u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
+   bool manual_update);
+void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
+
+
 int omapdss_compat_init(void);
 void omapdss_compat_uninit(void);

-- 
2.7.0

[PATCH 18/23] drm: omapdrm: panel-dsi-cm: use threaded irq handler

[Sebastian Reichel]

Use threaded irq handler for the tearing effect gpio,
since it updates the display content, which requires
too much time for a fastpath irq.

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index 768e92d1ec8b..8316b6c2d8aa 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -1317,9 +1317,9 @@ static int dsicm_probe(struct platform_device *pdev)
return r;
}

-   r = devm_request_irq(dev, gpio_to_irq(ddata->ext_te_gpio),
-   dsicm_te_isr,
-   IRQF_TRIGGER_RISING,
+   r = devm_request_threaded_irq(dev, 
gpio_to_irq(ddata->ext_te_gpio),
+   NULL, dsicm_te_isr,
+   IRQF_TRIGGER_RISING | IRQF_ONESHOT,
"taal vsync", ddata);

if (r) {
-- 
2.7.0

[PATCH 14/23] drm: omapdrm: crtc: save framedone callback from dss

[Sebastian Reichel]

Save the framedone callback supplied by dss for later
usage.

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/omap_crtc.c | 24 
 1 file changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c 
b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 094e89a2fa94..3ce7143e5a5f 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -57,6 +57,9 @@ struct omap_crtc {

unsigned long state;
wait_queue_head_t pending_wait;
+
+   void (*framedone_handler)(void *);
+   void *framedone_handler_data;
 };

 /* 
-
@@ -263,6 +266,17 @@ static int omap_crtc_dss_register_framedone(
struct omap_overlay_manager *mgr,
void (*handler)(void *), void *data)
 {
+   struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
+   struct drm_device *dev = omap_crtc->base.dev;
+
+   if (omap_crtc->framedone_handler)
+   return -EBUSY;
+
+   dev_dbg(dev->dev, "register framedone %s", omap_crtc->name);
+
+   omap_crtc->framedone_handler = handler;
+   omap_crtc->framedone_handler_data = data;
+
return 0;
 }

@@ -270,6 +284,16 @@ static void omap_crtc_dss_unregister_framedone(
struct omap_overlay_manager *mgr,
void (*handler)(void *), void *data)
 {
+   struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
+   struct drm_device *dev = omap_crtc->base.dev;
+
+   dev_dbg(dev->dev, "unregister framedone %s", omap_crtc->name);
+
+   WARN_ON(omap_crtc->framedone_handler != handler);
+   WARN_ON(omap_crtc->framedone_handler_data != data);
+
+   omap_crtc->framedone_handler = NULL;
+   omap_crtc->framedone_handler_data = NULL;
 }

 static const struct dss_mgr_ops mgr_ops = {
-- 
2.7.0

[PATCH 08/23] drm: omapdrm: crtc: add enabled bit to state

[Sebastian Reichel]

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/omap_crtc.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c 
b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 5ef27664bcfa..78ef9773cca1 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -207,6 +207,8 @@ static int omap_crtc_dss_enable(struct omap_overlay_manager 
*mgr)
_crtc->timings);
omap_crtc_set_enabled(_crtc->base, true);

+   set_bit(crtc_enabled, _crtc->state);
+
return 0;
 }

@@ -214,6 +216,8 @@ static void omap_crtc_dss_disable(struct 
omap_overlay_manager *mgr)
 {
struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];

+   clear_bit(crtc_enabled, _crtc->state);
+
omap_crtc_set_enabled(_crtc->base, false);
 }

-- 
2.7.0

[PATCH 12/23] drm: omapdrm: plane: update fifo size on atomic update

[Sebastian Reichel]

This is a workaround for a hardware bug occuring
on OMAP3 with manually updated panels.

Signed-off-By: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/omap_drv.h   |  1 +
 drivers/gpu/drm/omapdrm/omap_plane.c | 23 +++
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h 
b/drivers/gpu/drm/omapdrm/omap_drv.h
index 71e2c2284b86..3ab4919aff4b 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.h
+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
@@ -161,6 +161,7 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
int id, enum drm_plane_type type);
 void omap_plane_install_properties(struct drm_plane *plane,
struct drm_mode_object *obj);
+void omap_plane_update_fifo(struct drm_plane *plane);

 struct drm_encoder *omap_encoder_init(struct drm_device *dev,
struct omap_dss_device *dssdev);
diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c 
b/drivers/gpu/drm/omapdrm/omap_plane.c
index d75b197eff46..0147e416140c 100644
--- a/drivers/gpu/drm/omapdrm/omap_plane.c
+++ b/drivers/gpu/drm/omapdrm/omap_plane.c
@@ -75,6 +75,28 @@ static void omap_plane_cleanup_fb(struct drm_plane *plane,
omap_framebuffer_unpin(old_state->fb);
 }

+void omap_plane_update_fifo(struct drm_plane *plane)
+{
+   struct omap_plane *omap_plane = to_omap_plane(plane);
+   struct drm_plane_state *state = plane->state;
+   struct drm_device *dev = plane->dev;
+   bool use_fifo_merge = false;
+   u32 fifo_low, fifo_high;
+   bool use_manual_update;
+
+   if (!dispc_ovl_enabled(omap_plane->id))
+   return;
+
+   use_manual_update = omap_crtc_is_manual_updated(state->crtc);
+
+   dispc_ovl_compute_fifo_thresholds(omap_plane->id, _low, _high,
+   use_fifo_merge, use_manual_update);
+
+   dev_dbg(dev->dev, "update fifo: %d %d", fifo_low, fifo_high);
+
+   dispc_ovl_set_fifo_threshold(omap_plane->id, fifo_low, fifo_high);
+}
+
 static void omap_plane_atomic_update(struct drm_plane *plane,
 struct drm_plane_state *old_state)
 {
@@ -141,6 +163,7 @@ static void omap_plane_atomic_update(struct drm_plane 
*plane,
}

dispc_ovl_enable(omap_plane->id, true);
+   omap_plane_update_fifo(plane);
 }

 static void omap_plane_atomic_disable(struct drm_plane *plane,
-- 
2.7.0

[PATCH 10/23] drm: omapdrm: crtc: detect manually updated displays

[Sebastian Reichel]

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/omap_crtc.c | 31 ++-
 drivers/gpu/drm/omapdrm/omap_drv.h  |  1 +
 2 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c 
b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 78ef9773cca1..8967013c1fb5 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -48,6 +48,7 @@ struct omap_crtc {
struct omap_overlay_manager *mgr;

struct omap_video_timings timings;
+   bool manually_updated;

struct omap_drm_irq vblank_irq;
struct omap_drm_irq error_irq;
@@ -90,6 +91,12 @@ int omap_crtc_wait_pending(struct drm_crtc *crtc)
  msecs_to_jiffies(50));
 }

+bool omap_crtc_is_manual_updated(struct drm_crtc *crtc)
+{
+   struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
+   return omap_crtc->manually_updated;
+}
+
 /* 
-
  * DSS Manager Functions
  */
@@ -154,6 +161,11 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, 
bool enable)
omap_crtc->ignore_digit_sync_lost = true;
}

+   if (omap_crtc->manually_updated) {
+   dev_dbg(dev->dev, "stallmode detected, not waiting for irq");
+   return;
+   }
+
framedone_irq = dispc_mgr_get_framedone_irq(channel);
vsync_irq = dispc_mgr_get_vsync_irq(channel);

@@ -233,7 +245,13 @@ static void omap_crtc_dss_set_lcd_config(struct 
omap_overlay_manager *mgr,
const struct dss_lcd_mgr_config *config)
 {
struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
-   DBG("%s", omap_crtc->name);
+   struct drm_device *dev = omap_crtc->base.dev;
+   struct drm_plane *plane;
+
+   dev_dbg(dev->dev, "set lcd config for %s", omap_crtc->name);
+
+   omap_crtc->manually_updated = dss_lcd_mgr_config_get_stallmode(config);
+
dispc_mgr_set_lcd_config(omap_crtc->channel, config);
 }

@@ -358,10 +376,18 @@ static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
 static void omap_crtc_enable(struct drm_crtc *crtc)
 {
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
+   struct omap_dss_device *display = omap_crtc->mgr->output->dst;
struct drm_device *dev = crtc->dev;

DBG("%s", omap_crtc->name);

+   /* manual updated display will not trigger vsync irq */
+   /* omap_crtc->manually_updated is not yet set */
+   if (display->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) {
+   dev_dbg(dev->dev, "manual update display detected!");
+   return;
+   }
+
if (test_and_set_bit(crtc_pending, _crtc->state))
dev_warn(dev->dev, "crtc enable while pending bit set!");

@@ -407,6 +433,9 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,

WARN_ON(omap_crtc->vblank_irq.registered);

+   if (omap_crtc->manually_updated)
+   return;
+
if (dispc_mgr_is_enabled(omap_crtc->channel)) {

DBG("%s: GO", omap_crtc->name);
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h 
b/drivers/gpu/drm/omapdrm/omap_drv.h
index 5dfa93a3b505..71e2c2284b86 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.h
+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
@@ -155,6 +155,7 @@ void omap_crtc_pre_uninit(void);
 struct drm_crtc *omap_crtc_init(struct drm_device *dev,
struct drm_plane *plane, enum omap_channel channel, int id);
 int omap_crtc_wait_pending(struct drm_crtc *crtc);
+bool omap_crtc_is_manual_updated(struct drm_crtc *crtc);

 struct drm_plane *omap_plane_init(struct drm_device *dev,
int id, enum drm_plane_type type);
-- 
2.7.0

[PATCH 02/23] ARM: dts: n950: add display support

[Sebastian Reichel]

Signed-off-By: Sebastian Reichel 
---
 arch/arm/boot/dts/omap3-n950.dts | 71 
 1 file changed, 71 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-n950.dts b/arch/arm/boot/dts/omap3-n950.dts
index 0885b34d5d7d..41b8fb585272 100644
--- a/arch/arm/boot/dts/omap3-n950.dts
+++ b/arch/arm/boot/dts/omap3-n950.dts
@@ -17,6 +17,26 @@
compatible = "nokia,omap3-n950", "ti,omap36xx", "ti,omap3";
 };

+_pmx_core {
+   dsi_pins: pinmux_dsi_pins {
+   pinctrl-single,pins = <
+   OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE1) /* 
dsi_dx0 - data0+ */
+   OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE1) /* 
dsi_dy0 - data0- */
+   OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE1) /* 
dsi_dx1 - clk+   */
+   OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE1) /* 
dsi_dy1 - clk-   */
+   OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE1) /* 
dsi_dx2 - data1+ */
+   OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE1) /* 
dsi_dy2 - data1- */
+   >;
+   };
+
+   display_pins: pinmux_display_pins {
+   pinctrl-single,pins = <
+   OMAP3_CORE1_IOPAD(0x20ca, PIN_INPUT | MUX_MODE4) /* 
gpio 62 - display te */
+   OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4) /* 
gpio 87 - display reset */
+   >;
+   };
+};
+
  {
smia_1: camera at 10 {
compatible = "nokia,smia";
@@ -53,3 +73,54 @@
};
};
 };
+
+ {
+   status = "ok";
+
+   vdda_video-supply = <>;
+};
+
+ {
+   status = "ok";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+
+   vdd-supply = <>;
+
+   port {
+   dsi_out_ep: endpoint {
+   remote-endpoint = <_in>;
+   lanes = <2 3 0 1 4 5>;
+   };
+   };
+
+   lcd0: display {
+   compatible = "nokia,himalaya", "panel-dsi-cm";
+   label = "lcd0";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+
+   vpnl-supply = <>;
+   vddi-supply = <>;
+
+   reset-gpios = < 23 GPIO_ACTIVE_HIGH>; /* 87 */
+   te-gpios = < 30 GPIO_ACTIVE_HIGH>;/* 62 */
+
+   has-dsi-backlight;
+
+   /* panel is 480x464 with top and bottom 5 lines not visible */
+   /* physical dimensions: 48960µm x 88128µm */
+   resolution-x = <480>;
+   resolution-y = <854>;
+   offset-x = <0>;
+   offset-y = <5>;
+
+   port {
+   lcd0_in: endpoint {
+   remote-endpoint = <_out_ep>;
+   };
+   };
+   };
+};
-- 
2.7.0

[PATCH 06/23] drm: omapdrm: wait for pending operations before updating plane

[Sebastian Reichel]

Updating the plane may interrupt ongoing display
updates, so wait for any pending operations.

Signed-off-By: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/omap_drv.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c 
b/drivers/gpu/drm/omapdrm/omap_drv.c
index a3ff35f5f6cd..e142a4245766 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -95,6 +95,10 @@ static void omap_atomic_complete(struct 
omap_atomic_state_commit *commit)
/* Apply the atomic update. */
dispc_runtime_get();

+   dev_dbg(dev->dev, "omap_atomic_complete");
+
+   omap_atomic_wait_for_completion(dev, old_state);
+
drm_atomic_helper_commit_modeset_disables(dev, old_state);
drm_atomic_helper_commit_planes(dev, old_state, false);
drm_atomic_helper_commit_modeset_enables(dev, old_state);
-- 
2.7.0

[PATCH 01/23] ARM: dts: n9/n950: regulator configuration

[Sebastian Reichel]

Add regulator configuration as found in the
board files of Nokia's kernel.

Signed-off-By: Sebastian Reichel 
---
 arch/arm/boot/dts/omap3-n950-n9.dtsi | 72 
 1 file changed, 72 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi 
b/arch/arm/boot/dts/omap3-n950-n9.dtsi
index a2c2b8d8dd2c..3c7f1d2deb2f 100644
--- a/arch/arm/boot/dts/omap3-n950-n9.dtsi
+++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi
@@ -72,6 +72,30 @@
ti,pulldowns= <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */
 };

+ {
+   regulator-name = "vdac";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+};
+
+ {
+   regulator-name = "vpll1";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+};
+
+ {
+   regulator-name = "vpll2";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+};
+
+ {
+   regulator-name = "vaux1";
+   regulator-min-microvolt = <280>;
+   regulator-max-microvolt = <280>;
+};
+
 /* CSI-2 receiver */
  {
regulator-name = "vaux2";
@@ -86,6 +110,54 @@
regulator-max-microvolt = <280>;
 };

+ {
+   regulator-name = "vaux4";
+   regulator-min-microvolt = <280>;
+   regulator-max-microvolt = <280>;
+};
+
+ {
+   regulator-name = "vmmc1";
+   regulator-min-microvolt = <185>;
+   regulator-max-microvolt = <315>;
+};
+
+ {
+   regulator-name = "vmmc2";
+   regulator-min-microvolt = <300>;
+   regulator-max-microvolt = <300>;
+};
+
+ {
+   regulator-name = "vintana1";
+   regulator-min-microvolt = <150>;
+   regulator-max-microvolt = <150>;
+};
+
+ {
+   regulator-name = "vintana2";
+   regulator-min-microvolt = <275>;
+   regulator-max-microvolt = <275>;
+};
+
+ {
+   regulator-name = "vintdig";
+   regulator-min-microvolt = <150>;
+   regulator-max-microvolt = <150>;
+};
+
+ {
+   regulator-name = "vsim";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+};
+
+ {
+   regulator-name = "vio";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+};
+
  {
clock-frequency = <40>;
 };
-- 
2.7.0

[PATCH 07/23] drm: omapdrm: crtc: switch pending variable to atomic bitset

[Sebastian Reichel]

Having the pending variable available as atomic bit helps
with the later addition of manually updated display support.

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/omap_crtc.c | 31 +--
 1 file changed, 17 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c 
b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 2ed0754ed19e..5ef27664bcfa 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -28,6 +28,11 @@

 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)

+enum omap_crtc_state {
+   crtc_enabled= 0,
+   crtc_pending= 1
+};
+
 struct omap_crtc {
struct drm_crtc base;

@@ -49,7 +54,7 @@ struct omap_crtc {

bool ignore_digit_sync_lost;

-   bool pending;
+   unsigned long state;
wait_queue_head_t pending_wait;
 };

@@ -81,7 +86,7 @@ int omap_crtc_wait_pending(struct drm_crtc *crtc)
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);

return wait_event_timeout(omap_crtc->pending_wait,
- !omap_crtc->pending,
+ !test_bit(crtc_pending, _crtc->state),
  msecs_to_jiffies(50));
 }

@@ -311,10 +316,8 @@ static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, 
uint32_t irqstatus)

__omap_irq_unregister(dev, _crtc->vblank_irq);

-   rmb();
-   WARN_ON(!omap_crtc->pending);
-   omap_crtc->pending = false;
-   wmb();
+   if (!test_and_clear_bit(crtc_pending, _crtc->state))
+   dev_warn(dev->dev, "pending bit was not set in vblank irq");

/* wake up userspace */
omap_crtc_complete_page_flip(_crtc->base);
@@ -351,13 +354,12 @@ static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
 static void omap_crtc_enable(struct drm_crtc *crtc)
 {
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
+   struct drm_device *dev = crtc->dev;

DBG("%s", omap_crtc->name);

-   rmb();
-   WARN_ON(omap_crtc->pending);
-   omap_crtc->pending = true;
-   wmb();
+   if (test_and_set_bit(crtc_pending, _crtc->state))
+   dev_warn(dev->dev, "crtc enable while pending bit set!");

omap_irq_register(crtc->dev, _crtc->vblank_irq);

@@ -397,6 +399,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
   struct drm_crtc_state *old_crtc_state)
 {
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
+   struct drm_device *dev = crtc->dev;

WARN_ON(omap_crtc->vblank_irq.registered);

@@ -404,10 +407,8 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,

DBG("%s: GO", omap_crtc->name);

-   rmb();
-   WARN_ON(omap_crtc->pending);
-   omap_crtc->pending = true;
-   wmb();
+   if (test_and_set_bit(crtc_pending, _crtc->state))
+   dev_warn(dev->dev, "atomic flush while pending bit 
set!");

dispc_mgr_go(omap_crtc->channel);
omap_irq_register(crtc->dev, _crtc->vblank_irq);
@@ -509,6 +510,8 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,

init_waitqueue_head(_crtc->pending_wait);

+   omap_crtc->state = 0;
+
omap_crtc->channel = channel;
omap_crtc->name = channel_names[channel];

-- 
2.7.0

[PATCH 00/23] Nokia N950 display support

[Sebastian Reichel]

Hi,

On Tue, Mar 08, 2016 at 08:39:08PM +0200, Aaro Koskinen wrote:
> On Tue, Mar 08, 2016 at 05:39:32PM +0100, Sebastian Reichel wrote:
> > This series adds support for the Nokia N950 display.
> > Since the panel is using DSI command mode, it involves
> > adding support for manually updated displays to
> > omapdrm.
> 
> Works OK, but the picture seems to be upside down?

vertical, upside down is the native panel orientation.

> Also shouldn't the default orientation be landscape?

The N950 vendor kernel contains some code adding DSI
rotation support with half-frame update mechnism to
avoid tearing. It's quite complex and as far as I
understand it also error-prone. Tomi knows more about
that.

I have a simpler patch without the half-frame update
stuff, which works fine for me. I didn't notice any
tearing, but I haven't done any really fast image
updating. Also omapdrm has rotation support using
the DSS hardware, which also seems to work ok. I'm
still checking out what method is most suitable for
mainline.

But yeah, we probably want to change the default
rotation. Especially since touchscreen should have
the same default rotation as the screen. (TS is
horizontal, correct orientation for keyboard usage)

I will have a look at the (default-)rotation when
basic panel support has been ACKed.

-- Sebastian
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[3.19.y-ckt stable] Patch "drm: Fix treatment of drm_vblank_offdelay in drm_vblank_on() (v2)" has been added to the 3.19.y-ckt tree

[Kamal Mostafa]

This is a note to let you know that I have just added a patch titled

drm: Fix treatment of drm_vblank_offdelay in drm_vblank_on() (v2)

to the linux-3.19.y-queue branch of the 3.19.y-ckt extended stable tree 
which can be found at:

http://kernel.ubuntu.com/git/ubuntu/linux.git/log/?h=linux-3.19.y-queue

This patch is scheduled to be released in version 3.19.8-ckt16.

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.19.y-ckt tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable

Thanks.
-Kamal

---8<

>From 526ff19b2357c8cb1ac1e08705cdab839611a037 Mon Sep 17 00:00:00 2001
From: Mario Kleiner 
Date: Fri, 12 Feb 2016 20:30:30 +0100
Subject: drm: Fix treatment of drm_vblank_offdelay in drm_vblank_on() (v2)

commit bb74fc1bf3072bd3ab4ed5f43afd287a63baf2d7 upstream.

drm_vblank_offdelay can have three different types of values:

< 0 is to be always treated the same as dev->vblank_disable_immediate
= 0 is to be treated as "never disable vblanks"
> 0 is to be treated as disable immediate if kms driver wants it
that way via dev->vblank_disable_immediate. Otherwise it is
a disable timeout in msecs.

This got broken in Linux 3.18+ for the implementation of
drm_vblank_on. If the user specified a value of zero which should
always reenable vblank irqs in this function, a kms driver could
override the users choice by setting vblank_disable_immediate
to true. This patch fixes the regression and keeps the user in
control.

v2: Only reenable vblank if there are clients left or the user
requested to "never disable vblanks" via offdelay 0. Enabling
vblanks even in the "delayed disable" case (offdelay > 0) was
specifically added by Ville in commit cd19e52aee922
("drm: Kick start vblank interrupts at drm_vblank_on()"),
but after discussion it turns out that this was done by accident.

Citing Ville: "I think it just ended up as a mess due to changing
some of the semantics of offdelay<0 vs. offdelay==0 vs.
disable_immediate during the review of the series. So yeah, given
how drm_vblank_put() works now, I'd just make this check for
offdelay==0."

Signed-off-by: Mario Kleiner 
Reviewed-by: Daniel Vetter 

Cc: michel at daenzer.net
Cc: vbabka at suse.cz
Cc: ville.syrjala at linux.intel.com
Cc: daniel.vetter at ffwll.ch
Cc: dri-devel at lists.freedesktop.org
Cc: alexander.deucher at amd.com
Cc: christian.koenig at amd.com
Signed-off-by: Dave Airlie 
Signed-off-by: Kamal Mostafa 
---
 drivers/gpu/drm/drm_irq.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index 68193a6..5409518 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -1264,8 +1264,7 @@ void drm_vblank_on(struct drm_device *dev, int crtc)
 * re-enable interrupts if there are users left, or the
 * user wishes vblank interrupts to be enabled all the time.
 */
-   if (atomic_read(>refcount) != 0 ||
-   (!dev->vblank_disable_immediate && drm_vblank_offdelay == 0))
+   if (atomic_read(>refcount) != 0 || drm_vblank_offdelay == 0)
WARN_ON(drm_vblank_enable(dev, crtc));
spin_unlock_irqrestore(>vbl_lock, irqflags);
 }
--
2.7.0

[PATCH 03/23] drm: omapdrm: dss: reset dsi module during initialization

[Sebastian Reichel]

From: Tomi Valkeinen 

The Nokia N950's bootloader leaves the DSI module
in a non-working state. Work around this by resetting
the DSI module before using it.

Signed-off-By: Tomi Valkeinen 
Reviewed-By: Sebastian Reichel 
Tested-By: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 24 
 1 file changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 43be4b2a7b05..363a61e6aca7 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -5274,6 +5274,28 @@ static int dsi_init_pll_data(struct platform_device 
*dsidev)
return 0;
 }

+static int _dsi_wait_reset(struct platform_device *dsidev)
+{
+   int t = 0;
+
+   while (REG_GET(dsidev, DSI_SYSSTATUS, 0, 0) == 0) {
+if (++t > 5) {
+   DSSERR("soft reset failed\n");
+   return -ENODEV;
+}
+udelay(1);
+   }
+
+   return 0;
+}
+
+static int _dsi_reset(struct platform_device *dsidev)
+{
+   /* Soft reset */
+   dsi_write_reg(dsidev, DSI_SYSCONFIG, 0x2);
+   return _dsi_wait_reset(dsidev);
+}
+
 /* DSI1 HW IP initialisation */
 static int dsi_bind(struct device *dev, struct device *master, void *data)
 {
@@ -5432,6 +5454,8 @@ static int dsi_bind(struct device *dev, struct device 
*master, void *data)
if (r)
goto err_runtime_get;

+   _dsi_reset(dsidev);
+
rev = dsi_read_reg(dsidev, DSI_REVISION);
dev_dbg(>dev, "OMAP DSI rev %d.%d\n",
   FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
-- 
2.7.0

[PATCH 04/23] drm: omapdrm: add DSI mapping

[Sebastian Reichel]

This sets proper connector type for DSI connected panels.

Signed-off-By: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/omap_drv.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c 
b/drivers/gpu/drm/omapdrm/omap_drv.c
index dfafdb602ad2..a3ff35f5f6cd 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -215,6 +215,8 @@ static int get_connector_type(struct omap_dss_device 
*dssdev)
return DRM_MODE_CONNECTOR_HDMIA;
case OMAP_DISPLAY_TYPE_DVI:
return DRM_MODE_CONNECTOR_DVID;
+   case OMAP_DISPLAY_TYPE_DSI:
+   return DRM_MODE_CONNECTOR_DSI;
default:
return DRM_MODE_CONNECTOR_Unknown;
}
-- 
2.7.0

[PATCH 20/23] drm: omapdrm: panel-dsi-cm: add offset support

[Sebastian Reichel]

The Nokia N950 contains a panel, that is partially
covered, so that not the whole display is visible.
Thus the image must be displayed with an offset.

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 21 -
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index 4c1e76da68cd..c60bc3013ff4 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -45,6 +45,8 @@ struct panel_drv_data {
struct omap_dss_device *in;

struct omap_video_timings timings;
+   int offset_x;
+   int offset_y;

struct platform_device *pdev;

@@ -203,12 +205,17 @@ static int dsicm_set_update_window(struct panel_drv_data 
*ddata,
 {
struct omap_dss_device *in = ddata->in;
int r;
-   u16 x1 = x;
-   u16 x2 = x + w - 1;
-   u16 y1 = y;
-   u16 y2 = y + h - 1;
-
u8 buf[5];
+   u16 x1, x2, y1, y2;
+
+   x += ddata->offset_x;
+   y += ddata->offset_y;
+
+   x1 = x;
+   x2 = x + w - 1;
+   y1 = y;
+   y2 = y + h - 1;
+
buf[0] = MIPI_DCS_SET_COLUMN_ADDRESS;
buf[1] = (x1 >> 8) & 0xff;
buf[2] = (x1 >> 0) & 0xff;
@@ -1244,6 +1251,8 @@ static int dsicm_probe_of(struct platform_device *pdev)

of_property_read_u32(node, "resolution-x", (u32*) 
>timings.x_res);
of_property_read_u32(node, "resolution-y", (u32*) 
>timings.y_res);
+   of_property_read_u32(node, "offset-x", >offset_x);
+   of_property_read_u32(node, "offset-y", >offset_y);

ddata->timings.pixelclock = ddata->timings.x_res * ddata->timings.y_res 
* 60;

@@ -1273,6 +1282,8 @@ static int dsicm_probe(struct platform_device *pdev)
ddata->timings.x_res = 864;
ddata->timings.y_res = 480;
ddata->timings.pixelclock = 864 * 480 * 60;
+   ddata->offset_x = 0;
+   ddata->offset_y = 0;

if (dev_get_platdata(dev)) {
r = dsicm_probe_pdata(pdev);
-- 
2.7.0

[PATCH 22/23] drm: omapdrm: panel-dsi-cm: ratelimit debug output in update path

[Sebastian Reichel]

Generating debug messages during display update results
in lot's of messages, if the display shows the console.

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index ca7fba59c760..196fe8d18ff4 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -931,7 +931,7 @@ static int dsicm_update(struct omap_dss_device *dssdev,
struct omap_dss_device *in = ddata->in;
int r;

-   dev_dbg(>pdev->dev, "update %d, %d, %d x %d\n", x, y, w, h);
+   dev_dbg_ratelimited(>pdev->dev, "update %d, %d, %d x %d\n", x, 
y, w, h);

mutex_lock(>lock);
in->ops.dsi->bus_lock(in);
@@ -978,14 +978,14 @@ static int dsicm_sync(struct omap_dss_device *dssdev)
struct panel_drv_data *ddata = to_panel_data(dssdev);
struct omap_dss_device *in = ddata->in;

-   dev_dbg(>pdev->dev, "sync\n");
+   dev_dbg_ratelimited(>pdev->dev, "sync\n");

mutex_lock(>lock);
in->ops.dsi->bus_lock(in);
in->ops.dsi->bus_unlock(in);
mutex_unlock(>lock);

-   dev_dbg(>pdev->dev, "sync done\n");
+   dev_dbg_ratelimited(>pdev->dev, "sync done\n");

return 0;
 }
-- 
2.7.0

[PATCH 21/23] drm: omapdrm: panel-dsi-cm: block disable until update completed

[Sebastian Reichel]

DSI hardware IPs seem to be a bit unhappy about
incomplete image transfers, so try to wait for
an update to finish before disabling the panel.

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index c60bc3013ff4..ca7fba59c760 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -78,6 +78,9 @@ struct panel_drv_data {
atomic_t do_update;
int channel;

+   wait_queue_head_t update_wait;
+   atomic_t updating;
+
struct delayed_work te_timeout_work;

bool intro_printed;
@@ -845,6 +848,13 @@ static void dsicm_disable(struct omap_dss_device *dssdev)

dev_dbg(>pdev->dev, "disable\n");

+   r = wait_event_timeout(ddata->update_wait,
+   !atomic_read(>updating),
+   msecs_to_jiffies(250));
+   if (!r) {
+   dev_warn(>pdev->dev, "update did not finish, force 
disable!");
+   }
+
mutex_lock(>lock);

dsicm_cancel_ulps_work(ddata);
@@ -871,6 +881,9 @@ static void dsicm_framedone_cb(int err, void *data)

dev_dbg(>pdev->dev, "framedone, err %d\n", err);
in->ops.dsi->bus_unlock(ddata->in);
+
+   atomic_set(>updating, 0);
+   wake_up(>update_wait);
 }

 static irqreturn_t dsicm_te_isr(int irq, void *data)
@@ -885,6 +898,7 @@ static irqreturn_t dsicm_te_isr(int irq, void *data)
if (old) {
cancel_delayed_work(>te_timeout_work);

+   atomic_set(>updating, 1);
r = in->ops.dsi->update(in, ddata->channel, dsicm_framedone_cb,
ddata);
if (r)
@@ -943,6 +957,7 @@ static int dsicm_update(struct omap_dss_device *dssdev,
msecs_to_jiffies(250));
atomic_set(>do_update, 1);
} else {
+   atomic_set(>updating, 1);
r = in->ops.dsi->update(in, ddata->channel, dsicm_framedone_cb,
ddata);
if (r)
@@ -1317,6 +1332,9 @@ static int dsicm_probe(struct platform_device *pdev)
mutex_init(>lock);

atomic_set(>do_update, 0);
+   atomic_set(>updating, 0);
+
+   init_waitqueue_head(>update_wait);

if (gpio_is_valid(ddata->reset_gpio)) {
r = devm_gpio_request_one(dev, ddata->reset_gpio,
-- 
2.7.0

[PATCH 09/23] drm: omapdrm: dss: method to get stallmode from lcd config

[Sebastian Reichel]

Introduce a new dss method for reading the stallmode
status from the private lcd config structure.

Signed-off-By: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/dss/output.c | 6 ++
 include/video/omapdss.h  | 1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/output.c 
b/drivers/gpu/drm/omapdrm/dss/output.c
index 16072159bd24..b82e45938c9e 100644
--- a/drivers/gpu/drm/omapdrm/dss/output.c
+++ b/drivers/gpu/drm/omapdrm/dss/output.c
@@ -234,6 +234,12 @@ void dss_mgr_set_lcd_config(struct omap_overlay_manager 
*mgr,
 }
 EXPORT_SYMBOL(dss_mgr_set_lcd_config);

+bool dss_lcd_mgr_config_get_stallmode(const struct dss_lcd_mgr_config *config)
+{
+   return config->stallmode;
+}
+EXPORT_SYMBOL(dss_lcd_mgr_config_get_stallmode);
+
 int dss_mgr_enable(struct omap_overlay_manager *mgr)
 {
return dss_mgr_ops->enable(mgr);
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 295b41e20d8e..9bde65b79220 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -975,6 +975,7 @@ int dss_mgr_register_framedone_handler(struct 
omap_overlay_manager *mgr,
void (*handler)(void *), void *data);
 void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
void (*handler)(void *), void *data);
+bool dss_lcd_mgr_config_get_stallmode(const struct dss_lcd_mgr_config *config);

 static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
 {
-- 
2.7.0

[PATCH 23/23] drm: omapdrm: panel-dsi-cm: provide timings methods for omapdrm

[Sebastian Reichel]

Provide omapdrm with methods to acquire timings
and check them later, so that it can properly
initialize the display.

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 38 +
 1 file changed, 38 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index 196fe8d18ff4..edd1298b3a71 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -1163,6 +1163,41 @@ static void dsicm_ulps_work(struct work_struct *work)
mutex_unlock(>lock);
 }

+static void dsicm_get_timings(struct omap_dss_device *dssdev,
+   struct omap_video_timings *timings)
+{
+   struct panel_drv_data *ddata = to_panel_data(dssdev);
+
+   *timings = ddata->timings;
+}
+
+static int dsicm_check_timings(struct omap_dss_device *dssdev,
+   struct omap_video_timings *timings)
+{
+   struct panel_drv_data *ddata = to_panel_data(dssdev);
+   int ret = 0;
+
+   if (timings->x_res != ddata->timings.x_res)
+   ret = -EINVAL;
+   else if (timings->y_res != ddata->timings.y_res)
+   ret = -EINVAL;
+
+   /* pixelclock is modified by dsi, so not easily checkable */
+
+   /* vfp, vbp, hfp, hbp are (re-)configured automatically by dsi */
+
+   if (ret) {
+   dev_warn(dssdev->dev, "wrong resolution: %d x %d",
+   timings->x_res, timings->y_res);
+   dev_warn(dssdev->dev, "panel resolution: %d x %d",
+   ddata->timings.x_res, ddata->timings.y_res);
+   } else {
+   dev_dbg(dssdev->dev, "mode check: ok");
+   }
+
+   return ret;
+}
+
 static struct omap_dss_driver dsicm_ops = {
.connect= dsicm_connect,
.disconnect = dsicm_disconnect,
@@ -1180,6 +1215,9 @@ static struct omap_dss_driver dsicm_ops = {
.get_te = dsicm_get_te,

.memory_read= dsicm_memory_read,
+
+   .get_timings= dsicm_get_timings,
+   .check_timings  = dsicm_check_timings,
 };

 static int dsicm_probe_pdata(struct platform_device *pdev)
-- 
2.7.0

[PATCH 05/23] Revert "drm: omapdrm: Remove manual update display support"

[Sebastian Reichel]

This reverts commit 5a35876e2830511cb8110667fc426c6a6165a593.

Revert the removal of manual update display support in
preparation for DSI command mode panels.

Signed-off-By: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/omap_connector.c | 12 +++
 drivers/gpu/drm/omapdrm/omap_drv.h   |  4 +++
 drivers/gpu/drm/omapdrm/omap_fb.c| 38 +
 drivers/gpu/drm/omapdrm/omap_fbdev.c | 57 +---
 4 files changed, 107 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c 
b/drivers/gpu/drm/omapdrm/omap_connector.c
index 83f2a9177c14..8db36aa4bd00 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -275,6 +275,18 @@ static const struct drm_connector_helper_funcs 
omap_connector_helper_funcs = {
.best_encoder = omap_connector_attached_encoder,
 };

+/* flush an area of the framebuffer (in case of manual update display that
+ * is not automatically flushed)
+ */
+void omap_connector_flush(struct drm_connector *connector,
+   int x, int y, int w, int h)
+{
+   struct omap_connector *omap_connector = to_omap_connector(connector);
+
+   /* TODO: enable when supported in dss */
+   VERB("%s: %d,%d, %dx%d", omap_connector->dssdev->name, x, y, w, h);
+}
+
 /* initialize connector */
 struct drm_connector *omap_connector_init(struct drm_device *dev,
int connector_type, struct omap_dss_device *dssdev,
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h 
b/drivers/gpu/drm/omapdrm/omap_drv.h
index 9e0030731c37..5dfa93a3b505 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.h
+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
@@ -170,6 +170,8 @@ struct drm_connector *omap_connector_init(struct drm_device 
*dev,
 struct drm_encoder *omap_connector_attached_encoder(
struct drm_connector *connector);
 bool omap_connector_get_hdmi_mode(struct drm_connector *connector);
+void omap_connector_flush(struct drm_connector *connector,
+   int x, int y, int w, int h);

 void copy_timings_omap_to_drm(struct drm_display_mode *mode,
struct omap_video_timings *timings);
@@ -189,6 +191,8 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer 
*fb,
struct omap_drm_window *win, struct omap_overlay_info *info);
 struct drm_connector *omap_framebuffer_get_next_connector(
struct drm_framebuffer *fb, struct drm_connector *from);
+void omap_framebuffer_flush(struct drm_framebuffer *fb,
+   int x, int y, int w, int h);

 void omap_gem_init(struct drm_device *dev);
 void omap_gem_deinit(struct drm_device *dev);
diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c 
b/drivers/gpu/drm/omapdrm/omap_fb.c
index ad202dfc1a49..b51d2243f356 100644
--- a/drivers/gpu/drm/omapdrm/omap_fb.c
+++ b/drivers/gpu/drm/omapdrm/omap_fb.c
@@ -124,6 +124,16 @@ static int omap_framebuffer_dirty(struct drm_framebuffer 
*fb,
struct drm_file *file_priv, unsigned flags, unsigned color,
struct drm_clip_rect *clips, unsigned num_clips)
 {
+   int i;
+
+   drm_modeset_lock_all(fb->dev);
+   for (i = 0; i < num_clips; i++) {
+   omap_framebuffer_flush(fb, clips[i].x1, clips[i].y1,
+   clips[i].x2 - clips[i].x1,
+   clips[i].y2 - clips[i].y1);
+   }
+   drm_modeset_unlock_all(fb->dev);
+
return 0;
 }

@@ -345,6 +355,34 @@ struct drm_connector *omap_framebuffer_get_next_connector(
return NULL;
 }

+/* flush an area of the framebuffer (in case of manual update display that
+ * is not automatically flushed)
+ */
+void omap_framebuffer_flush(struct drm_framebuffer *fb,
+   int x, int y, int w, int h)
+{
+   struct drm_connector *connector = NULL;
+
+   VERB("flush: %d,%d %dx%d, fb=%p", x, y, w, h, fb);
+
+   /* FIXME: This is racy - no protection against modeset config changes. 
*/
+   while ((connector = omap_framebuffer_get_next_connector(fb, 
connector))) {
+   /* only consider connectors that are part of a chain */
+   if (connector->encoder && connector->encoder->crtc) {
+   /* TODO: maybe this should propagate thru the crtc who
+* could do the coordinate translation..
+*/
+   struct drm_crtc *crtc = connector->encoder->crtc;
+   int cx = max(0, x - crtc->x);
+   int cy = max(0, y - crtc->y);
+   int cw = w + (x - crtc->x) - cx;
+   int ch = h + (y - crtc->y) - cy;
+
+   omap_connector_flush(connector, cx, cy, cw, ch);
+   }
+   }
+}
+
 #ifdef CONFIG_DEBUG_FS
 void omap_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m)
 {
diff --git a/drivers/gpu/drm/omapdrm/omap_fbdev.c 

[PATCH 19/23] drm: omapdrm: panel-dsi-cm: improve DT support

[Sebastian Reichel]

Introduce new DT properties, so that it's possible
to use different panels with the driver.

 * resolution-x (default: 864)
 * resolution-y (default: 480)
 * has-dsi-backlight (default: no backlight)

Signed-off-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 17 -
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index 8316b6c2d8aa..4c1e76da68cd 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -1240,7 +1240,12 @@ static int dsicm_probe_of(struct platform_device *pdev)

ddata->in = in;

-   /* TODO: ulps, backlight */
+   ddata->use_dsi_backlight = of_property_read_bool(node, 
"has-dsi-backlight");
+
+   of_property_read_u32(node, "resolution-x", (u32*) 
>timings.x_res);
+   of_property_read_u32(node, "resolution-y", (u32*) 
>timings.y_res);
+
+   ddata->timings.pixelclock = ddata->timings.x_res * ddata->timings.y_res 
* 60;

return 0;
 }
@@ -1263,6 +1268,12 @@ static int dsicm_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, ddata);
ddata->pdev = pdev;

+   /* setup defaults */
+   ddata->ulps_timeout = 500;
+   ddata->timings.x_res = 864;
+   ddata->timings.y_res = 480;
+   ddata->timings.pixelclock = 864 * 480 * 60;
+
if (dev_get_platdata(dev)) {
r = dsicm_probe_pdata(pdev);
if (r)
@@ -1275,10 +1286,6 @@ static int dsicm_probe(struct platform_device *pdev)
return -ENODEV;
}

-   ddata->timings.x_res = 864;
-   ddata->timings.y_res = 480;
-   ddata->timings.pixelclock = 864 * 480 * 60;
-
dssdev = >dssdev;
dssdev->dev = dev;
dssdev->driver = _ops;
-- 
2.7.0