[PATCH 08/12] i2c: core: Add support for 'i2c-bus' subnode

On Thu, Jun 23, 2016 at 04:59:01PM +0100, Jon Hunter wrote: > If the 'i2c-bus' device-tree node is present for an I2C adapter then > parse this subnode for I2C slaves. > > Signed-off-by: Jon Hunter > --- > drivers/i2c/i2c-core.c | 10 -- > 1 file changed, 8 insertions(+), 2 deletions(-)

[PATCH 08/12] i2c: core: Add support for 'i2c-bus' subnode

> Would you be okay if I take this patch along with the device tree > binding change into a stable branch and provide a tag for you to pull > into the I2C tree? Yes, once my comments to the previous patch are addressed, we can do that. For this patch already: Acked-by: Wolfram Sang

[PATCH 07/12] dt-bindings: i2c: Add support for 'i2c-bus' subnode

> For > example some Tegra devices have an I2C interface which may share its > pins with other devices and to share these pins subnodes for > representing these pins so they have be shared via the pinctrl framework > are needed. I think the above sentence is hard to grasp. Can you split it into

[Bug 121021] drm/i915: kernel suspend during booting up

https://bugzilla.kernel.org/show_bug.cgi?id=121021 --- Comment #5 from zhiquan.lee at gmail.com --- Sorry for disturbing you, I was misled here, please ignore it. I've filed the bug at: https://bugs.freedesktop.org/show_bug.cgi?id=96692 -- You are receiving this mail because: You are watching

[PATCH] drm/omap: panel-dsi-cm: Remove deprecated create_singlethread_workqueue

Please ignore this mail. Thanks, Bhaktipriya On Tue, Jun 28, 2016 at 10:53 PM, Bhaktipriya Shridhar wrote: > The workqueue "workqueue" has only a single workitem(>ulps_work) per > panel_drv_data and hence doesn't require ordering. > Also, it is not being used on a memory reclaim path. Hence,

[PATCH] drm/exynos: Remove deprecated create_singlethread_workqueue

Please ignore this mail. Thanks, Bhaktipriya On Tue, Jun 28, 2016 at 10:48 PM, Bhaktipriya Shridhar wrote: > The workqueue g2d_workq has only a single workitem(>runqueue_work) > and hence doesn't require ordering. Also, it is not being used on a > memory reclaim path. Hence, the singlethreaded

[PATCH] drm/exynos: Remove deprecated create_singlethread_workqueue

Please ignore this mail. On Tue, Jun 28, 2016 at 10:48 PM, Bhaktipriya Shridhar wrote: > The workqueue g2d_workq has only a single workitem(>runqueue_work) > and hence doesn't require ordering. Also, it is not being used on a > memory reclaim path. Hence, the singlethreaded workqueue has been

[PATCH] drm/radeon: Remove deprecated create_singlethread_workqueue

Please ignore this mail. Thanks, Bhaktipriya On Tue, Jun 28, 2016 at 10:56 PM, Bhaktipriya Shridhar wrote: > alloc_workqueue replaces deprecated create_singlethread_workqueue(). > > A dedicated workqueue has been used since work items need to be flushed > as a group rather than individually. >

[PATCH v1 1/5] dt-bindings: Add support for LG LP079QX1-SP0V 1536x2048 panel

Rob, On 06/29/2016 04:59 AM, Rob Herring wrote: > On Tue, Jun 28, 2016 at 12:51:12PM +0800, Yakir Yang wrote: >> The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and >> 32 pins eDP interface. This module supports 1536x2048 mode. >> >> Signed-off-by: Yakir Yang >> --- >>

[PATCH v4 2/2] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name

Doug, On 06/23/2016 01:17 PM, Doug Anderson wrote: > Hi, > > On Wed, Jun 22, 2016 at 6:47 PM, Yakir Yang wrote: >> The document about rockchip platform make a mistaken in available >> compatible name of "rk3288-edp", we should correct it to "rk3288-dp" >> which correspond to the compatible name

[PATCH v4.1 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf

Doug, On 06/23/2016 01:16 PM, Doug Anderson wrote: > Yakir, > > On Wed, Jun 22, 2016 at 6:58 PM, Yakir Yang wrote: >> For RK3399's GRF module, if we want to operate the graphic related grf >> registers, we need to enable the pclk_vio_grf which supply power for VIO >> GRF IOs, so it's better to

[PATCH v3 10/10] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in

Sean, On 06/23/2016 10:24 PM, Sean Paul wrote: > On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote: >> The enum value of DP_IRQ_TYPE_HP_CABLE_IN is zero, but driver only >> send drm hp event when the irq_type and the enum value is true. >> >> if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN || ...) >>

[PATCH 2/2 v16] drm/bridge: Add I2C based driver for ps8640 bridge

Hi Emil, One answer inline below. The rest I leave to Jitao... [snip...] On Fri, Jun 17, 2016 at 3:14 AM, Emil Velikov wrote: >> +static ssize_t ps8640_update_fw_store(struct device *dev, >> + struct device_attribute *attr, >> +

[PATCH v3 08/10] drm/rockchip: analogix_dp: correct the connector display color format and bpc

Sean, On 06/23/2016 10:19 PM, Sean Paul wrote: > On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote: >> Rockchip VOP couldn't output YUV video format for eDP controller, so >> when driver detect connector support YUV video format, we need to hack >> it down to RGB888. >> >> Signed-off-by: Yakir

[PATCH v3 09/10] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode

Sean, On 06/23/2016 10:22 PM, Sean Paul wrote: > On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote: >> The hardware IC designed that VOP must output the RGB10 video format to >> eDP contoller, and if eDP panel only support RGB8, then eDP contoller >> should cut down the video data, not via VOP

[PATCH v3 06/10] drm/rockchip: analogix_dp: make panel detect to an optional action

Sean, On 06/23/2016 10:10 PM, Sean Paul wrote: > On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote: >> Some boards don't need to declare a panel device node, like the >> display interface is DP monitors, so it's necessary to make the >> panel detect to an optional action. >> >> Signed-off-by:

[PATCH v3 02/10] drm/rockchip: analogix_dp: split the lcdc select setting into device data[Involving remittance information, please pay attention to the safety of property]

Heiko & Sean On 06/24/2016 12:16 AM, Heiko Stuebner wrote: > Am Donnerstag, 23. Juni 2016, 10:32:53 schrieb Sean Paul: >> On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote: >>> eDP controller need to declare which vop provide the video source, >>> and it's defined in GRF registers. >>> >>> But

[PATCH v3 03/10] drm/bridge: analogix_dp: correct the register bit define error in ANALOGIX_DP_PLL_REG_1

Sean, On 06/23/2016 10:33 PM, Sean Paul wrote: > On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote: >> There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced >> by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special >> registers setting"). >> >> The PHY

[PATCH v3 04/10] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting

Sean, On 06/23/2016 09:27 PM, Sean Paul wrote: > On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote: >> As vendor document indicate, when REF_CLK bit set 0, then DP >> phy's REF_CLK should switch to 24M source clock. >> >> But due to IC PHY layout mistaken, some chips need to flip this >>

[PATCH] drm/vmwgfx: Fix corner case screen target surface management v2

When the surface backing a framebuffer doesn't match the framebuffer's dimensions, the screen target code would test the framebuffer dimensions rather than the surface dimensions when deciding whether to bind the surface as a screen target directly. This causes a screen target - surface dimension

[PATCH 07/12] dt-bindings: i2c: Add support for 'i2c-bus' subnode

On 28/06/16 22:32, Wolfram Sang wrote: > * PGP Signed by an unknown key > >> For >> example some Tegra devices have an I2C interface which may share its >> pins with other devices and to share these pins subnodes for >> representing these pins so they have be shared via the pinctrl framework >>

[PATCH 1/2] drm/fsl-dcu: update the panel dt binding document

> >> Optional properties: > >> - fsl,tcon: The phandle to the timing controller node. > >> @@ -24,6 +24,11 @@ dcu: dcu at 2ce { > >>clocks = <_clk 0>, <_clk 0>; > >>clock-names = "dcu", "pix"; > >>big-endian; > >> - fsl,panel = <>; > >>fsl,tcon = <>; > >> + >

[PATCH] drm/hisilicon: add select HISI_KIRIN_DW_DSI

Hi, On 22 June 2016 at 20:59, Thierry Reding wrote: > On Wed, Jun 22, 2016 at 08:54:02AM +0800, Guodong Xu wrote: >> On 21 June 2016 at 21:34, Thierry Reding wrote: >> > On Mon, Jun 20, 2016 at 11:59:03AM +0800, Xinliang Liu wrote: >> >> From: Guodong Xu >> >> >> >> Add select

[PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver

RK3399 and RK3288 shared the same eDP IP controller, only some light difference with VOP configure and GRF configure. Also same misc fix to analogix_dp driver: - Hotplug invalid which report by Dan Carpenter - Make panel detect to an optional action - correct the register bit define error in

[PATCH v4 01/11] drm/rockchip: analogix_dp: split the lcdc select setting into device data

eDP controller need to declare which vop provide the video source, and it's defined in GRF registers. But different chips have different GRF register address, so we need to create a device data to declare the GRF messages for each chips. Signed-off-by: Yakir Yang Acked-by: Mark Yao

[PATCH v4 03/11] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting

As vendor document indicate, when REF_CLK bit set 0, then DP phy's REF_CLK should switch to 24M source clock. But due to IC PHY layout mistaken, some chips need to flip this bit(like RK3288), and unfortunately they didn't indicate in the DP version register. That's why we have to make this little

[PATCH v4 02/11] drm/bridge: analogix_dp: correct the register bit define error in ANALOGIX_DP_PLL_REG_1

There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special registers setting"). The PHY PLL input clock source is selected by ANALOGIX_DP_PLL_REG_1 BIT 0, not BIT 1. Signed-off-by: Yakir Yang

[PATCH v4 04/11] drm/rockchip: analogix_dp: add rk3399 eDP support

RK3399 and RK3288 shared the same eDP IP controller, only some light difference with VOP configure and GRF configure. Signed-off-by: Yakir Yang Acked-by: Mark Yao Reviewed-by: Tomasz Figa --- Changes in v4: - Improved the overly complicated .atomic_check function. (Sean) - Add reviewed flag

[PATCH v4 05/11] drm/rockchip: analogix_dp: make panel detect to an optional action

Some boards don't need to declare a panel device node, like the display interface is DP monitors, so it's necessary to make the panel detect to an optional action. Signed-off-by: Yakir Yang Acked-by: Mark Yao Reviewed-by: Tomasz Figa --- Changes in v4: - Move of_node_put(panel_node) directly

[PATCH v4 06/11] drm/bridge: analogix_dp: passing the connector as an argument in .get_modes()

It's better to pass the connector to platform driver in .get_modes() callback, just like what the .get_modes() helper function designed. Signed-off-by: Yakir Yang Reviewed-by: Sean Paul Reviewed-by: Tomasz Figa --- Changes in v4: - Add reviewed flag from Sean. - Add reviewed flag from Tomasz.

[PATCH v4 07/11] drm/rockchip: analogix_dp: correct the connector display color format and bpc

Rockchip VOP couldn't output YUV video format for eDP controller, so when driver detect connector support YUV video format, we need to hack it down to RGB888. Signed-off-by: Yakir Yang Acked-by: Mark Yao Reviewed-by: Tomasz Figa --- Changes in v4: - Using mask variable to collect the YUV video

[PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode

The hardware IC designed that VOP must output the RGB10 video format to eDP contoller, and if eDP panel only support RGB8, then eDP contoller should cut down the video data, not via VOP contoller, that's why we need to hardcode the VOP output mode to RGA10 here. Signed-off-by: Yakir Yang

[PATCH v4 09/11] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in

The enum value of DP_IRQ_TYPE_HP_CABLE_IN is zero, but driver only send drm hp event when the irq_type and the enum value is true. if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN || ...) drm_helper_hpd_irq_event(dp->drm_dev); So there would no drm hpd event when cable plug in, to fix that just

[PATCH v4 10/11] drm/rockchip: analogix_dp: introduce the pclk for grf

For RK3399's GRF module, if we want to operate the graphic related grf registers, we need to enable the pclk_vio_grf which supply power for VIO GRF IOs, so it's better to introduce an optional grf clock in driver. Signed-off-by: Yakir Yang Reviewed-by: Douglas Anderson Reviewed-by: Tomasz Figa

[PATCH v4 11/11] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name

The document about rockchip platform make a mistaken in available compatible name of "rk3288-edp", we should correct it to "rk3288-dp" which correspond to the compatible name in driver. This mistaken was introduced in commit be91c36247089 ("dt-bindings: add document for rockchip variant of

[PATCH V2 00/11] Add support for Tegra DPAUX pinctrl

The Display Port Auxiliary (DPAUX) channel pads can be shared with an internal I2C controller. Add pinctrl support for these pads so that the I2C controller can request and use these pads. This series has been tested with Thierry's patches for correcting the parent clock for the DPAUX devices

[PATCH V2 01/11] soc/tegra: pmc: Initialise resets associated with a power partition

When registering the Tegra power partitions with the generic PM domain framework, the current state of the each partition is checked and used as the default state for the partition. However, the state of each reset associated with the partition is not initialised and so it is possible that the

[PATCH V2 02/11] drm/tegra: Clean-up if probing DPAUX fails

If the probing of the DPAUX fails, then clocks are left enabled and the DPAUX reset de-asserted. Add code to perform the necessary clean-up on probe failure by disabling clocks and asserting the reset. Signed-off-by: Jon Hunter --- drivers/gpu/drm/tegra/dpaux.c | 22 -- 1

[PATCH V2 03/11] drm/tegra: Add helper functions for setting up DPAUX pads

In preparation for adding pinctrl support for the DPAUX pads, add helpers functions for configuring the pads and controlling the power for the pads. Please note that although a simple if-statement could be used instead of a case statement for configuring the pads as there are only two possible

[PATCH V2 04/11] dt-bindings: display: Update Tegra DPAUX documentation

Update the DPAUX compatibility string information for Tegra124, Tegra132 and Tegra210. Signed-off-by: Jon Hunter Acked-by: Rob Herring --- .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

[PATCH V2 05/11] drm/tegra: Prepare DPAUX for supporting generic PM domains

To utilise the DPAUX on Tegra, the SOR power partition must be enabled. Now that Tegra supports the generic PM domain framework we manage the SOR power partition via this framework for DPAUX. However, the sequence for gating/ungating the SOR power partition requires that the DPAUX reset is

[PATCH V2 06/11] dt-bindings: i2c: Add support for 'i2c-bus' subnode

The I2C driver core for boards using device-tree assumes any subnode of an I2C adapter in the device-tree blob is an I2C slave device. Although this makes complete sense, some I2C adapters may have subnodes which are not I2C slaves but subnodes presenting other features. For example some Tegra

[PATCH V2 07/11] i2c: core: Add support for 'i2c-bus' subnode

If the 'i2c-bus' device-tree node is present for an I2C adapter then parse this subnode for I2C slaves. Signed-off-by: Jon Hunter Acked-by: Wolfram Sang --- drivers/i2c/i2c-core.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/i2c-core.c

[PATCH V2 09/11] drm/tegra: Add pinctrl support for DPAUX

The DPAUX pins are shared with an internal I2C controller. To allow these pins to be muxed to the I2C controller, register a pinctrl device for the DPAUX device. Make Tegra DRM support dependent on PINCTRL to avoid any compilation issues. This is based upon work by Thierry Reding .

[PATCH V2 10/11] arm64: tegra: Add SOR power-domain node

Add node for SOR power-domain for Tegra210 and populate the SOR power-domain phandle for SOR and DPAUX nodes that are dependent on this power-domain. Please note that although neither the SOR or DPAUX drivers currently support runtime power-management, by populating the power-domain node the SOR

[PATCH V2 08/11] dt-bindings: Add bindings for Tegra DPAUX pinctrl driver

On Tegra124, Tegra132 and Tegra210 devices the pads used by the Display Port Auxiliary (DPAUX) channel are multiplexed such that they can also be used by one of the internal I2C controllers. Note that this is different from I2C-over-AUX supported by the DPAUX controller. The register that

[PATCH V2 11/11] arm64: tegra: Add DPAUX pinctrl bindings

Add the DPAUX pinctrl states for the DPAUX nodes defining all three possible states of "aux", "i2c" and "off". Also add the 'i2c-bus' node for the DPAUX nodes so that the I2C driver core does not attempt to parse the pinctrl state nodes. Populate the nodes for the pinctrl clients of the DPAUX pin

[PATCH 1/3] drm: bridge: add DesignWare HDMI I2S audio support

Kuninori, On 06/24/2016 10:40 AM, Kuninori Morimoto wrote: > From: Kuninori Morimoto > > Current dw-hdmi is supporting sound via AHB bus, but it has > I2S audio feature too. This patch adds I2S audio support to dw-hdmi. > This HDMI I2S is supported by using ALSA SoC common HDMI encoder > driver.

[PATCH V2 06/11] dt-bindings: i2c: Add support for 'i2c-bus' subnode

sc: not available URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160629/56a62733/attachment.sig>

[PATCH v2 1/2] drm/fsl-dcu: update the panel dt binding document

dropped the old "fsl,panel" property, using the of_graph dt binding syntax Signed-off-by: Meng Yi --- Changes in V2: -drop the unit address of port --- Documentation/devicetree/bindings/display/fsl,dcu.txt | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git

[PATCH v2 2/2] drm/fsl-dcu: update panel syntax to of_graph dt binding

add of_graph dt binding for panel, and "fsl,panel" property is deprecated Signed-off-by: Meng Yi --- Changes in V2: -dropp the unit address of port --- arch/arm/boot/dts/ls1021a-twr.dts | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git

DMA, CMA and SWIOTLB

Hi all, I am writing a very simple KMS driver that uses Xilinx VDMA to transfer data between the host and a FPGA. To handle memory allocation for DMA I am using the CMA helpers available in the DRM subsystem. When setting for low video modes (small memory requirements) everything works fine, but

[PATCH] drm/hisilicon: add select HISI_KIRIN_DW_DSI

Add select HISI_KIRIN_DW_DSI to Kconfig. The DRM driver depends on dsi sub-driver. Signed-off-by: Zoltan Kuscsik Signed-off-by: Xinliang Liu --- drivers/gpu/drm/hisilicon/kirin/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/hisilicon/kirin/Kconfig

[PATCH] drm/msm/mdp5: Remove "pipe < 0" check

From: David Binderman For usingned int pipe, pipe < 0 is always true. --- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c

[PATCH] drm/msm/mdp5: Remove "pipe < 0" check

From: David Binderman For usingned int pipe, pipe < 0 is always true. --- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c

[PATCH v4 03/11] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting

On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang wrote: > As vendor document indicate, when REF_CLK bit set 0, then DP > phy's REF_CLK should switch to 24M source clock. > > But due to IC PHY layout mistaken, some chips need to flip this > bit(like RK3288), and unfortunately they didn't indicate in

[PATCH v4 01/11] drm/rockchip: analogix_dp: split the lcdc select setting into device data

On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang wrote: > eDP controller need to declare which vop provide the video source, > and it's defined in GRF registers. > > But different chips have different GRF register address, so we need to > create a device data to declare the GRF messages for each

[PATCH v4 04/11] drm/rockchip: analogix_dp: add rk3399 eDP support

On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang wrote: > RK3399 and RK3288 shared the same eDP IP controller, only some light > difference with VOP configure and GRF configure. > > Signed-off-by: Yakir Yang > Acked-by: Mark Yao > Reviewed-by: Tomasz Figa Reviewed-by: Sean Paul > --- > Changes

[PATCH v4 05/11] drm/rockchip: analogix_dp: make panel detect to an optional action

On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang wrote: > Some boards don't need to declare a panel device node, like the > display interface is DP monitors, so it's necessary to make the > panel detect to an optional action. > > Signed-off-by: Yakir Yang > Acked-by: Mark Yao > Reviewed-by: Tomasz

[PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver

On Wed, Jun 29, 2016 at 5:14 AM, Yakir Yang wrote: > > RK3399 and RK3288 shared the same eDP IP controller, only some light > difference with VOP configure and GRF configure. > The whole set looks good to me. All patches should have my R-b now, thanks for the update. Sean > Also same misc

[PATCH v4 07/11] drm/rockchip: analogix_dp: correct the connector display color format and bpc

On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang wrote: > Rockchip VOP couldn't output YUV video format for eDP controller, so > when driver detect connector support YUV video format, we need to hack > it down to RGB888. > > Signed-off-by: Yakir Yang > Acked-by: Mark Yao > Reviewed-by: Tomasz Figa

[PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode

On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang wrote: > The hardware IC designed that VOP must output the RGB10 video format to > eDP contoller, and if eDP panel only support RGB8, then eDP contoller > should cut down the video data, not via VOP contoller, that's why we need > to hardcode the VOP

[Bug 96588] [regression] [amdgpu] Errors scheduling IBs

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Congrats AMD-Team! --- RX480 + Mesa-git + 4.7-rcX

Well done! Best wishes. Dieter

[PATCH] drm: mediatek: fix prototypes after API change

The newly added mediatek HDMI driver clashes with an API change for struct hdmi_codec_ops, causing an 'allmodconfig' build to fail: drivers/gpu/drm/mediatek/mtk_hdmi.c:1653:15: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types]

[Bug 13170] Macbook 5,2 only boots with acpi=off, or nosmp, or maxcpus=1

https://bugzilla.kernel.org/show_bug.cgi?id=13170 --- Comment #72 from morten vermund --- (In reply to Francisco from comment #63) > Hi, I've been following this bug for a while since I've a macbook 5,2. I've > been able to use linux (ubuntu) with refit+grub-efi+nvidia driver for a > while. Last

[pull] amdgpu drm-fixes-4.7

Hi Dave, Just a few more late fixes for Polaris cards. The following changes since commit 270d013659ddab52a6fd0eacae452c422d08aa39: drm/amd/powerplay: enable clock stretch feature for polaris (2016-06-21 10:22:42 -0400) are available in the git repository at:

[Bug 92248] [KBL/SKL/BYT/BXT] igt/kms_plane_scaling fail

: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160629/60c785d6/attachment-0001.html>

[Bug 96731] [RADEONSI] [LLVM] [bisected] GPU lockups when running Alien: Isolation

;https://lists.freedesktop.org/archives/dri-devel/attachments/20160629/9b2a837b/attachment.html>

[Bug 96602] [radeonsi] Dreamfall Chapters: one shader fails to compile, minor visual corruption

d time to address the outstanding comments on his patch. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160629/7aa9c32a/attachment.html>

[PATCH 0/2] drm/vmwgfx: Fix various black screen issues

This series is to address various unrecoverable black screen issues: after mode set or during initial installation. To work around these issues, we have to be conservative about which modes to make available. This approach may potentially cause a regression for advanced users who want

[PATCH 1/2] drm/vmwgfx: Work around mode set failure in 2D VMs

In a low-memory 2D VM, fbdev can take up a large percentage of available memory, making them unavailable for other DRM clients. Since we do not take fbdev into account when filtering modes, we end up claiming to support more modes than we actually do. The current mode filtering mechanism keys

[PATCH 2/2] drm/vmwgfx: Add an option to change assumed FB bpp

Offer an option for advanced users who want larger modes at 16bpp. This becomes necessary after the fix: "Work around mode set failure in 2D VMs." Without this patch, there would be no way for existing advanced users to get to a high res mode. Signed-off-by: Sinclair Yeh Reviewed-by: Thomas

[PATCH v3 1/2] drm/panel: simple: Add support for Sharp LQ101K1LY04

Thierry, David, Can these patches be pulled in? Do I need anything additional? the Documentation bit has been Acked by Rob Herring. On 06/01/2016 08:35 AM, Joshua Clayton wrote: > Trivial patch to add Sharp LQ101K1LY04i to simple-panel > > Support the Sharp LQ101K1LY04i, a 10 inch WXGA (1280x800)