From: Taniya Das
Add device tree bindings for display clock controller for Qualcomm
Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
Reviewed-by: Rob Herring
Signed-off-by: Sean Paul
---
.../devicetree/bindings/clock/qcom,dispcc.txt | 19
Hello again,
Well, here's the driver for QC SDM845 DPU support that I sent out in February,
this time without the RFC safety net. We've been busy since then, here's what
we've been up to!
We've seen 184 unique patches from 8 people sent to the list to prepare the
driver, here are the diffstat
From: Jeykumar Sankaran
Adds mdp transfer time to msm dsi binding
Signed-off-by: Jeykumar Sankaran
Signed-off-by: Rajesh Yadav
Signed-off-by: Sean Paul
---
.../devicetree/bindings/display/msm/dsi.txt | 16
1 file changed, 16 insertions(+)
diff --git
From: Chandan Uddaraju
For dual dsi mode, the horizontal timing needs
to be divided by half since both the dsi controllers
will be driving this panel. Adjust the pixel clock and
DSI timing accordingly.
Changes in V2:
--Removed Change-Id from the commit text tags.
Changes in V3:
--Instead of
From: Jeykumar Sankaran
Qualcomm Snapdragon chipsets uses compressed format
to optimize BW across multiple IP's. This change adds
needed modifier support in drm for a simple 4x4 tile
based compressed variants of base formats.
Signed-off-by: Jeykumar Sankaran
Signed-off-by: Sean Paul
---
From: Rajesh Yadav
postdiv_lock spinlock was used before initialization
for 10nm pll. It causes following spin_bug:
"BUG: spinlock bad magic on CPU#0".
Initialize spinlock before its usage.
Signed-off-by: Rajesh Yadav
Signed-off-by: Sean Paul
---
From: Chandan Uddaraju
Current DSI driver uses two connectors for dual DSI case even
though we only have one panel. Fix this by implementing one
connector/bridge for dual DSI use case. Use master DSI
controllers to register one connector/bridge.
Changes in V2:
-Removed Change-Id from the
From: Rajesh Yadav
SoCs having mdp5 or dpu have identical tree like
device hierarchy where MDSS top level wrapper manages
common power resources for all child devices.
Subclass msm_mdss so that msm_mdss includes common defines
and mdp5/dpu mdss derivations to include any extensions.
Add mdss
From: Jeykumar Sankaran
Enable drm core zpos normalization for planes.
changes in v2:
- none
changes in v3:
- rebased on https://gitlab.freedesktop.org/seanpaul/
dpu-staging/commit/481d29d31cd629fd216381b53de5695f645465d5
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean
DPU doesn't use this, so push it into the mdp drivers.
Signed-off-by: Sean Paul
Signed-off-by: Rajesh Yadav
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 2 ++
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 2 ++
drivers/gpu/drm/msm/msm_atomic.c | 2 --
3 files changed, 4 insertions(+), 2
From: Abhinav Kumar
Make the pclk_rate u64 to accommodate higher pixel clock
rates.
Changes in v4:
- fixed commit message
Signed-off-by: Abhinav Kumar
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
From: Jeykumar Sankaran
dpu uses these elsewhere in the driver (in addition to increasing
MAX_PLANES, that'll come later), so pull them out into #define.
Signed-off-by: Jeykumar Sankaran
[seanpaul pulled this out of the dpu megapatch]
Signed-off-by: Sean Paul
---
From: Jeykumar Sankaran
This simplifies cleanup, to make sure nothing drops out in case of
error.
Signed-off-by: Jeykumar Sankaran
[seanpaul split out of dpu megapatch and renamed labels]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 44 +--
1
I missed this during the atomic conversion
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 4
drivers/gpu/drm/msm/msm_drv.h | 1 -
2 files changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 9c760cee5156..b73acdd52931
From: Jeykumar Sankaran
Useful for incoming DPU support
Signed-off-by: Jeykumar Sankaran
[seanpaul split this from the dpu megapatch]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git
From: Jeykumar Sankaran
Called right before wait_for_commit_done() to perform kickoff for
active crtcs.
Signed-off-by: Jeykumar Sankaran
[seanpaul split this out of the megapatch]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_atomic.c | 5 +
drivers/gpu/drm/msm/msm_kms.h| 1 +
From: Jeykumar Sankaran
Used by the dpu driver for custom suspend/resume.
Signed-off-by: Jeykumar Sankaran
[seanpaul split this out of the megapatch]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 10 ++
drivers/gpu/drm/msm/msm_kms.h | 3 +++
2 files changed, 13
From: Jeykumar Sankaran
Adds bindings for Snapdragon 845 display processing unit
Signed-off-by: Jeykumar Sankaran
Signed-off-by: Rajesh Yadav
Signed-off-by: Sean Paul
---
.../devicetree/bindings/display/msm/dpu.txt | 128 ++
1 file changed, 128 insertions(+)
create mode
From: Jeykumar Sankaran
This is needed by the dpu driver
Signed-off-by: Jeykumar Sankaran
[seanpaul split from the dpu megapatch]
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_drv.c | 9 +
drivers/gpu/drm/msm/msm_kms.h | 1 +
2 files changed, 10 insertions(+)
diff --git
On Sat, Jul 07, 2018 at 08:32:16AM +0200, Hans de Goede wrote:
> Hi,
>
> On 07/06/2018 04:16 PM, Ville Syrjälä wrote:
> > On Tue, Jun 19, 2018 at 10:18:27PM +0200, Hans de Goede wrote:
> > > On BYT and CHT the GOP sometimes initializes the pclk at a (slightly)
> > > different frequency then the
Signed-off-by: Sean Paul
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 194 +++
1 file changed, 194 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index cdaabeb3c995..339afed856de 100644
---
Hi,
On 07/09/2018 07:37 PM, Rodrigo Vivi wrote:
On Sat, Jul 07, 2018 at 08:32:16AM +0200, Hans de Goede wrote:
Hi,
On 07/06/2018 04:16 PM, Ville Syrjälä wrote:
On Tue, Jun 19, 2018 at 10:18:27PM +0200, Hans de Goede wrote:
On BYT and CHT the GOP sometimes initializes the pclk at a
On Mon, Jul 9, 2018 at 6:12 PM, Mark Rutland wrote:
> On Mon, Jul 09, 2018 at 06:03:42PM +0200, Peter Zijlstra wrote:
>> On Mon, Jul 09, 2018 at 05:52:04PM +0200, Daniel Vetter wrote:
>> > for_each_something(foo)
>> > if (foo->bla)
>> > call_bla(foo);
>> > else
>> >
On Mon, Jul 9, 2018 at 11:40 AM Sean Paul wrote:
>
> Signed-off-by: Sean Paul
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 194 +++
> 1 file changed, 194 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>
https://bugs.freedesktop.org/show_bug.cgi?id=107153
--- Comment #5 from Patrik Kullman ---
For reference, they seem to reference the same line and is vanilla compared to
Ubuntu-kernels:
https://github.com/torvalds/linux/blob/v4.18-rc3/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c#L4784
On Sat, Jul 07, 2018 at 08:32:16AM +0200, Hans de Goede wrote:
> Hi,
>
> On 07/06/2018 04:16 PM, Ville Syrjälä wrote:
> > On Tue, Jun 19, 2018 at 10:18:27PM +0200, Hans de Goede wrote:
> >> On BYT and CHT the GOP sometimes initializes the pclk at a (slightly)
> >> different frequency then the
https://bugs.freedesktop.org/show_bug.cgi?id=107065
--- Comment #18 from Andrey Grodzovsky ---
(In reply to dwagner from comment #17)
> Interesting observation: If I first switch from the X11 display to the
> console display (with Alt-F2), and then enter "echo mem >/sys/power/state"
> on the
201 - 227 of 227 matches
Mail list logo