Quoting Tanmay Shah (2020-06-08 20:46:23)
> diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c
> b/drivers/gpu/drm/msm/dp/dp_catalog.c
> index d02f4eb..2b982f0 100644
> --- a/drivers/gpu/drm/msm/dp/dp_catalog.c
> +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c
> @@ -5,6 +5,7 @@
>
> #define pr_fmt(fmt)
Newer Tegra device-trees will specify a video output graph, which involves
LVDS encoder bridge. This patch adds support for the LVDS encoder bridge
to the RGB output, allowing us to model the display hardware properly.
Reviewed-by: Laurent Pinchart
Acked-by: Sam Ravnborg
Signed-off-by: Dmitry
The shared Memory Controller lock isn't needed since the time when
Memory Clock was made read-only. The lock could be removed safely now.
Hence let's remove it, this will help a tad to make further patches
cleaner.
Signed-off-by: Dmitry Osipenko
---
drivers/clk/tegra/clk-divider.c | 4 ++--
Utilize that relatively new helper which makes code a bit cleaner.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra20-emc.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/memory/tegra/tegra20-emc.c
b/drivers/memory/tegra/tegra20-emc.c
index
ping ?
On 2020/6/1 20:32, yu kuai wrote:
kfree() is called twice for the same variable 'bin', the first is
introduced in commit 0d352a3a8a1f ("drm/v3d: don't leak bin job if
v3d_job_init fails."), while the second is introduced in
commit 29cd13cfd762 ("drm/v3d: Fix memory leak in
* Tomi Valkeinen [200609 10:33]:
> Use suspend_late and resume_early callbacks in DSS submodules to force
> runtime PM suspend and resume.
>
> We use suspend_late callback so that omapdrm's system suspend callback
> is called first, as that will disable all the display outputs after
> which it's
Add interconnect properties to the memory controller, external memory
controller and the display controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra30.dtsi | 23 ++-
1 file changed, 22 insertions(+), 1
Hi Laurent,
On Sun, Jun 07, 2020 at 05:41:58AM +0300, Laurent Pinchart wrote:
> Note that the CMM driver is controlled by the DU driver. As the DU
> driver will reenable the display during resume, it will call
> rcar_du_cmm_setup() at resume time, which will reprogram the CMM. There
> should thus
Display controller (DC) performs isochronous memory transfers, and thus,
has a requirement for a minimum memory bandwidth that shall be fulfilled,
otherwise framebuffer data can't be fetched fast enough and this results
in a DC's data-FIFO underflow that follows by a visual corruption.
The Memory
Now memory controller is a memory interconnection provider. This allows us
to use interconnect API in order to change memory configuration.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/Kconfig | 1 +
drivers/memory/tegra/mc.c| 114 +++
The Tegra EMC driver now could be compiled as a loadable kernel module.
Currently devfreq driver depends on the EMC/MC drivers in Kconfig, and
thus, devfreq is forced to be a kernel module if EMC is compiled as a
module. This build dependency could be relaxed since devfreq driver
checks MC/EMC
-Credit-where-credit-is-due/20200610-041025
base: https://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git
exynos-drm-next
reproduce: make htmldocs
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
All warnings (new ones prefixed by >>
Atm, a pending delayed destroy work during module removal will be
canceled, leaving behind MST ports, mstbs. Fix this by using a dedicated
workqueue which will be drained of requeued items as well when
destroying it.
v2:
- Check if wq is NULL before calling destroy_workqueue().
Cc: Lyude Paul
On 6/10/20 6:25 AM, Thomas Hellström (Intel) wrote:
On 5/9/20 8:51 PM, Andrey Grodzovsky wrote:
This will allow to invalidate, destroy backing storage and notify users
of BOs when device is unpluged.
Signed-off-by: Andrey Grodzovsky
Please add a motivation in the commit message and use
Hi Matthias.
Thanks, a few details you need to fix. See below.
Sam
On Wed, Jun 10, 2020 at 02:01:30PM +0200, Matthias Schiffer wrote:
> From: Michael Krummsdorf
>
> Add support for the CDTech Electronics displays S070PWS19HP-FC21
> (7.0" WSVGA) and S070SWV29HG-DC44 (7.0" WVGA) to
On Wed, Jun 10, 2020 at 4:22 PM Tvrtko Ursulin
wrote:
>
>
> On 04/06/2020 09:12, Daniel Vetter wrote:
> > Design is similar to the lockdep annotations for workers, but with
> > some twists:
> >
> > - We use a read-lock for the execution/worker/completion side, so that
> >this explicit
On 6/10/20 3:54 PM, Andrey Grodzovsky wrote:
On 6/10/20 6:15 AM, Thomas Hellström (Intel) wrote:
On 6/9/20 7:21 PM, Koenig, Christian wrote:
Am 09.06.2020 18:37 schrieb "Grodzovsky, Andrey"
:
On 6/5/20 2:40 PM, Christian König wrote:
> Am 05.06.20 um 16:29 schrieb Andrey
On 04/06/2020 09:12, Daniel Vetter wrote:
Design is similar to the lockdep annotations for workers, but with
some twists:
- We use a read-lock for the execution/worker/completion side, so that
this explicit annotation can be more liberally sprinkled around.
With read locks lockdep isn't
On Tue, Jun 09, 2020 at 01:46:01PM +0100, Kieran Bingham wrote:
> The word 'descriptor' is misspelled throughout the tree.
>
> Fix it up accordingly:
> decriptors -> descriptors
>
> Signed-off-by: Kieran Bingham
Queued for 5.9, thanks for your patch.
-Daniel
> ---
>
On Wed, 10 Jun 2020 09:29:37 -0400
Sean Paul wrote:
> On Wed, Jun 10, 2020 at 3:57 AM Pekka Paalanen wrote:
> >
> > On Mon, 8 Jun 2020 17:05:03 -0400
> > Sean Paul wrote:
> >
> > > From: Sean Paul
> > >
> > > This patch adds a new module parameter called drm.trace which accepts
> > > the
efifb_probe() will issue an error message in case the kernel is booted
as Xen dom0 from UEFI as EFI_MEMMAP won't be set in this case. Avoid
that message by calling efi_mem_desc_lookup() only if EFI_PARAVIRT
isn't set.
Fixes: 38ac0287b7f4 ("fbdev/efifb: Honour UEFI memory map attributes when
Hi Matthias.
Thanks,
also a few details here to fix.
Sam
On Wed, Jun 10, 2020 at 02:01:31PM +0200, Matthias Schiffer wrote:
> From: Max Merchel
>
> Add support for the Tianma Micro-electronics TM070JVHG33 7.0" WXGA display
> to panel-simple.
>
> Signed-off-by: Max Merchel
>
On Tue, 9 Jun 2020 11:49:19 -0400
Sean Paul wrote:
> +/**
> + * drm_trace_printf - adds an entry to the drm tracefs instance
> + * @format: printf format of the message to add to the trace
> + *
> + * This function adds a new entry in the drm tracefs instance
> + */
> +void
On Wed, Jun 10, 2020 at 11:01 AM Steven Rostedt wrote:
>
> On Tue, 9 Jun 2020 11:49:19 -0400
> Sean Paul wrote:
>
> > +/**
> > + * drm_trace_printf - adds an entry to the drm tracefs instance
> > + * @format: printf format of the message to add to the trace
> > + *
> > + * This function adds a
On Wed, Jun 10, 2020 at 04:05:04PM +0200, Christian König wrote:
> Am 10.06.20 um 15:54 schrieb Andrey Grodzovsky:
> >
> >
> > On 6/10/20 6:15 AM, Thomas Hellström (Intel) wrote:
> > >
> > >
> > > On 6/9/20 7:21 PM, Koenig, Christian wrote:
> > > >
> > > >
> > > > Am 09.06.2020 18:37 schrieb
On 6/10/20 6:15 AM, Thomas Hellström (Intel) wrote:
On 6/9/20 7:21 PM, Koenig, Christian wrote:
Am 09.06.2020 18:37 schrieb "Grodzovsky, Andrey"
:
On 6/5/20 2:40 PM, Christian König wrote:
> Am 05.06.20 um 16:29 schrieb Andrey Grodzovsky:
>>
>> On 5/11/20 2:45 AM,
Am 10.06.20 um 15:54 schrieb Andrey Grodzovsky:
On 6/10/20 6:15 AM, Thomas Hellström (Intel) wrote:
On 6/9/20 7:21 PM, Koenig, Christian wrote:
Am 09.06.2020 18:37 schrieb "Grodzovsky, Andrey"
:
On 6/5/20 2:40 PM, Christian König wrote:
> Am 05.06.20 um 16:29 schrieb Andrey
On Wed, 10 Jun 2020 at 14:57, Arnd Bergmann wrote:
>
> On Wed, Jun 10, 2020 at 10:33 AM Sumit Semwal wrote:
> >
> > Charan Teja reported a 'use-after-free' in dmabuffs_dname [1], which
> > happens if the dma_buf_release() is called while the userspace is
> > accessing the dma_buf pseudo fs's
The current conversion ratio results in a higher frequency than needed,
that is not very actual now since the Display Controller driver got
support for memory bandwidth management and hence memory frequency can
go lower now without bad consequences. Since memory freq now goes to a
lower rates, the
On Sun, Jun 07, 2020 at 08:18:34PM +0200, Hans de Goede wrote:
> The pwm-crc code is using 2 different enable bits:
> 1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
> 2. bit 0 of the BACKLIGHT_EN register
>
> So far we've kept the PWM_OUTPUT_ENABLE bit set when disabling the PWM,
> this commit
Hello,
This series adds initial support for the DRM bridges to NVIDIA Tegra DRM
driver. This is required by newer device-trees where we model the LVDS
encoder bridge properly.
Changelog:
v6: - Added r-b and acks from Rob Herring and Sam Ravnborg.
- Rebased on a recent linux-next, patches
We're going to turn Tegra124 Memory Controller driver into a loadable
kernel module. The driver uses clk_hw_reparent(), which isn't an exported
kernel symbol. Let's export that function in order to allow modularization
of the Tegra driver.
Signed-off-by: Dmitry Osipenko
---
drivers/clk/clk.c |
Charan Teja reported a 'use-after-free' in dmabuffs_dname [1], which
happens if the dma_buf_release() is called while the userspace is
accessing the dma_buf pseudo fs's dmabuffs_dname() in another process,
and dma_buf_release() releases the dmabuf object when the last reference
to the struct file
On Wed, Jun 10, 2020 at 11:03:04AM +0300, Lisovskiy, Stanislav wrote:
> On Mon, Jun 08, 2020 at 12:25:21AM +0300, Imre Deak wrote:
> > During the initial MST probing an MST port's I2C device will be
> > registered using the kdev of the DRM device as a parent. Later after MST
> > Connection Status
On Wed, Jun 10, 2020 at 01:30:59PM +0200, Thierry Reding wrote:
> From: Thierry Reding
>
> As of commit 4dc55525b095 ("drm: plane: Verify that no or all planes
> have a zpos property") a warning is emitted if there's a mix of planes
> with and without a zpos property.
>
> On Tegra, cursor
On Wed, Jun 10, 2020 at 2:01 PM Thomas Hellström (Intel)
wrote:
>
> Hi, Daniel,
>
> Please see below.
>
> On 6/4/20 10:12 AM, Daniel Vetter wrote:
> > fs_reclaim_acquire/release nicely catch recursion issues when
> > allocating GFP_KERNEL memory against shrinkers (which gpu drivers tend
> > to
On Wed, Jun 10, 2020 at 3:57 AM Pekka Paalanen wrote:
>
> On Mon, 8 Jun 2020 17:05:03 -0400
> Sean Paul wrote:
>
> > From: Sean Paul
> >
> > This patch adds a new module parameter called drm.trace which accepts
> > the same mask as drm.debug. When a debug category is enabled, log
> > messages
Hi Andy,
On Tue, Jun 9, 2020 at 7:18 AM Andy Shevchenko
wrote:
>
> On Mon, Jun 08, 2020 at 11:48:51AM -0400, Jim Quinlan wrote:
> > On Sun, Jun 7, 2020 at 12:500f9bfe0fb8840b268af1bbcc51f1cd440514e PM
> > Andy Shevchenko wrote:
> > > On Fri, Jun 05, 2020 at 05:26:48PM -0400, Jim Quinlan wrote:
From: Colin Ian King
Currently the switch statement for format->cpp[0] value 4 assigns
color_index which is never read again and then falls through to the
default case and returns. This looks like a missing break statement
bug. Fix this by adding a break statement.
Addresses-Coverity: ("Unused
Hi Adrian,
thanks for the pach: tested on stm32mp1.
Tested-by: Yannick Fertré
On 6/9/20 7:49 PM, Adrian Ratiu wrote:
> According to the DSI Host Registers sections available in the IMX,
> STM and RK ref manuals for 1.01, 1.30 and 1.31, the register fields
> are smaller or bigger than what's
Hi Adrian,
thanks for the pach: tested on stm32mp1.
Tested-by: Yannick Fertré
On 6/9/20 7:49 PM, Adrian Ratiu wrote:
> According to the Host Registers documentation for IMX, STM and RK
> the LP cfg register should not be written entirely in one go because
> some bits are reserved and should be
On 6/4/20 10:12 AM, Daniel Vetter wrote:
Just some tiny edits:
- fix link to struct dma_fence
- give slightly more meaningful title - the polling here is about
implicit fences, explicit fences (in sync_file or drm_syncobj) also
have their own polling
Signed-off-by: Daniel Vetter
Hi Adrian,
thanks for the pach: tested on stm32mp1.
Tested-by: Yannick Fertré
On 6/9/20 7:49 PM, Adrian Ratiu wrote:
> The Synopsis MIPI DSI v1.01 host controller is quite widely used
> on platforms like i.mx6 and is not very different from the other
> versions like the 1.31/1.30 used on
On Wed, Jun 10, 2020 at 01:09:36PM +0300, Imre Deak wrote:
> On Wed, Jun 10, 2020 at 11:03:04AM +0300, Lisovskiy, Stanislav wrote:
> > On Mon, Jun 08, 2020 at 12:25:21AM +0300, Imre Deak wrote:
> > > During the initial MST probing an MST port's I2C device will be
> > > registered using the kdev of
Quoting Joonas Lahtinen (2020-06-10 12:37:00)
> Hi Dave & Daniel,
>
> Sending this one early for it to hopefully make it in before -rc1.
>
> Two important fixes: OOPS fix that was missing "Fixes:" tag and
> not picked up earlier. Also fix for a use-after-free in cmdparser.
>
> Additional fixup
Hi, Daniel,
Please see below.
On 6/4/20 10:12 AM, Daniel Vetter wrote:
fs_reclaim_acquire/release nicely catch recursion issues when
allocating GFP_KERNEL memory against shrinkers (which gpu drivers tend
to use to keep the excessive caches in check). For mmu notifier
recursions we do have
From: Thierry Reding
As of commit 4dc55525b095 ("drm: plane: Verify that no or all planes
have a zpos property") a warning is emitted if there's a mix of planes
with and without a zpos property.
On Tegra, cursor planes are always composited on top of all other
planes, which is why they never
On Mon, 08 Jun 2020, David Howells wrote:
> Jani Nikula wrote:
>
>> David, please try [1].
>
> Assuming you mean this:
>
> https://patchwork.freedesktop.org/patch/366958/?series=77635=1
>
> yes, that works.
>
> Tested-by: David Howells
Many thanks,
Jani.
--
Jani Nikula, Intel Open Source
Hi Adrian,
thanks for the pach: tested on stm32mp1.
Tested-by: Yannick Fertré
On 6/9/20 7:49 PM, Adrian Ratiu wrote:
> The DW mipi-dsi bind/unbind API was only used to attach the bridge to
> the encoder in the Rockchip driver, but with the addition of i.MX6 it
> gets more complicated because
Memory controller is interconnected with memory clients and with the
external memory controller. Document new interconnect property which
turns memory controller into interconnect provider.
Acked-by: Rob Herring
Signed-off-by: Dmitry Osipenko
---
* Tony Lindgren [200609 16:53]:
> * Tomi Valkeinen [200609 15:27]:
> > On 09/06/2020 18:19, Tony Lindgren wrote:
> > > Currently I'm only able to rmmod -f omapdrm, not sure if these issues
> > > might
> > > be related.
> >
> > Hmm, I always use modules, and can unload omapdrm and drm fine. But
On Mon, Jun 08, 2020 at 11:48:51AM -0400, Jim Quinlan wrote:
> On Sun, Jun 7, 2020 at 12:500f9bfe0fb8840b268af1bbcc51f1cd440514e PM
> Andy Shevchenko wrote:
> > On Fri, Jun 05, 2020 at 05:26:48PM -0400, Jim Quinlan wrote:
...
> > > + *map_size = (num_ranges + 1) * sizeof(**map);
> > > +
On Tue, Jun 09, 2020 at 03:44:18PM +0200, Hans de Goede wrote:
> On 6/9/20 1:32 PM, Andy Shevchenko wrote:
> > On Sun, Jun 07, 2020 at 08:18:35PM +0200, Hans de Goede wrote:
...
> > And again... :-(
>
> Well yes I cannot help it that the original code, as submitted by Intel,
> was of very
Quoting Tanmay Shah (2020-06-08 20:38:18)
> diff --git a/Documentation/devicetree/bindings/display/msm/dp-sc7180.yaml
> b/Documentation/devicetree/bindings/display/msm/dp-sc7180.yaml
> new file mode 100644
> index 000..5fdb915
> --- /dev/null
> +++
It's useful to know the total number of underflow events and currently
the debug stats are getting reset each time CRTC is being disabled. Let's
account the overall number of events that doesn't get reset.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/dc.c | 10 ++
Now memory controller is a memory interconnection provider. This allows us
to use interconnect API in order to change memory configuration.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra20-emc.c | 110 +
1 file changed, 110 insertions(+)
diff --git
Currently Tegra DRM driver manually manages display panel, but this
management could be moved out into DRM core if we'll wrap panel into
DRM bridge. This patch wraps RGB panel into a DRM bridge and removes
manual handling of the panel from the RGB output code.
Suggested-by: Laurent Pinchart
* Tomi Valkeinen [200609 15:38]:
> On 09/06/2020 18:12, Tony Lindgren wrote:
> > * Tomi Valkeinen [200609 10:33]:
> > > Use suspend_late and resume_early callbacks in DSS submodules to force
> > > runtime PM suspend and resume.
> > >
> > > We use suspend_late callback so that omapdrm's system
The clk_round_rate() won't be usable for building OPP table once
interconnect support will be added to the EMC driver because that CLK API
function limits the rounded rate based on the clk rate that is imposed by
active clk-users, and thus, the rounding won't work as expected if
interconnect will
Most of Host1x devices have at least one memory client. These clients
are directly connected to the memory controller. The new interconnect
properties represent the memory client's connection to the memory
controller.
Signed-off-by: Dmitry Osipenko
---
Hello,
This series brings initial support for memory interconnect to Tegra20 and
Tegra30 SoCs.
For the starter only display controllers are getting interconnect API
support, others could be supported later on. The display controllers
have the biggest demand for interconnect API right now because
> From: Bartlomiej Zolnierkiewicz
> Sent: Tuesday, June 9, 2020 6:44 AM
> To: Changming Liu
> Cc: linux-fb...@vger.kernel.org; dri-devel@lists.freedesktop.org; Lu, Long
> ; yaoh...@gmail.com
> Subject: Re: [Bug Report] drivers/video/fbdev/kyro/fbdev.c: unsigned
> integer wrap-around might cause
The clk_round_rate() won't be usable for building OPP table once
interconnect support will be added to the EMC driver because that CLK API
function limits the rounded rate based on the clk rate that is imposed by
active clk-users, and thus, the rounding won't work as expected if
interconnect will
The OF node should be put before returning error in tegra_output_probe(),
otherwise node's refcount will be leaked.
Reviewed-by: Laurent Pinchart
Reviewed-by: Sam Ravnborg
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/output.c | 9 -
1 file changed, 4 insertions(+), 5
On Sun, Jun 07, 2020 at 08:18:36PM +0200, Hans de Goede wrote:
> Implement the pwm_ops.get_state() method to complete the support for the
> new atomic PWM API.
This one is good.
Reviewed-by: Andy Shevchenko
> Signed-off-by: Hans de Goede
> ---
> drivers/pwm/pwm-crc.c | 29
Newer Tegra device-trees will specify a video output graph which involves
a bridge. This patch adds initial support for the DRM bridges to the Tegra
DRM output.
Acked-by: Sam Ravnborg
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/drm.h| 2 ++
drivers/gpu/drm/tegra/output.c | 12
* Tony Lindgren [200609 17:11]:
> I'm also seeing the rmmod omapdrm issue on am437x-sk-evm:
Oops sorry this is a user error. I've forgotten I need
to unbind the fb vtcon first :) thanks for hinting that
Tomi!
I can rmmod omapdrm just fine after doing:
# echo 0 >
* Tomi Valkeinen [200609 15:27]:
> On 09/06/2020 18:19, Tony Lindgren wrote:
> > Currently I'm only able to rmmod -f omapdrm, not sure if these issues might
> > be related.
>
> Hmm, I always use modules, and can unload omapdrm and drm fine. But there's
> a sequence that must be followed.
* Tomi Valkeinen [200609 16:27]:
> On 09/06/2020 19:10, Tony Lindgren wrote:
> > Yeah so it seems. Can we just diconnect the display outputs
> > in .prepare somewhere? Or is that the wrong place to do it?
>
> Hmm, yes, perhaps... If omapdrm uses .prepare to disable all the outputs.
> Then DSS
In some case, like a DRM display code for example, it's useful to silently
check whether port node exists at all in a device-tree before proceeding
with parsing the graph.
This patch adds of_graph_get_local_port() which returns pointer to a local
port node, or NULL if graph isn't specified in a
This patch adds modularization support to the Tegra20 EMC driver. Driver
now can be compiled as a loadable kernel module.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/Kconfig | 2 +-
drivers/memory/tegra/tegra20-emc.c | 17 -
2 files changed, 13 insertions(+),
EMC driver will become mandatory after turning it into interconnect
provider because interconnect users, like display controller driver, will
fail to probe using newer device-trees that have interconnect properties.
Thus make EMC driver to probe even if timings are missing in device-tree.
This patch adds modularization support to the Tegra30 EMC driver. Driver
now can be compiled as a loadable kernel module.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/Kconfig | 2 +-
drivers/memory/tegra/mc.c | 3 +++
drivers/memory/tegra/tegra30-emc.c | 17
On 6/9/20 7:21 PM, Koenig, Christian wrote:
Am 09.06.2020 18:37 schrieb "Grodzovsky, Andrey"
:
On 6/5/20 2:40 PM, Christian König wrote:
> Am 05.06.20 um 16:29 schrieb Andrey Grodzovsky:
>>
>> On 5/11/20 2:45 AM, Christian König wrote:
>>> Am 09.05.20 um 20:51 schrieb
On Mon, 8 Jun 2020 17:05:03 -0400
Sean Paul wrote:
> From: Sean Paul
>
> This patch adds a new module parameter called drm.trace which accepts
> the same mask as drm.debug. When a debug category is enabled, log
> messages will be put in a new tracefs instance called drm for
> consumption.
>
On Mon, Jun 08, 2020 at 12:25:22AM +0300, Imre Deak wrote:
> Atm, a pending delayed destroy work during module removal will be
> canceled, leaving behind MST ports, mstbs. Fix this by using a dedicated
> workqueue which will be drained of requeued items as well when
> destroying it.
>
Hi Dave & Daniel,
Sending this one early for it to hopefully make it in before -rc1.
Two important fixes: OOPS fix that was missing "Fixes:" tag and
not picked up earlier. Also fix for a use-after-free in cmdparser.
Additional fixup to module param types.
Regards, Joonas
***
On 5/9/20 8:51 PM, Andrey Grodzovsky wrote:
This will allow to invalidate, destroy backing storage and notify users
of BOs when device is unpluged.
Signed-off-by: Andrey Grodzovsky
Please add a motivation in the commit message and use imperative wording
("Allow to invalidate..." instead
On Mon, Jun 08, 2020 at 12:25:21AM +0300, Imre Deak wrote:
> During the initial MST probing an MST port's I2C device will be
> registered using the kdev of the DRM device as a parent. Later after MST
> Connection Status Notifications this I2C device will be re-registered
> with the kdev of the
On Wed, Jun 10, 2020 at 10:33 AM Sumit Semwal wrote:
>
> Charan Teja reported a 'use-after-free' in dmabuffs_dname [1], which
> happens if the dma_buf_release() is called while the userspace is
> accessing the dma_buf pseudo fs's dmabuffs_dname() in another process,
> and dma_buf_release()
Quoting Tanmay Shah (2020-06-08 20:40:47)
> From: Chandan Uddaraju
>
> The constant N value (0x8000) is used by i915 DP
> driver. Define this value in dp helper header file
> to use in multiple Display Port drivers. Change
> i915 driver accordingly.
>
> Change in v6: Change commit message
>
>
ti-sn65dsi86 bridge is enumerated as a runtime device. When
suspend is triggered, PM core adds a refcount on all the
devices and calls device suspend, since usage count is
already incremented, runtime suspend will not be called
and it kept the bridge regulators and gpios ON which resulted
in
Tegra EMC driver was turned into a regular kernel driver, it also could
be compiled as a loadable kernel module now. Hence EMC clock isn't
guaranteed to be available and clk_get("emc") may return -EPROBE_DEFER and
there is no good reason to spam KMSG with a error about missing EMC clock
in this
EMC driver will become mandatory after turning it into interconnect
provider because interconnect users, like display controller driver, will
fail to probe using newer device-trees that have interconnect properties.
Thus make EMC driver to probe even if timings are missing in device-tree.
This patch adds modularization support to the Tegra124 EMC driver. Driver
now can be compiled as a loadable kernel module.
Signed-off-by: Dmitry Osipenko
---
drivers/clk/tegra/clk-tegra124-emc.c | 63 +---
drivers/clk/tegra/clk-tegra124.c | 3 +-
Add interconnect properties to the memory controller, external memory
controller and the display controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi | 22 +-
1 file changed, 21 insertions(+), 1
Now external memory controller is a memory interconnection provider.
This allows us to use interconnect API to change memory configuration.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra30-emc.c | 110 +
1 file changed, 110 insertions(+)
diff --git
Tegra EMC driver was turned into a regular kernel driver, it also could
be compiled as a loadable kernel module now. Hence EMC clock isn't
guaranteed to be available and clk_get("emc") may return -EPROBE_DEFER and
there is no good reason to spam KMSG with a error about missing EMC clock
in this
The tegra_read_ram_code() is used by EMC drivers and we're going to make
these driver modular, hence this function needs to be exported.
Signed-off-by: Dmitry Osipenko
---
drivers/soc/tegra/fuse/tegra-apbmisc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
We're going to add interconnect support to the EMC driver. Once this
support will be added, the Tegra20 devfreq driver will no longer be
able to use clk_round_rate(emc) for building up OPP table. It's quite
handy that struct tegra_mc contains memory timings which could be used
by the devfreq
Each memory client have a unique hardware ID, this patch adds these IDs.
Acked-by: Rob Herring
Signed-off-by: Dmitry Osipenko
---
include/dt-bindings/memory/tegra30-mc.h | 67 +
1 file changed, 67 insertions(+)
diff --git a/include/dt-bindings/memory/tegra30-mc.h
From: Artur Świgoń
This patch relaxes the condition in of_icc_get_from_provider() so that it
is no longer required to set #interconnect-cells = <1> in the DT. In case
of the devfreq driver for exynos-bus, #interconnect-cells is always zero.
Signed-off-by: Artur Świgoń
[dig...@gmail.com: added
External memory controller is interconnected with memory controller and
with external memory. Document new interconnect property which turns
external memory controller into interconnect provider.
Acked-by: Rob Herring
Signed-off-by: Dmitry Osipenko
---
We're going to modularize Tegra EMC drivers and some of the EMC clk driver
symbols need to be exported, let's export them.
Signed-off-by: Dmitry Osipenko
---
drivers/clk/tegra/clk-tegra20-emc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/tegra/clk-tegra20-emc.c
* Tomi Valkeinen [200609 07:05]:
> On 03/06/2020 17:06, Tony Lindgren wrote:
> > * Tomi Valkeinen [200603 12:34]:
> > > Hi Tony,
> > >
> > > On 31/05/2020 22:39, Tony Lindgren wrote:
> > > > When booting without legacy platform data, we no longer have omap_device
> > > > calling PM runtime
The tegra20-devfreq driver provides memory frequency scaling functionality
and it uses EMC clock for the scaling. Since tegra20-devfreq is a software
driver, the device for the driver needs to be created manually. Let's do
it from EMC driver since it provides the clk rate-change functionality.
Each memory client have a unique hardware ID, this patch adds these IDs.
Acked-by: Rob Herring
Signed-off-by: Dmitry Osipenko
---
include/dt-bindings/memory/tegra20-mc.h | 53 +
1 file changed, 53 insertions(+)
diff --git a/include/dt-bindings/memory/tegra20-mc.h
It's useful to now when something goes wrong instead of failing silently,
so let's add error messages to tegra_devfreq_target() to prevent situation
where it fails silently.
Signed-off-by: Dmitry Osipenko
---
drivers/devfreq/tegra30-devfreq.c | 8 ++--
1 file changed, 6 insertions(+), 2
On Tue, Jun 9, 2020 at 5:48 AM Linus Walleij wrote:
>
> On Tue, May 5, 2020 at 10:27 AM Linus Walleij
> wrote:
> > On Wed, Apr 8, 2020 at 9:15 PM Arnd Bergmann wrote:
> >
> > > I ran into a randconfig link error with debugfs disabled:
> > >
> > > arm-linux-gnueabi-ld:
> > >
Utilize that relatively new helper which makes code a bit cleaner.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra124-emc.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/memory/tegra/tegra124-emc.c
b/drivers/memory/tegra/tegra124-emc.c
index
1 - 100 of 134 matches
Mail list logo
