https://bugzilla.kernel.org/show_bug.cgi?id=208333
--- Comment #7 from Roberto Guerrini (robyguerr...@yahoo.it) ---
in wayland the system works while in gnome it remains on the black screen
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On Sat, Jul 11, 2020 at 11:16:33AM -0700, Joe Perches wrote:
> On Sat, 2020-07-11 at 20:41 +0530, Suraj Upadhyay wrote:
> > On Fri, Jul 10, 2020 at 07:56:43PM +0200, Sam Ravnborg wrote:
> > > Hi Suraj.
> > >
> > > On Tue, Jul 07, 2020 at 10:04:14PM +0530, Suraj Upadhyay wrote:
> > > > This
On 2020/07/10 19:56, Greg Kroah-Hartman wrote:
> Where is the over/underflow happening here when we set a size to be so
> small? We should bound the size somewhere, and as you show, that's not
> really working properly, right?
It is bit_clear_margins() where integer underflow is happening
Some OPP tables specify voltage for each frequency. Devfreq can
handle these regulators but they should be get only 1 time to avoid
issue and know who is in charge.
If OPP table is probe don't init regulator.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
Am 10.07.20 um 19:35 schrieb Sam Ravnborg:
Hi Alexander.
Hi,
On Wed, Jul 08, 2020 at 06:38:47PM +0200, Alexander A. Klimov wrote:
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each
This isn't something that ever changes between planes, so move it to
dpu_caps struct. Making this change will allow more re-use in the
"SSPP sub blocks config" part of the catalog, in particular when adding
support for SM8150 and SM8250 which have different max_linewidth.
This also sets
I got a slab-out-of-bounds report when I doing fuzz test.
[ 334.989515]
==
[ 334.989577] BUG: KASAN: slab-out-of-bounds in vgacon_scroll+0x57a/0x8ed
[ 334.989588] Write of size 1766 at addr 8883de69ff3e by task test/2658
[
Check for errors instead of silently not using icc if the msm driver
probes before the interconnect driver.
Allow ENODATA for ocmem path, as it is optional and this error
is returned when "gfx-mem" path is provided but not "ocmem".
Because msm_gpu_cleanup assumes msm_gpu_init has been called,
Later we will introduce devfreq probing regulator if they
are present. As regulator should be probe only one time we
need to get this logic in the device_init().
panfrost_device is already taking care of devfreq_resume()
and devfreq_suspend(), so it's not totally illogic to move
the
On Mon, Jul 13, 2020 at 05:12:35PM +0300, Dan Carpenter wrote:
> On Mon, Jul 13, 2020 at 05:50:14PM +0530, Suraj Upadhyay wrote:
> > Simplify while loops into more readable and simple for loops.
> >
>
> I don't think either is more clear that the other. Walter Harms hates
> count down loops and
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 3f7ceeb1a767..14257f7476b8 100644
Hi,
On Fri, 10 Jul 2020 at 11:25, Clément Péron wrote:
>
> Introduce a proper panfrost_devfreq to deal with devfreq variables.
>
> Reviewed-by: Steven Price
> Reviewed-by: Alyssa Rosenzweig
> Signed-off-by: Clément Péron
> ---
> drivers/gpu/drm/panfrost/panfrost_devfreq.c | 76
Don't include not required headers and sort them.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git
Devfreq cooling device framework is used in Panfrost
to throttle GPU in order to regulate its temperature.
Enable this driver for ARM64 SoC.
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
Add a simple cooling map for the GPU.
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 22
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
Rename goto labels in device_init it will be easier to maintain.
Reviewed-by: Alyssa Rosenzweig
Reviewed-by: Steven Price
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_device.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git
This driver is tested with two panels individually with Apq8016-IFC6309 board
https://www.inforcecomputing.com/products/single-board-computers-sbc/qualcomm-snapdragon-410-inforce-6309-micro-sbc
1. 1366x768@60 auo,b101xtn01 data-mapping = "jeida-24"
2. 800x480@60 innolux,at070tn92 data-mapping =
All DPU versions starting from 4.0 use the sdm845 version, so check for
that instead of checking each version individually. This chooses the right
function for sm8150 and sm8250.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 5 ++---
1 file changed, 2
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 3f7ceeb1a767..14257f7476b8 100644
Devfreq cooling device framework is used in Panfrost
to throttle GPU in order to regulate its temperature.
Enable this driver for ARM64 SoC.
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
Add a simple cooling map for the GPU.
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 22
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
On Fri, 2020-07-10 at 19:32 +0200, Sam Ravnborg wrote:
> On Thu, Jul 09, 2020 at 10:02:36AM +0800, Liu Ying wrote:
> > It doesn't hurt to add the bridge in the global bridge list also
> > for
> > platform specific dw-hdmi drivers which are based on the component
> > framework. This can be
This will allow supporting different hwcg tables for a6xx.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 25 ++
drivers/gpu/drm/msm/adreno/adreno_device.c | 1 +
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 8 +++
3 files changed, 20
Calculate the correct timings for displayport, from downstream driver.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
This fixes flushing of INTF_2 and INTF_3 on SM8150 and SM8250 hardware.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 20 ++--
1 file changed, 2 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
The INTF_INPUT_CTRL feature is not available on sdm845, so don't set it.
This also adds separate feature bits for INTF (based on downstream) instead
of using CTL feature bit for it, and removes the unnecessary NULL check in
the added bind_pingpong_blk function.
Fixes:
Introduce a boolean to know if opp table has been added.
With this, we can call panfrost_devfreq_fini() in case of error
and release what has been initialised.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
This declaration can be avoided so change it.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 38 ++---
1 file changed, 18 insertions(+), 20 deletions(-)
diff --git
This use devfreq variable that will be lock with spinlock in future
patches. We should either introduce a function to access this one
but as devfreq is optional let's just remove it.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
Add an Operating Performance Points table for the GPU to
enable Dynamic Voltage & Frequency Scaling on the H6.
The voltage range is set with minival voltage set to the target
and the maximal voltage set to 1.2V. This allow DVFS framework to
work properly on board with fixed regulator.
On 2020/07/11 15:16, Tetsuo Handa wrote:
> On 2020/07/10 19:56, Greg Kroah-Hartman wrote:
>> Where is the over/underflow happening here when we set a size to be so
>> small? We should bound the size somewhere, and as you show, that's not
>> really working properly, right?
>
> It is
Don't include not required headers and sort them.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git
Add an Operating Performance Points table for the GPU to
enable Dynamic Voltage & Frequency Scaling on the H6.
The voltage range is set with minival voltage set to the target
and the maximal voltage set to 1.2V. This allow DVFS framework to
work properly on board with fixed regulator.
Initialize hardware clock-gating registers on A640 and A650 GPUs.
At least for A650, this solves some performance issues.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/a6xx.xml.h | 8 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 117 -
PTR_ERR should access the value just tested by IS_ERR, so fix
the variable used in PTR_ERR().
Signed-off-by: Xu Wang
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c
Later we will introduce devfreq probing regulator if they
are present. As regulator should be probe only one time we
need to get this logic in the device_init().
panfrost_device is already taking care of devfreq_resume()
and devfreq_suspend(), so it's not totally illogic to move
the
These patches bring up SM8150 and SM8250 with basic functionality.
Tested with displayport output (single mixer, video mode case).
v2: rebased
Jonathan Marek (8):
drm/msm/dpu: use right setup_blend_config for sm8150 and sm8250
drm/msm/dpu: update UBWC config for sm8150 and sm8250
On Tue, Jul 07, 2020 at 11:04:07AM -0700, Randy Dunlap wrote:
> Drop the doubled word "to".
>
> Signed-off-by: Randy Dunlap
> Cc: Jonathan Corbet
> Cc: linux-...@vger.kernel.org
> Cc: Paul Cercueil
> Cc: Thomas Bogendoerfer
> Cc: linux-m...@vger.kernel.org
> ---
>
Check for errors instead of silently not using icc if the msm driver
probes before the interconnect driver.
Allow ENODATA for ocmem path, as it is optional and this error
is returned when "gfx-mem" path is provided but not "ocmem".
Because msm_gpu_cleanup assumes msm_gpu_init has been called,
On 2020-07-10 22:19, Rob Clark wrote:
On Thu, Jun 25, 2020 at 5:46 AM Kalyan Thota
wrote:
Setup an RGB HW pipe as cursor which can be used on
secondary interface.
For SC7180 2 HW pipes are enumerated as cursors
1 - primary interface
2 - secondary interface
Signed-off-by: Kalyan Thota
---
This brings up basic video mode functionality for SM8150 DPU. Command mode
and dual mixer/intf configurations are not working, future patches will
address this. Scaler functionality and multiple planes is also untested.
Signed-off-by: Jonathan Marek
---
On Mon, Jul 13, 2020 at 8:11 AM Rob Herring wrote:
>
> On Fri, Jul 10, 2020 at 5:02 PM Douglas Anderson
> wrote:
> >
> > I found that if I ever had a little mistake in my kernel config,
> > or device tree, or graphics driver that my system would sit in a loop
> > at bootup trying again and
Update the UBWC registers to the right values for sm8150 and sm8250.
This removes broken dpu_hw_reset_ubwc, which doesn't work because the
"force blk offset to zero to access beginning of register region" hack is
copied from downstream, where mapped region starts 0x1000 below what is
used in the
Hi,
This serie cleans and adds regulator support to Panfrost devfreq.
This is mostly based on comment for the freshly introduced lima
devfreq.
We need to add regulator support because on Allwinner the GPU OPP
table defines both frequencies and voltages.
First patches [01-07] should not change
On Fri, Jul 10, 2020 at 07:56:43PM +0200, Sam Ravnborg wrote:
> Hi Suraj.
>
> On Tue, Jul 07, 2020 at 10:04:14PM +0530, Suraj Upadhyay wrote:
> >
> > This patchset converts logging to drm_* functions in drm core.
> >
> > The following functions have been converted to their respective
> > DRM
This brings up basic video mode functionality for SM8250 DPU. Command mode
and dual mixer/intf configurations are not working, future patches will
address this. Scaler functionality and multiple planes is also untested.
Signed-off-by: Jonathan Marek
---
On 2020-07-10 22:38, Rob Clark wrote:
On Thu, Jun 18, 2020 at 7:09 AM Kalyan Thota
wrote:
This change adds support to scale src clk and bandwidth as
per composition requirements.
Interconnect registration for bw has been moved to mdp
device node from mdss to facilitate the scaling.
Changes
Introduce a proper panfrost_devfreq to deal with devfreq variables.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 76 -
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 20 +-
- license modified to (GPL-2.0-only OR BSD-2-Clause)
- single-link and dual-link lvds description and
examples are added
- proper indentation
- VESA/JEIDA formats picked from panel-lvds dts
- dsi data-lanes property removed, it will be picked
from dsi0 ports
- dual-link lvds port added and
On Tue, 2020-07-07 at 11:04 -0700, Randy Dunlap wrote:
> Drop the doubled word "in".
>
> Signed-off-by: Randy Dunlap
Reviewed-by: Mimi Zohar
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
Hi,
On Fri, 10 Jul 2020 at 15:45, Piotr Oniszczuk wrote:
>
>
>
> > Wiadomość napisana przez Clément Péron w dniu
> > 09.07.2020, o godz. 16:03:
> >
> > Add an Operating Performance Points table for the GPU to
> > enable Dynamic Voltage & Frequency Scaling on the H6.
> >
> > The voltage range
These never get set back to 0 when probing fails, so an attempt to probe
again results in broken behavior. Fix the problem by setting thse to zero
before they are used.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/msm_gpu.c | 4
1 file changed, 4 insertions(+)
diff --git
On Fri, Jul 10, 2020 at 03:01:10PM +0200, Christian König wrote:
> Am 10.07.20 um 14:54 schrieb Jason Gunthorpe:
> > On Fri, Jul 10, 2020 at 02:48:16PM +0200, Christian König wrote:
> > > Am 10.07.20 um 14:43 schrieb Jason Gunthorpe:
> > > > On Thu, Jul 09, 2020 at 10:09:11AM +0200, Daniel Vetter
On 7/9/20 11:15 AM, Rob Clark wrote:
On Thu, Jul 9, 2020 at 7:35 AM Jonathan Marek wrote:
Check for errors instead of silently not using icc if the msm driver
probes before the interconnect driver.
Allow ENODATA for ocmem path, as it is optional and this error
is returned when "gfx-mem" path
We will later introduce regulators managed by OPP.
Only alloc regulators when it's needed. This also help use
to release the regulators only when they are allocated.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
I got a UAF report in do_update_region() when I doing fuzz test.
[ 51.161905] BUG: KASAN: use-after-free in do_update_region+0x579/0x600
[ 51.161918] Read of size 2 at addr 88800010 by task test/295
[ 51.161957] CPU: 2 PID: 295 Comm: test Not tainted 5.7.0+ #975
[ 51.161969]
adreno_gpu_init calls pm_runtime_enable, so adreno_gpu_cleanup needs to
call pm_runtime_disable.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
On Thu, Jul 09, 2020 at 10:09:11AM +0200, Daniel Vetter wrote:
> Hi Jason,
>
> Below the paragraph I've added after our discussions around dma-fences
> outside of drivers/gpu. Good enough for an ack on this, or want something
> changed?
>
> Thanks, Daniel
>
> > + * Note that only GPU drivers
On Fri, Jul 10, 2020 at 04:02:35PM +0200, Daniel Vetter wrote:
> > dma_fence only possibly makes some sense if you intend to expose the
> > completion outside a single driver.
> >
> > The prefered kernel design pattern for this is to connect things with
> > a function callback.
> >
> > So the
Introduce a boolean to know if opp table has been added.
With this, we can call panfrost_devfreq_fini() in case of error
and release what has been initialised.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
Rename goto labels in device_init it will be easier to maintain.
Reviewed-by: Alyssa Rosenzweig
Reviewed-by: Steven Price
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_device.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git
On 7/13/20 11:24 AM, Georgi Djakov wrote:
On 7/1/20 07:25, Jonathan Marek wrote:
The a6xx GMU can vote for ddr and cnoc bandwidth, but it needs to be able
to query the interconnect driver for bcm addresses and commands.
It's not very clear to me how the GMU firmware would be dealing with
Check for errors instead of silently not using icc if the msm driver
probes before the interconnect driver.
Allow ENODATA for ocmem path, as it is optional and this error
is returned when "gfx-mem" path is provided but not "ocmem".
Because msm_gpu_cleanup assumes msm_gpu_init has been called,
On Tue, Jul 14, 2020 at 02:41:37PM +0900, Benjamin Poirier wrote:
> On 2020-07-13 17:50 +0530, Suraj Upadhyay wrote:
> > Simplify while loops into more readable and simple for loops.
> >
> > Signed-off-by: Suraj Upadhyay
> > ---
> [...]
> > @@ -1824,7 +1821,7 @@ static struct sk_buff
On 7/1/20 07:25, Jonathan Marek wrote:
> The a6xx GMU can vote for ddr and cnoc bandwidth, but it needs to be able
> to query the interconnect driver for bcm addresses and commands.
It's not very clear to me how the GMU firmware would be dealing with this? Does
anyone have an idea whether the GMU
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
From: Chen-Yu Tsai
Hi everyone,
This series add support for MSI's Primo73 tablet. This is a 7" tablet
based on Allwinner's A20 SoC.
The tablet uses some unknown LCD panel, with only serial number
markings, and what appears to be a part number. Searching the Internet
for said part number
From: Chen-Yu Tsai
Now that the device tree binding for panel-dpi has the "bits-per-color"
property, parse its value and set bpc in the panel description to the
given value. This would allow encoders to detect less-than-8-bits color
depth and employ color dithering if possible.
Signed-off-by:
From: Chen-Yu Tsai
Some LCD panels do not support 24-bit true color, or 8bits per channel
RGB. Many low end ones only support up to 6 bits per channel natively.
Add a device tree property to describe the native bit depth of the
panel. This is separate from the bus width or format of the
From: Chen-Yu Tsai
Document board compatible name for MSI Primo73 tablet.
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml
From: Chen-Yu Tsai
The Primo73 is an MSI branded Allwinner A20-based 7-inch tablet. It has
a metal back case with a plastic insert around where the WiFi antenna is.
The tablet is (as of July of 2020) no longer available from retailers.
Kernel sources (as required by GPL) are no longer available
From: Chen-Yu Tsai
In some designs, the full 24 bits of RGB plus the control / sync signals
for the LCD panel are used.
Add a pinmux option for this.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun7i-a20.dtsi | 12
1 file changed, 12 insertions(+)
diff --git
[ Please Cc: fbdev Maintainer (happens to be me :) on fbdev patches, thanks. ]
Hi,
On 7/12/20 1:10 PM, Tetsuo Handa wrote:
> I found that
>
> const int fd = open("/dev/fb0", O_ACCMODE);
> struct fb_var_screeninfo var = { };
> ioctl(fd, FBIOGET_VSCREENINFO, );
> var.xres = var.yres =
https://bugzilla.kernel.org/show_bug.cgi?id=208539
Bug ID: 208539
Summary: Warning at drm_mod_object_add on when display is
re-enabled (after display off)
Product: Drivers
Version: 2.5
Kernel Version: 5.8.0-rc5
Hi
Am 10.07.20 um 10:24 schrieb butt3rflyh4ck:
> I report a bug (in linux-5.8.0-rc4) found by syzkaller.
>
> kernel config:
> https://github.com/butterflyhack/syzkaller-fuzz/blob/master/v5.8.0-rc4.config
>
> I test the reproducer and crash too.
>
> In the drm_em_vram_t() function,
Hi
Am 13.07.20 um 18:21 schrieb Daniel Vetter:
> On Fri, Jul 10, 2020 at 08:28:16AM +0200, Thomas Zimmermann wrote:
>> Hi
>>
>> Am 09.07.20 um 21:30 schrieb Sam Ravnborg:
>>> Mark reported that sparc64 would panic while booting using qemu.
>>> Mark bisected this to a patch that introduced generic
Am 2020-07-14 um 1:05 a.m. schrieb Li, Dennis:
> [AMD Official Use Only - Internal Distribution Only]
>
> Hi, Felix,
> amdgpu_gem_prime_export has different define in the old driver. I added
> some comment in the below codes.
>
> Best Regards
> Dennis Li
> -Original Message-
>
Introduce a proper panfrost_devfreq to deal with devfreq variables.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 76 -
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 20 +-
On Fri, Jul 10, 2020 at 02:48:16PM +0200, Christian König wrote:
> Am 10.07.20 um 14:43 schrieb Jason Gunthorpe:
> > On Thu, Jul 09, 2020 at 10:09:11AM +0200, Daniel Vetter wrote:
> > > Hi Jason,
> > >
> > > Below the paragraph I've added after our discussions around dma-fences
> > > outside of
Hi,
This serie cleans and adds regulator support to Panfrost devfreq.
This is mostly based on comment for the freshly introduced lima
devfreq.
We need to add regulator support because on Allwinner the GPU OPP
table defines both frequencies and voltages.
First patches [01-07] should not change
I report a bug (in linux-5.8.0-rc4) found by syzkaller.
kernel config:
https://github.com/butterflyhack/syzkaller-fuzz/blob/master/v5.8.0-rc4.config
I test the reproducer and crash too.
In the drm_em_vram_t() function, ttm_bo_init() function call
ttm_bo_init_reserved(),
the
MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema
for the device tree bindings for the same.
Signed-off-by: Krishna Manikandan
Changes in v2:
- Changed dpu to DPU (Sam Ravnborg)
- Fixed indentation issues (Sam
> On Jun 30, 2020, at 16:37, Kai-Heng Feng wrote:
>
>
>> On Jun 10, 2020, at 15:55, Kai-Heng Feng wrote:
>>
>> On HP 800 G4 DM, if HDMI cable isn't plugged before boot, the HDMI port
>> becomes useless and never responds to cable hotplugging:
>> [3.031904] [drm:lspcon_init [i915]]
syzbot is reporting general protection fault in do_con_write() [1] caused
by vc->vc_screenbuf == ZERO_SIZE_PTR caused by vc->vc_screenbuf_size == 0
caused by vc->vc_cols == vc->vc_rows == vc->vc_size_row == 0 caused by
fb_set_var() from ioctl(FBIOPUT_VSCREENINFO) on /dev/fb0 , for
gotoxy(vc, 0, 0)
This declaration can be avoided so change it.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 38 ++---
1 file changed, 18 insertions(+), 20 deletions(-)
diff --git
> Wiadomość napisana przez Clément Péron w dniu
> 09.07.2020, o godz. 16:03:
>
> Add an Operating Performance Points table for the GPU to
> enable Dynamic Voltage & Frequency Scaling on the H6.
>
> The voltage range is set with minival voltage set to the target
> and the maximal voltage set
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
I found that
const int fd = open("/dev/fb0", O_ACCMODE);
struct fb_var_screeninfo var = { };
ioctl(fd, FBIOGET_VSCREENINFO, );
var.xres = var.yres = 1;
ioctl(fd, FBIOPUT_VSCREENINFO, );
causes general protection fault in bitfill_aligned(), for vc_do_resize()
updates vc->vc_{cols,rows}
On 7/10/20 9:47 AM, Doug Anderson wrote:
> Hi,
>
>
> But should I continue on this path,
> It's probably worth getting dithering working on your sdm845 anyway in
> case anyone actually does put a 6bpp panel on this SoC.
>
>
>> or should we be finding others who
>> have an N61 and see what their
This use devfreq variable that will be lock with spinlock in future
patches. We should either introduce a function to access this one
but as devfreq is optional let's just remove it.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
On 7/3/20 4:41 PM, Samuel Iglesias Gonsálvez wrote:
> Hi,
>
> In the last meeting, X.Org Foundation board has decided that XDC 2020
> will be a virtual conference, given the uncertain COVID-19 situation in
> Europe by September, including the possibility of a second wave,
> outbreaks and travel
Convert busy_count to a simple int protected by spinlock.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 43 +++--
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 9 -
2 files changed,
smtcfb_pci_probe() does not handle ioremap() errors for case 0x720. The
patch fixes that exactly like for case 0x710/2.
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Evgeny Novikov
---
drivers/video/fbdev/sm712fb.c | 8
1 file changed, 8 insertions(+)
BUG: KASAN: use-after-free in drm_gem_open_ioctl
There is potential for use-after-free here if the GEM object
handle is closed between the idr lookup and retrieving the size
from the object since a local reference is not being held at that
point. Hold the local reference while the object can
On Sun, Jul 12, 2020 at 12:07:45PM -0700, Joe Perches wrote:
> On Mon, 2020-07-13 at 00:24 +0530, Suraj Upadhyay wrote:
> > On Sat, Jul 11, 2020 at 11:16:33AM -0700, Joe Perches wrote:
> []
> > > Perhaps change the __drm_printk macro to not
> > > dereference the drm argument when NULL.
> > >
> >
Some OPP tables specify voltage for each frequency. Devfreq can
handle these regulators but they should be get only 1 time to avoid
issue and know who is in charge.
If OPP table is probe don't init regulator.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
Convert busy_count to a simple int protected by spinlock.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 43 +++--
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 9 -
2 files changed,
We will later introduce regulators managed by OPP.
Only alloc regulators when it's needed. This also help use
to release the regulators only when they are allocated.
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
Signed-off-by: Clément Péron
---
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On 7/10/20 4:22 PM, Juergen Gross wrote:
> efifb_probe() will issue an error message in case the kernel is booted
> as Xen dom0 from UEFI as EFI_MEMMAP won't be set in this case. Avoid
> that message by calling efi_mem_desc_lookup() only if EFI_MEMMAP is set.
>
> Fixes: 38ac0287b7f4
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