Hi Anitha,
On Mon, Aug 02, 2021 at 08:44:26PM +, Chrisanthus, Anitha wrote:
> Hi Sam,
> Thanks. Where should this go, drm-misc-fixes or drm-misc-next?
Looks like a drm-misc-next candidate to me.
I may improve something for existing users, but it does not look like it
fixes an existing bug.
Hi Rob,
On Mon, Aug 02, 2021 at 04:37:38PM -0600, Rob Herring wrote:
> On Wed, Jul 28, 2021 at 07:26:39PM +0300, Laurent Pinchart wrote:
> > The R-Car MIPI DSI/CSI-2 TX is embedded in the Renesas R-Car V3U SoC. It
> > can operate in either DSI or CSI-2 mode, with up to four data lanes.
> >
> >
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index f8cb00ffb506..a685d563df72 100644
---
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index da57d18d9f6b..fc2fc8d111d8 100644
---
From: Venkata Sandeep Dhanalakota
Defining vma on stack can cause stack overflow, if
vma gets populated with new fields.
Cc: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
Signed-off-by: Venkata Sandeep Dhanalakota
Signef-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 18
Minimum set of patches to enable GuC submission on DG1 and enable it by
default.
A little difficult to test as IGTs do not work with DG1 due to a bunch
of uAPI features being disabled (e.g. relocations, caching memory
options, etc...).
Tested with the loading the driver and 'live' selftests.
From: Daniele Ceraolo Spurio
The firmware binary has to be loaded from lmem and the recommendation is
to put all other objects in there as well. Note that we don't fall back
to system memory if the allocation in lmem fails because all objects are
allocated during driver load and if we have
Hi Enric,
On Fri, 2021-07-30 at 13:41 +0200, Enric Balletbo i Serra wrote:
> Hi Jason,
>
> Thank you for your patch.
>
> On 29/7/21 19:07, jason-jh.lin wrote:
> > Add mt8195 vdosys0 clock driver name and routing table to
> > the driver data of mtk-mmsys.
> >
>
> This patch is the one that is
Hi Enric,
On Fri, 2021-07-30 at 13:45 +0200, Enric Balletbo i Serra wrote:
> Hi Jason,
>
> Thank you for your patch.
>
> On 29/7/21 19:07, jason-jh.lin wrote:
> > The hardware path of vdosys0 with eDP panel output need to go
> > through
> > by several modules, such as, OVL, RDMA, COLOR, CCORR,
On Thu, Jul 22, 2021 at 12:07 PM Hridya Valsaraju wrote:
> This patch limits the size of total memory that can be requested in a
> single allocation from the system heap. This would prevent a
> buggy/malicious client from depleting system memory by requesting for an
> extremely large allocation
On Mon, Aug 2, 2021 at 8:14 AM Will Deacon wrote:
>
> On Mon, Aug 02, 2021 at 08:08:07AM -0700, Rob Clark wrote:
> > On Mon, Aug 2, 2021 at 3:55 AM Will Deacon wrote:
> > >
> > > On Thu, Jul 29, 2021 at 10:08:22AM +0530, Sai Prakash Ranjan wrote:
> > > > On 2021-07-28 19:30, Georgi Djakov wrote:
在 2021-08-02星期一的 17:08 +0200，Thomas Zimmermann写道：
> Hi
>
> Am 02.08.21 um 08:35 schrieb Icenowy Zheng:
> > Add a driver for generic MIPI DBI panels initialized with MIPI DCS
> > commands.
> >
> > Currently a ST7789V-based panel is added to it. This panel has its
> > configuration pre-programmed
On 2021-07-14 23:52, Vinod Koul wrote:
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Signed-off-by: Vinod Koul
based on the comments on prev patches in the series, this will need to
be reworked
On 2021-07-14 23:52, Vinod Koul wrote:
When DSC is enabled, we need to configure DSI registers accordingly and
configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and
timing information and configure these registers.
On 2021-07-14 23:52, Vinod Koul wrote:
For DSC to work we typically need a 2,2,1 configuration. This should
suffice for resolutions upto 4k. For more resolutions like 8k this
won't
work.
The topology information is provided by DTS so we try to deduce the
topology required for DSC.
On 2021-07-14 23:52, Vinod Koul wrote:
When DSC is enabled in DT, we need to configure the encoder for DSC
configuration, calculate DSC parameters for the given timing.
This patch adds that support by adding dpu_encoder_prep_dsc() which is
invoked when DSC is enabled in DT
correct me if wrong
, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Daniel-Vetter/remove-rcu-support-from-i915_address_space/20210802-234929
base: git://anongit.freedesktop.org/drm
On 2021-07-14 23:51, Vinod Koul wrote:
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc_mode() to detect dsc
enabled and pass this to .setup_intf_cfg()
This
On 2021-07-14 23:51, Vinod Koul wrote:
Later gens of hardware have DSC bits moved to hw_ctl, so configure
these
bits so that DSC would work there as well
Signed-off-by: Vinod Koul
Please correct me if wrong but here you seem to be flushing all the DSC
bits
even the unused ones. This will
On 2021-07-14 23:51, Vinod Koul wrote:
This add SDM845 DSC blocks into hw_catalog
/add --> adds
Signed-off-by: Vinod Koul
---
Changes since RFC:
- use BIT values from MASK
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 22 +++
1 file changed, 22 insertions(+)
diff --git
On 2021-07-14 23:51, Vinod Koul wrote:
This add the bits in RM to enable the DSC blocks
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 32 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 +
3 files
Hi, Enric:
Enric Balletbo i Serra 於 2021年7月14日 週三 下午6:12寫道：
>
> Reset dsi0 HW to default when power on. This prevents to have different
> settingbetween the bootloader and the kernel.
>
> As not all Mediatek boards have the reset consumer configured in their
> board description, also is not
Hi, Yongqiang:
Yongqiang Niu 於 2021年8月2日 週一 下午3:11寫道：
>
> In cmdq mode, packet may be flushed before it is executed, so
> the pending flag should be cleared after cmdq packet is done.
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 51
>
On 2021-07-14 23:51, Vinod Koul wrote:
In SDM845, DSC can be enabled by writing to pingpong block registers,
so
add support for DSC in hw_pp
Signed-off-by: Vinod Koul
Reviewed-by: Abhinav Kumar
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
On 2021-07-14 23:51, Vinod Koul wrote:
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Signed-off-by: Vinod Koul
---
Changes since RFC:
- Drop unused enums
drivers/gpu/drm/msm/Makefile | 1 +
Hi, Yongqiang:
Yongqiang Niu 於 2021年7月20日 週二 下午2:30寫道：
>
> dither 6 setting is missed in a6b7c98afdca
> bit 1 is lfsr_en( "Enables LFSR-type dithering"), need enable
> bit 2 is rdither_en(Enables running order dithering), need disable
>
> Fixes: a6b7c98afdca(drm/mediatek: add
On 2021-07-14 23:51, Vinod Koul wrote:
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
---
Changes since RFC:
- Drop
On Wed, Jul 28, 2021 at 07:26:39PM +0300, Laurent Pinchart wrote:
> The R-Car MIPI DSI/CSI-2 TX is embedded in the Renesas R-Car V3U SoC. It
> can operate in either DSI or CSI-2 mode, with up to four data lanes.
>
> Signed-off-by: Laurent Pinchart
> Reviewed-by: Kieran Bingham
> ---
> Looks
On Wed, 28 Jul 2021 15:58:23 +0800, Chunfeng Yun wrote:
> Add support type switch by pericfg register between USB3, PCIe,
> SATA, SGMII, this is used to replace the way through efuse or
> jumper.
>
> Signed-off-by: Chunfeng Yun
> ---
> .../devicetree/bindings/phy/mediatek,tphy.yaml | 16
On Tue, 27 Jul 2021 18:13:56 +0200, Marek Vasut wrote:
> Decoder input LVDS format is a property of the decoder chip or even
> its strapping. Add DT property data-mapping the same way lvds-panel
> does, to define the LVDS data mapping.
>
> Signed-off-by: Marek Vasut
> Cc: Laurent Pinchart
> Cc:
Hi Sam,
Thanks. Where should this go, drm-misc-fixes or drm-misc-next?
Anitha
> -Original Message-
> From: Sam Ravnborg
> Sent: Wednesday, July 28, 2021 12:29 AM
> To: Chrisanthus, Anitha
> Cc: dri-devel@lists.freedesktop.org; Dea, Edmund J
>
> Subject: Re: [PATCH 13/14] drm/kmb:
Currently at dp_pm_resume() is_connected state is decided base on hpd connection
status only. This will put is_connected in wrongly "true" state at the scenario
that dongle attached to DUT but without hmdi cable connecting to it. Fix this
problem by adding read sink count from dongle and decided
On Tue, Jul 27, 2021 at 8:11 PM Ryan Taylor wrote:
>
> The amdgpu vkms interface provides a virtual KMS interface for several use
> cases: devices without display hardware, platforms where the actual display
> hardware is not useful (e.g., servers), SR-IOV virtual functions, device
>
[Not subscribed so please CC me. Manual quoting after using lore's
in-reply-to functionality. First time doing that so hope I got it
right.]
Mikael Pettersson wrote...
> Booting 5.14.0-rc4 on my box with Radeon graphics breaks with
>
> [drm:radeon_ttm_init [radeon]] *ERROR* failed
On Mon, Aug 2, 2021 at 3:32 AM zhouchuangao wrote:
>
> Duplicate include header file
> line 28: #include
> line 44: #include
>
> Signed-off-by: zhouchuangao
Applied. Thanks!
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git
On Mon, Aug 2, 2021 at 10:24 AM Emil Velikov wrote:
>
> Hi Jim,
>
> On Sat, 31 Jul 2021 at 22:42, Jim Cromie wrote:
>
> > +struct dyndbg_bitdesc {
> > + /* bitpos is inferred from index in containing array */
> > + char *prefix;
> > + char *help;
> AFAICT these two should also
On Mon, Aug 2, 2021 at 10:18 AM Emil Velikov wrote:
>
> Hi Jim,
>
> On Sat, 31 Jul 2021 at 22:42, Jim Cromie wrote:
>
> > Use of this new data member will be rare, it might be worth redoing
> > this as a separate/sub-type to keep the base case.
> >
> > Signed-off-by: Jim Cromie
> > ---
> >
Booting 5.14.0-rc4 on my box with Radeon graphics breaks with
[drm:radeon_ttm_init [radeon]] *ERROR* failed initializing buffer
object driver(-19).
radeon :01:00.0: Fatal error during GPU init
after which the screen goes black for the rest of kernel boot and
early user-space init.
Once the
Hi,
Thanks for having a stab at this, it's a massive complex topic to
solve.
Do you have the the HTML rendered somewhere for convenience?
On Fri, Jul 30, 2021 at 04:41:29PM -0400, Harry Wentland wrote:
> Use the new DRM RFC doc section to capture the RFC previously only
> described in the cover
Hi Jim,
On Sat, 31 Jul 2021 at 22:42, Jim Cromie wrote:
> DYNDBG_BITMAP_DESC(__gvt_debug, "dyndbg bitmap desc",
> { "gvt: cmd: ", "command processing" },
> { "gvt: core: ", "core help" },
> { "gvt: dpy: ", "display help" },
> { "gvt: el: ", "help" },
>
Hi Jim,
On Sat, 31 Jul 2021 at 22:42, Jim Cromie wrote:
> +struct dyndbg_bitdesc {
> + /* bitpos is inferred from index in containing array */
> + char *prefix;
> + char *help;
AFAICT these two should also be constant, right?
> +int param_set_dyndbg(const char *instr, const
On Mon, Aug 02, 2021 at 02:29:28PM +, Shai Malin wrote:
>
> On Tue, Jul 31, 2021 at 07:07:00PM -0300, Kees Cook wrote:
> > On Tue, Jul 27, 2021 at 01:58:33PM -0700, Kees Cook wrote:
> > > In preparation for FORTIFY_SOURCE performing compile-time and run-time
> > > field bounds checking for
Hi Jim,
On Sat, 31 Jul 2021 at 22:42, Jim Cromie wrote:
> Use of this new data member will be rare, it might be worth redoing
> this as a separate/sub-type to keep the base case.
>
> Signed-off-by: Jim Cromie
> ---
> include/linux/moduleparam.h | 11 +--
> 1 file changed, 9
On 2021-07-30 11:57, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2021-07-28 14:30:54)
Currently at dp_pm_resume() is_connected state is decided base on hpd
connection
status only. This will put is_connected in wrongly "true" state at the
scenario
that dongle attached to DUT but without hmdi
There's quite a fundamental difference between userspace contexts, and
kernel contexts. Latter all share intel_gt->vm, former get their vm
from gem_ctx->vm (on full ppgtt at least).
By splitting context creation for userspace from kernel-internal ones
we can make this all a bit more strict and
The full audit is quite a bit of work:
- i915_dpt has very simple lifetime (somehow we create a display pagetable vm
per object, so its _very_ simple, there's only ever a single vma in there),
and uses i915_vm_close(), which internally does a i915_vm_put(). No rcu.
Aside: wtf is i915_dpt
It's been invariant since
commit ccbc1b97948ab671335e950271e39766729736c3
Author: Jason Ekstrand
Date: Thu Jul 8 10:48:30 2021 -0500
drm/i915/gem: Don't allow changing the VM on running contexts (v4)
this just completes the deed. I've tried to split out prep work for
more
We don't need the absolute speed of rcu for this. And
i915_address_space in general dont need rcu protection anywhere else,
after we've made gem contexts and engines a lot more immutable.
Note that this semantically reverts
commit aabbe344dc3ca5f7d8263a02608ba6179e8a4499
Author: Chris Wilson
Since
commit ccbc1b97948ab671335e950271e39766729736c3
Author: Jason Ekstrand
Date: Thu Jul 8 10:48:30 2021 -0500
drm/i915/gem: Don't allow changing the VM on running contexts (v4)
the gem_ctx->vm can't change anymore. Plus we always set the
intel_context->vm, so might as well use the
And use it anywhere we have open-coded checks for ctx->vm that really
only check for full ppgtt.
Plus for paranoia add a GEM_BUG_ON that checks it's really only set
when we have full ppgtt, just in case. gem_context->vm is different
since it's NULL in ggtt mode, unlike intel_context->vm or
Consolidates the "which is the vm my execbuf runs in" code a bit. We
do some get/put which isn't really required, but all the other users
want the refcounting, and I figured doing a function just for this
getparam to avoid 2 atomis is a bit much.
Signed-off-by: Daniel Vetter
Cc: Jon Bloomfield
The important part isn't so much that this does an rcu lookup - that's
more an implementation detail, which will also be removed.
The thing that makes this different from other functions is that it's
gettting you the vm that batchbuffers will run in for that gem
context, which is either a full
Changing the vm from a finalized gem ctx is no longer possible, which
means we don't have to check for that anymore.
I was pondering whether to keep the check as a WARN_ON, but things go
boom real bad real fast if the vm of a vma is wrong. Plus we'd need to
also get the ggtt vm for !full-ppgtt
Hi all,
Jason wanted to do that as part of the scheduler series, but I object
since rcu is very, very hard to review when adding, and much, much harder
even to review when removing.
This is because simply looking for __rcu pointer annotations and rcu
functions isn't enough, rcu is also relied
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in:
drivers/gpu/drm/i915/display/intel_display.c
between commit:
b4bde5554f70 ("drm/i915/display: split DISPLAY_VER 9 and 10 in
intel_setup_outputs()")
from Linus' tree and commits:
cad83b405fe4 ("drm/i915/display:
On Tue, Jul 27, 2021 at 2:27 PM Thomas Zimmermann wrote:
>
> Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's
> IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers
> don't benefit from using it.
>
> DRM IRQ callbacks are now being called directly or inlined.
>
>
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in:
drivers/gpu/drm/i915/intel_device_info.c
between commit:
0f9ed3b2c9ec ("drm/i915/display/cnl+: Handle fused off DSC")
from the drm-intel-fixes tree and commit:
a4d082fc194a ("drm/i915: rename/remove CNL
On Mon, Aug 02, 2021 at 08:08:07AM -0700, Rob Clark wrote:
> On Mon, Aug 2, 2021 at 3:55 AM Will Deacon wrote:
> >
> > On Thu, Jul 29, 2021 at 10:08:22AM +0530, Sai Prakash Ranjan wrote:
> > > On 2021-07-28 19:30, Georgi Djakov wrote:
> > > > On Mon, Jan 11, 2021 at 07:45:02PM +0530, Sai Prakash
Hi
Am 02.08.21 um 08:35 schrieb Icenowy Zheng:
Add a driver for generic MIPI DBI panels initialized with MIPI DCS
commands.
Currently a ST7789V-based panel is added to it. This panel has its
configuration pre-programmed into the controller, so no vendor-specific
configuration is needed.
On Mon, Aug 2, 2021 at 3:55 AM Will Deacon wrote:
>
> On Thu, Jul 29, 2021 at 10:08:22AM +0530, Sai Prakash Ranjan wrote:
> > On 2021-07-28 19:30, Georgi Djakov wrote:
> > > On Mon, Jan 11, 2021 at 07:45:02PM +0530, Sai Prakash Ranjan wrote:
> > > > commit ecd7274fb4cd ("iommu: Remove unused
From: Arnd Bergmann
Another missed dependency when SCM is a loadable module
and adreno is built-in:
drivers/gpu/drm/msm/adreno/adreno_gpu.o: In function `adreno_zap_shader_load':
adreno_gpu.c:(.text+0x1e8): undefined reference to `qcom_scm_is_available'
drivers/gpu/drm/msm/adreno/a5xx_gpu.o: In
On Mon, Aug 2, 2021 at 4:31 AM Daniel Vetter wrote:
>
> On Mon, Aug 02, 2021 at 10:12:47AM +0200, Christian König wrote:
> > Am 02.08.21 um 09:43 schrieb Zhenneng Li:
> > > When primary bo is updated, crtc's pitch may
> > > have not been updated, this will lead to show
> > > disorder content when
On Thu, Jul 15, 2021 at 3:09 AM Stephen Boyd wrote:
>
> Quoting Souptick Joarder (2021-07-08 19:48:34)
> > Kernel test roobot throws below warning ->
> >
> > drivers/gpu/drm/msm/dp/dp_display.c:1017:21:
> > warning: variable 'drm' set but not used [-Wunused-but-set-variable]
> >
> > Removed
On Mon, Aug 2, 2021 at 2:51 PM Gerd Hoffmann wrote:
>
> Hi,
>
> > > That sounds sensible to me. Fence the virtio commands, make sure (on
> > > the host side) the command completes only when the work is actually done
> > > not only submitted. Has recently been added to qemu for RESOURCE_FLUSH
https://bugzilla.kernel.org/show_bug.cgi?id=205089
--- Comment #18 from jes...@jnsn.dev ---
On 02/08/21 at 02:13pm, bugzilla-dae...@bugzilla.kernel.org wrote:
>Does up/downgrading the mesa driver help?
Upgrading to the latest git revision of mesa has fixed Dota 2 for me at least.
--
You may
https://bugzilla.kernel.org/show_bug.cgi?id=213935
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC|
https://bugzilla.kernel.org/show_bug.cgi?id=205089
--- Comment #17 from Alex Deucher (alexdeuc...@gmail.com) ---
Does up/downgrading the mesa driver help?
--
You may reply to this email to add a comment.
You are receiving this mail because:
You are watching the assignee of the bug.
On Fri, 30 Jul 2021 14:26:20 -0700, Douglas Anderson wrote:
> eDP panels generally contain almost everything needed to control them
> in their EDID. This comes from their DP heritage were a computer needs
> to be able to properly control pretty much any DP display that's
> plugged into it.
>
>
Atm the EFI FB driver gets a runtime PM reference for the associated GFX
PCI device during driver probing and releases it only when removing the
driver.
When fbcon switches to the FB provided by the PCI device's driver (for
instance i915/drmfb), the EFI FB will get only unregistered without the
Hi,
> > That sounds sensible to me. Fence the virtio commands, make sure (on
> > the host side) the command completes only when the work is actually done
> > not only submitted. Has recently been added to qemu for RESOURCE_FLUSH
> > (aka frontbuffer rendering) and doing the same for
Le 28/07/2021 à 00:26, Tom Lendacky a écrit :
Replace occurrences of mem_encrypt_active() with calls to prot_guest_has()
with the PATTR_MEM_ENCRYPT attribute.
What about
https://patchwork.ozlabs.org/project/linuxppc-dev/patch/20210730114231.23445-1-w...@kernel.org/ ?
Christophe
Cc:
fix typo for drm:
*achived ==> achieved
*userpace ==> userspace
*commited ==> committed
*depencies ==> dependencies
*preceeding ==> preceding
*similiar ==> similar
*accidently ==> accidentally
*transfered ==> transferred
*openeing ==> opening
*Propage ==> Propagate
*interpretes ==> interprets
Hi,
On 7/6/21 9:50 AM, Thomas Zimmermann wrote:
> Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's
> IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers
> don't benefit from using it.
>
> Signed-off-by: Thomas Zimmermann
Thanks, patch looks good to me:
In drm_is_current_master_locked, accessing drm_file.master should be
protected by either drm_file.master_lookup_lock or
drm_device.master_mutex. This was previously awkward to assert with
lockdep.
Following patch ("locking/lockdep: Provide lockdep_assert{,_once}()
helpers"), this assertion is now
From: Peter Zijlstra
Extract lockdep_assert{,_once}() helpers to more easily write composite
assertions like, for example:
lockdep_assert(lockdep_is_held(_device.master_mutex) ||
lockdep_is_held(_file.master_lookup_lock));
Signed-off-by: Peter Zijlstra (Intel)
Hi all,
My bad for the resend. Adding cc: intel-gfx, and the maintainers and
mailing lists for include/drm/drm_file.h.
Following a discussion on the patch ("drm: use the lookup lock in
drm_is_current_master") [1], Peter Zijlstra proposed new lockdep_assert
helpers to make it convenient to
On Thu, Jul 29, 2021 at 10:08:22AM +0530, Sai Prakash Ranjan wrote:
> On 2021-07-28 19:30, Georgi Djakov wrote:
> > On Mon, Jan 11, 2021 at 07:45:02PM +0530, Sai Prakash Ranjan wrote:
> > > commit ecd7274fb4cd ("iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag")
> > > removed unused
On Tue, Jul 27, 2021 at 05:26:11PM -0500, Tom Lendacky wrote:
> The mem_encrypt_active() function has been replaced by prot_guest_has(),
> so remove the implementation.
>
> Signed-off-by: Tom Lendacky
Reviewed-by: Joerg Roedel
On Tue, Jul 27, 2021 at 05:26:12PM -0500, Tom Lendacky wrote:
> The mem_encrypt_active() function has been replaced by prot_guest_has(),
> so remove the implementation.
>
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Borislav Petkov
> Signed-off-by: Tom Lendacky
Reviewed-by: Joerg Roedel
On Tue, Jul 27, 2021 at 05:26:09PM -0500, Tom Lendacky wrote:
> @@ -48,7 +47,7 @@ static void sme_sev_setup_real_mode(struct
> trampoline_header *th)
> if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT))
> th->flags |= TH_FLAGS_SME_ACTIVE;
>
> - if (sev_es_active()) {
> + if
On 2/8/21 4:26 pm, Daniel Vetter wrote:
On Sat, Jul 31, 2021 at 04:24:56PM +0800, Desmond Cheong Zhi Xi wrote:
Hi,
Following a discussion on the patch ("drm: use the lookup lock in
drm_is_current_master") [1], Peter Zijlstra proposed new lockdep_assert
helpers to make it convenient to compose
On Tue, Jul 27, 2021 at 05:26:08PM -0500, Tom Lendacky wrote:
> Replace occurrences of sev_active() with the more generic prot_guest_has()
> using PATTR_GUEST_MEM_ENCRYPT, except for in arch/x86/mm/mem_encrypt*.c
> where PATTR_SEV will be used. If future support is added for other memory
>
On Tue, Jul 27, 2021 at 05:26:07PM -0500, Tom Lendacky wrote:
> Replace occurrences of sme_active() with the more generic prot_guest_has()
> using PATTR_HOST_MEM_ENCRYPT, except for in arch/x86/mm/mem_encrypt*.c
> where PATTR_SME will be used. If future support is added for other memory
>
changes v3:
- drop panel bindings patches, it is already in drm-misc-next
- remove some new lines
- reorder compatibles at the start of the nodes
- use lowercase for hex value
- add enable-active-high to the regulator-vcc-mmc-io and fix MMC voltage
configuration.
changes v2:
- remove
Add "skov" entry for the SKOV A/S: https://www.skov.com/en/
Signed-off-by: Oleksij Rempel
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
From: Sam Ravnborg
Add SKOV imx6q/dl LT2, LT6 and mi1010ait-1cp1 boards.
Signed-off-by: Sam Ravnborg
Signed-off-by: Søren Andersen
Signed-off-by: Juergen Borleis
Signed-off-by: Ulrich Ölmann
Signed-off-by: Michael Grzeschik
Signed-off-by: Marco Felsch
Signed-off-by: Lucas Stach
Add SKOV imx6q/dl LT2, LT6 and mi1010ait-1cp1 boards.
Signed-off-by: Oleksij Rempel
---
Documentation/devicetree/bindings/arm/fsl.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
b/Documentation/devicetree/bindings/arm/fsl.yaml
index
On Tue, Jul 27, 2021 at 05:26:05PM -0500, Tom Lendacky wrote:
> Introduce an x86 version of the prot_guest_has() function. This will be
> used in the more generic x86 code to replace vendor specific calls like
> sev_active(), etc.
>
> While the name suggests this is intended mainly for guests, it
On Tue, Jul 27, 2021 at 05:26:04PM -0500, Tom Lendacky wrote:
> In prep for other protected virtualization technologies, introduce a
> generic helper function, prot_guest_has(), that can be used to check
> for specific protection attributes, like memory encryption. This is
> intended to eliminate
On Fri, Jul 30, 2021 at 10:52:26AM +0800, Yong Wu wrote:
> .../display/mediatek/mediatek,disp.txt| 9
> .../bindings/media/mediatek-jpeg-decoder.yaml | 9
> .../bindings/media/mediatek-jpeg-encoder.yaml | 9
> .../bindings/media/mediatek-mdp.txt | 8
>
Op 31-07-2021 om 10:24 schreef Desmond Cheong Zhi Xi:
> From: Peter Zijlstra
>
> Extract lockdep_assert{,_once}() helpers to more easily write composite
> assertions like, for example:
>
> lockdep_assert(lockdep_is_held(_device.master_mutex) ||
>
On Mon, Aug 02, 2021 at 10:26:16AM +0200, Daniel Vetter wrote:
> On Sat, Jul 31, 2021 at 04:24:56PM +0800, Desmond Cheong Zhi Xi wrote:
> > Hi,
> >
> > Following a discussion on the patch ("drm: use the lookup lock in
> > drm_is_current_master") [1], Peter Zijlstra proposed new lockdep_assert
> >
On 30/07/2021 19:13, John Harrison wrote:
On 7/30/2021 02:49, Tvrtko Ursulin wrote:
On 30/07/2021 01:13, John Harrison wrote:
On 7/28/2021 17:34, Matthew Brost wrote:
If an engine associated with a context does not have a heartbeat,
ban it
immediately. This is needed for GuC submission as
Matthew Auld writes:
> Try to document the object caching related bits, like cache_coherent and
> cache_dirty.
>
> v2(Ville):
> - As pointed out by Ville, fix the completely incorrect assumptions
>about the "partial" coherency on shared LLC platforms.
>
> Suggested-by: Daniel Vetter
>
When primary bo is updated, crtc's pitch may
have not been updated, this will lead to show
disorder content when user changes display mode,
we update crtc's pitch in page flip to avoid
this bug.
This refers to amdgpu's pageflip.
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc:
[...]
> > + reg_vcc_mmc_io: regulator-vcc-mmc-io {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_vcc_mmc_io>;
> > + compatible = "regulator-gpio";
> > + vin-supply = <_5v0>;
> > + regulator-name = "mmc_io_supply";
> > +
On 2021-08-02 11:06 a.m., Daniel Vetter wrote:
> On Mon, Aug 02, 2021 at 10:49:37AM +0200, Michel Dänzer wrote:
>> On 2021-08-02 9:59 a.m., Daniel Vetter wrote:
>>> On Fri, Jul 30, 2021 at 02:50:10PM +0200, Michel Dänzer wrote:
On 2021-07-30 12:25 p.m., Daniel Vetter wrote:
> On Thu, Jul
Op 30-07-2021 om 11:52 schreef Daniel Vetter:
> I've added a new check to make sure that drivers which insepct the
> damage property have it set up correctly, but somehow missed that this
> borke the damage selftest in the CI result noise.
>
> Fix it up by mocking enough of drm_device and
On Fri, Jul 30, 2021 at 03:38:50PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > - We fix virtio to send out the completion event at the end of this entire
> > pipeline, i.e. virtio code needs to take care of sending out the
> > crtc_state->event correctly.
>
> That sounds sensible to me. Fence
在 2021-08-02星期一的 14:35 +0800，Icenowy Zheng写道：
> Add a driver for generic MIPI DBI panels initialized with MIPI DCS
> commands.
>
> Currently a ST7789V-based panel is added to it. This panel has its
> configuration pre-programmed into the controller, so no vendor-
> specific
> configuration is
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