Quoting Kieran Bingham (2022-03-07 17:59:54)
> From: Laurent Pinchart
>
> Despite the SN65DSI86 being an eDP bridge, on some systems its output is
> routed to a DisplayPort connector. Enable DisplayPort mode when the next
> component in the display pipeline is detected as a DisplayPort
>
https://bugzilla.kernel.org/show_bug.cgi?id=215652
--- Comment #8 from Erhard F. (erhar...@mailbox.org) ---
Created attachment 300550
--> https://bugzilla.kernel.org/attachment.cgi?id=300550=edit
kernel dmesg (kernel 5.17-rc7, CONFIG_DRM_RADEON=m, Talos II)
Seems this is issue already fixed in
Am 10.03.22 um 14:03 schrieb Frieder Schrempf:
> Hi Jagan,
>
> Am 09.03.22 um 15:01 schrieb Jagan Teki:
>> Hi Frieder,
>>
>> On Wed, Mar 9, 2022 at 6:54 PM Frieder Schrempf
>> wrote:
>>>
>>> Hi Jagan,
>>>
>>> Am 03.03.22 um 17:36 schrieb Jagan Teki:
Updated series about drm bridge
On 09/03/2022 16:11, Biju Das wrote:
> On Renesas RZ/{G2L,V2L} platforms changing the lanes from 4 to 3 at
> lower frequencies causes display instability. On such platforms, it
> is better to avoid switching lanes from 4 to 3 as it needs different
> set of PLL parameter constraints to make the
Hi Jagan,
Am 09.03.22 um 15:01 schrieb Jagan Teki:
> Hi Frieder,
>
> On Wed, Mar 9, 2022 at 6:54 PM Frieder Schrempf
> wrote:
>>
>> Hi Jagan,
>>
>> Am 03.03.22 um 17:36 schrieb Jagan Teki:
>>> Updated series about drm bridge conversion of exynos dsi.
>>>
>>> Previous version can be accessible,
On 05/03/2022 23:36, Vivek Kasireddy wrote:
This iterator relies on drm_mm_first_hole() and drm_mm_next_hole()
functions to identify suitable holes for an allocation of a given
size by efficiently traversing the rbtree associated with the given
allocator.
It replaces the for loop in
On 3/10/22 11:53, Maxime Ripard wrote:
On Tue, Mar 08, 2022 at 10:41:05PM +0100, Marek Vasut wrote:
On 3/8/22 17:21, Maxime Ripard wrote:
On Tue, Mar 08, 2022 at 03:47:22PM +0100, Marek Vasut wrote:
On 3/8/22 14:49, Maxime Ripard wrote:
On Tue, Mar 08, 2022 at 02:27:40PM +0100, Marek Vasut
The offset we get looks to be the exact start of DSM, but the
inital_plane_vma expects the address to be relative.
v2(Ville):
- The base is actually the pre-programmed GGTT address, which is then
meant to 1:1 map to somewhere inside dsm. In the case of dgpu the
base looks to just be
On DG2+ the initial fb shouldn't be placed anywhere close to DSM, and so
should just be allocated directly from LMEM.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
.../drm/i915/display/intel_plane_initial.c| 46 +++
1 file changed, 27 insertions(+), 19 deletions(-)
From: CQ Tang
When system does not have mappable aperture, ggtt->mappable_end=0. In
this case if we pass PIN_MAPPABLE when pinning vma, the pinning code
will return -ENOSPC. So conditionally set PIN_MAPPABLE if HAS_GMCH().
Suggested-by: Chris P Wilson
Signed-off-by: CQ Tang
Cc: Radhakrishna
Add a generic interface for allocating an object at some specific
offset, and convert stolen over. Later we will want to hook this up to
different backends.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
.../drm/i915/display/intel_plane_initial.c| 4 +-
Keep the behaviour consistent with normal lmem, where we assume CPU
access if by default required.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 8
1 file changed, 8 insertions(+)
diff --git
For the ttm backend we can use existing placements fpfn and lpfn to
force the allocator to place the object at the requested offset,
potentially evicting stuff if the spot is currently occupied.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
.../gpu/drm/i915/gem/i915_gem_object_types.h
Just pass along the probed io_size. The backend should be able to
utilize the entire range here, even if some of it is non-mappable.
It does leave open with what to do with stolen local-memory.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
---
From: Akeem G Abodunrin
On client platforms with reduced LMEM BAR, we should be able to continue
with driver load with reduced io_size. Instead of using the BAR size to
determine the how large stolen should be, we should instead use the
ADDR_RANGE register to figure this out(at least on
The leftover bits around dealing with stolen-local memory + small BAR, plus
some related fixes.
v2: some tweaks based on feedback from Ville
--
2.34.1
On 10/03/2022 05:18, Matt Atwood wrote:
Newer platforms have DSS that aren't necessarily available for both
geometry and compute, two queries will need to exist. This introduces
the first, when passing a valid engine class and engine instance in the
flags returns a topology describing
El 10/3/22 a las 12:12, Maxime Ripard escribió:
On Tue, Mar 01, 2022 at 01:58:26PM -0100, Melissa Wen wrote:
On 02/25, Maxime Ripard wrote:
Hi Melissa,
On Tue, Feb 01, 2022 at 08:26:51PM -0100, Melissa Wen wrote:
Trace submit_cl_ioctl and related IRQs for CL submission and bin/render
jobs
Hi Doug,
Quoting Doug Anderson (2022-03-07 19:52:08)
> Hi,
>
> On Mon, Mar 7, 2022 at 10:00 AM Kieran Bingham
> wrote:
> >
> > From: Laurent Pinchart
> >
> > Implement the bridge connector-related .get_edid() operation, and report
> > the related bridge capabilities and type.
> >
> >
https://bugzilla.kernel.org/show_bug.cgi?id=215669
--- Comment #2 from Andreas Polnas (andreas.polna...@hotmail.com) ---
Thanks Alex,
I have posted it on the mesa gitlab as an issue shown below:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6113
--
You may reply to this email to add a
Hi Maxime,
On Thu, Mar 10, 2022 at 11:57:38AM +0100, Maxime Ripard wrote:
> On Thu, Mar 10, 2022 at 12:42:12PM +0200, Laurent Pinchart wrote:
> > On Tue, Mar 08, 2022 at 01:51:40PM +0100, Maxime Ripard wrote:
> > > On Tue, Mar 08, 2022 at 11:29:59AM +0100, Marek Vasut wrote:
> > > > On 3/8/22
On Tue, Mar 01, 2022 at 01:58:26PM -0100, Melissa Wen wrote:
> On 02/25, Maxime Ripard wrote:
> > Hi Melissa,
> >
> > On Tue, Feb 01, 2022 at 08:26:51PM -0100, Melissa Wen wrote:
> > > Trace submit_cl_ioctl and related IRQs for CL submission and bin/render
> > > jobs execution. It might be
On Thu, Mar 10, 2022 at 6:15 AM Adam Ford wrote:
>
> On Wed, Mar 9, 2022 at 1:11 PM Jagan Teki wrote:
> >
> > or a Hi All,
> >
> > On Thu, Oct 14, 2021 at 6:45 PM Jagan Teki
> > wrote:
> > >
> > > Hi Laurent,
> > >
> > > On Fri, Oct 8, 2021 at 7:07 PM Laurent Pinchart
> > > wrote:
> > > >
>
On Thu, Mar 10, 2022 at 12:42:12PM +0200, Laurent Pinchart wrote:
> Hi Maxime,
>
> On Tue, Mar 08, 2022 at 01:51:40PM +0100, Maxime Ripard wrote:
> > On Tue, Mar 08, 2022 at 11:29:59AM +0100, Marek Vasut wrote:
> > > On 3/8/22 11:07, Jagan Teki wrote:
> > > > On Tue, Mar 8, 2022 at 3:19 PM Marek
On Tue, Mar 08, 2022 at 10:41:05PM +0100, Marek Vasut wrote:
> On 3/8/22 17:21, Maxime Ripard wrote:
> > On Tue, Mar 08, 2022 at 03:47:22PM +0100, Marek Vasut wrote:
> > > On 3/8/22 14:49, Maxime Ripard wrote:
> > > > On Tue, Mar 08, 2022 at 02:27:40PM +0100, Marek Vasut wrote:
> > > > > On 3/8/22
Il 10/03/22 04:55, Nancy.Lin ha scritto:
Add display node for vdosys1.
Signed-off-by: Nancy.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 223 +++
1 file changed, 223 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
Il 10/03/22 04:55, Nancy.Lin ha scritto:
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Il 10/03/22 04:55, Nancy.Lin ha scritto:
Add plane color encoding information for color space conversion.
It's a preparation for adding support for mt8195 ovl_adaptor mdp_rdma
csc control.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
---
Il 10/03/22 04:55, Nancy.Lin ha scritto:
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers,
Il 10/03/22 04:55, Nancy.Lin ha scritto:
Add merge async reset control in mtk_merge_stop. Async hw doesn't do self
reset on each sof signal(start of frame), so need to reset the async to
clear the hw status for the next merge start.
Signed-off-by: Nancy.Lin
Reviewed-by: CK Hu
Reviewed-by:
Il 10/03/22 04:55, Nancy.Lin ha scritto:
Add merge mute/unmute setting for MT8195.
MT8195 Vdosys1 merge1~merge4 support HW mute function.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 13
Il 10/03/22 04:55, Nancy.Lin ha scritto:
Add merge start/stop API for cmdq support. The ovl_adaptor merges
are configured with each drm plane update. Need to enable/disable
merge with cmdq making sure all the settings taken effect in the
same vblank.
Signed-off-by: Nancy.Lin
Reviewed-by:
Il 10/03/22 04:55, Nancy.Lin ha scritto:
Add merge new advance config API. The original merge API is
mtk_ddp_comp_funcs function prototype. The API interface parameters
cannot be modified, so add a new config API for extension. This is
the preparation for ovl_adaptor merge control.
Il 10/03/22 04:55, Nancy.Lin ha scritto:
Add MDP_RDMA driver for MT8195. MDP_RDMA is the DMA engine of
the ovl_adaptor component.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
Il 10/03/22 04:54, Nancy.Lin ha scritto:
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,ethdr.yaml | 158 ++
1 file changed, 158 insertions(+)
create
Il 10/03/22 04:55, Nancy.Lin ha scritto:
This is a preparation for adding support for mt8195 vdosys1 mutex.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements,
so change it to support multi-bit control.
Signed-off-by: Nancy.Lin
On Wed, Mar 02, 2022 at 05:35:11PM +0800, Lee Shawn C wrote:
> Find HF-SCDB information in CEA extensions block. And retrieve
> Max_TMDS_Character_Rate that support by sink device.
>
> Cc: Jani Nikula
> Cc: Ville Syrjala
> Cc: Ankit Nautiyal
> Signed-off-by: Lee Shawn C
> ---
>
On Wed, Mar 02, 2022 at 05:35:08PM +0800, Lee Shawn C wrote:
> Try to find and parse more CEA ext blocks if edid->extensions
> is greater than one.
>
> v2: split prvious patch to two. And do CEA block parsing
> in this one.
> v3: simplify this patch based on previous change.
>
> Cc: Jani
Hi Maxime,
On Tue, Mar 08, 2022 at 01:51:40PM +0100, Maxime Ripard wrote:
> On Tue, Mar 08, 2022 at 11:29:59AM +0100, Marek Vasut wrote:
> > On 3/8/22 11:07, Jagan Teki wrote:
> > > On Tue, Mar 8, 2022 at 3:19 PM Marek Vasut wrote:
> > > >
> > > > On 3/8/22 09:03, Jagan Teki wrote:
> > > >
> >
On Wed, Mar 09, 2022 at 06:45:10PM -0600, Adam Ford wrote:
> On Wed, Mar 9, 2022 at 1:11 PM Jagan Teki wrote:
> >
> > or a Hi All,
> >
> > On Thu, Oct 14, 2021 at 6:45 PM Jagan Teki
> > wrote:
> > >
> > > Hi Laurent,
> > >
> > > On Fri, Oct 8, 2021 at 7:07 PM Laurent Pinchart
> > > wrote:
> >
Hi Dave, Daniel,
One PSR2 fix for the next release candidate, if there will be one.
Regards,
Tvrtko
drm-intel-fixes-2022-03-10:
- Fix PSR2 when selective fetch is enabled and cursor at (-1, -1) (Jouni
Högander)
The following changes since commit ffb217a13a2eaf6d5bd974fc83036a53ca69f1e2:
Am 09.03.22 um 19:12 schrieb Rob Clark:
On Tue, Mar 8, 2022 at 11:40 PM Shashank Sharma
wrote:
From: Shashank Sharma
This patch adds a new sysfs event, which will indicate
the userland about a GPU reset, and can also provide
some information like:
- process ID of the process involved with
On 09/03/2022 21:16, John Harrison wrote:
On 3/8/2022 01:41, Tvrtko Ursulin wrote:
On 03/03/2022 22:37, john.c.harri...@intel.com wrote:
From: John Harrison
A workaround was added to the driver to allow OpenCL workloads to run
'forever' by disabling pre-emption on the RCS engine for Gen12.
The property length which returns from "of_get_property", divided by
sizeof(int) to get the total property counts.
Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature")
Signed-off-by: Xin Ji
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 2 ++
1 file changed, 2 insertions(+)
I tested it on Loongarch and MIPS, and the results were fine。
--Original--
From: "NeilArmstrong"
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