Hi Linus,
Some more fixes trickled in,
A bunch of VC4 ones since it's a pretty new driver not much chance of
regressions, and it fixes GPU resets.
One atomic fix, one set of fixes for a common bug in TTM cleanup,
and one i915 hotplug fix.
Dave.
The following changes since commit 705d43dbe10d6
ecause:
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set_power_state defaults to no displays, so we need to update
the display configuration after setting up the powerstate on the
first call. In most cases this is not an issue since ends up
getting called multiple times at any given modeset and the proper
order is achieved in the display changed hand
set_power_state defaults to no displays, so we need to update
the display configuration after setting up the powerstate on the
first call. In most cases this is not an issue since ends up
getting called multiple times at any given modeset and the proper
order is achieved in the display changed hand
I.e., doesn't make sense to change power states or check the
temperature when the asic is powered off.
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/driver
Looks like a copy paste typo when we added powerplay
support.
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgp
Looks like a copy/paste typo.
Noticed-by: David Panariti
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 8f8ec37..1c40bd
On Thu, Feb 18, 2016 at 8:16 PM, Michel Dänzer wrote:
> On 19.02.2016 10:06, Mario Kleiner wrote:
>> This fixes a regression introduced in Linux 4.4.
>>
>> Limit the amount of time radeon_flip_work_func can
>> delay programming a page flip, by both limiting the
>> maximum amount of time per wait
s
been implemented and will be part of the next update.
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This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
Signed-off-by: Jitao Shi
---
Changes since v9:
- replace dev_kmalloc with devm_kmalloc in ps8640_get_modes
- remove ps_bridge->dsi = devm_kzalloc(dev, sizeof(struct mipi_dsi_device),
GFP
Add documentation for DT properties supported by
ps8640 DSI-eDP converter.
Signed-off-by: Jitao Shi
Acked-by: Rob Herring
Reviewed-by: Philipp Zabel
---
Changes since v9:
- No change
---
.../devicetree/bindings/display/bridge/ps8640.txt | 43
1 file changed, 43 inserti
ev = NULL;
+ return -ENODEV;
+ }
+
+ platform_set_drvdata(pdev, arcpgu);
+ return 0;
+}
+
+int arcpgu_unload(struct drm_device *drm)
+{
+ struct arcpgu_drm_private *arcpgu = drm->dev_private;
+
+ if (arcpgu->fbdev) {
+ drm_fbdev_cma_fini(ar
> If a minority of users need to opt out from MMU_NOTIFIER, then
> DRM_RADEON_USERPTR and friends should default to y and be hidden behind
> EXPERT. That way you avoid asking yet more questions to everyone else.
> Would that work for you?
No, just the other way around.
When MMU_NOTIFIER is selecte
Patch based on a previous series by Shashank Sharma.
v2: Update contributors
v3: Refactor degamma/gamma LUTs load into a single function
Signed-off-by: Shashank Sharma
Signed-off-by: Lionel Landwerlin
Signed-off-by: Kumar, Kiran S
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/i915/i915_
Patch based on a previous series by Shashank Sharma.
v2: Do not read GAMMA_MODE register to figure what mode we're in
v3: Program PREC_PAL_GC_MAX to clamp pixel values > 1.0
Add documentation on how the Broadcast RGB property is affected by CTM
v4: Update contributors
v5: Refactor degamma/
Patch based on a previous series by Shashank Sharma.
This introduces optional properties to enable color correction at the
pipe level. It relies on 3 transformations applied to every pixels
displayed. First a lookup into a degamma table, then a multiplication
of the rgb components by a 3x3 matrix
Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_color.c | 7 +--
drivers/gpu/drm/i915/intel_drv.h | 3 +++
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
The moves a couple of functions programming the gamma LUT and CSC
units into their own file.
On generations prior to Haswell there is only a gamma LUT. From
haswell on there is also a new enhanced color correction unit that
isn't used yet. This is why we need to set the GAMMA_MODE register,
either
This series introduces pipe level color management through a set of properties
attached to the CRTC. It also provides an implementation for some Intel
platforms.
This series is based of a previous set of patches by Shashank Sharma.
Cheers,
Lionel
Lionel Landwerlin (5):
drm/i915: Extract out g
Hi Christian,
On Thu, 18 Feb 2016 10:48:18 +0100, Christian König wrote:
> Am 18.02.2016 um 09:59 schrieb Jean Delvare:
> > Maybe I was not clear enough in my original post, but I am really
> > advocating for FEWER kconfig options, not more. Plus I just explained
> > why I think the radeon and am
Hi all,
We have a duplicated patch on drm-intel-nightly
commits d7006964d and cc1de6e80q
causing:
drivers/gpu/drm//amd/amdgpu/amdgpu_ttm.c:818:6: error: redefinition of
âamdgpu_ttm_tt_affect_userptrâ
bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
^
drivers
ging 1.9.3 binary deb, also show up the
same problem that make games unplayable particularly eating video card games.
I'm not sure what cause the problem. Does mesa dri_prime way exists some bugs,
or it's wine bugs, or i miss something?
Oh, 2D games looks good without the problem.
Thanks.
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On 16 February 2016 at 21:37, Ville Syrjälä
wrote:
> On Mon, Feb 15, 2016 at 02:17:01PM +0100, Maarten Lankhorst wrote:
>> Because we record connector_mask using 1 << drm_connector_index now
>> the connector_mask should stay the same even when other connectors
>> are removed. This was not the ca
On 18 February 2016 at 15:21, Eric Anholt wrote:
> These changes have been on the list for over a week without comment,
> so I think it might be an appropriate time to pull (without an active
> development community, getting review will probably be hard). I'm
> also curious when your window for t
omapdrm is missing a check on the validity of the rotation property.
This leads to omapdrm possibly trying to use rotation on non-rotateable
framebuffer, which causes the overlay setup to fail.
This patch adds the necessary check to omap_plane_atomic_check().
Signed-off-by: Tomi Valkeinen
---
d
Before universal planes we had to have plane specific properties for the
crtc too, as on the hardware level a crtc uses a plane. In other words,
e.g. 'zorder' property was added to both planes and crtcs, and
omap_crtc.c would delegate the property set/get to the primary plane.
However, the delegat
From: Rob Clark
Subsequent threads returning EBUSY from vm_insert_pfn() was not
handled correctly. As a result concurrent access from new threads
to mmapped data caused SIGBUS.
See e79e0fe380847493266fba557217e2773c61bd1b ("drm/i915: EBUSY status
handling added to i915_gem_fault()").
Signed-off
The DSS hardware uses the same ROW_INC value for both Y and UV planes
for NV12 format. This means that the pitches of the Y and UV planes have
to match. omapdrm doesn't check this at the moment, and this can lead
into a broken NV12 fb on the screen.
This patch adds the check.
Signed-off-by: Tomi
DISPC requires the x resolution to be divisible by 8 when stall mode is
not used.
Add a check to the DPI driver to verify this.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/dpi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c
b/drivers
Now that interlace support has been added, we can remove the check that
prevents interlace.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/hdmi5.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
inde
Add the missing bits for interlace:
* Set VBLANK_OSC if the videomode's vblank is fractional
* Halve the vertical timings for interlace
* Double the horizontal timings for double-pixel mode
* Set FC_PRCONF properly for double-pixel mode
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/
The HDMI driver copies the timing values one by one. Instead we can just
copy the whole struct.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 13 ++---
1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
For some reason the HDMI FC's HSW value is programmed to hsw-1. There's
no indication in the documentation that this would be correct, and no
other blanking value needs -1 either.
So remove the -1.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 4 ++--
1 file chang
Interlace field order is different between VENC and HDMI. The driver
currently sets the field order for VENC.
This patch adds the code to set the field order for HDMI.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/dispc.c | 12
1 file changed, 12 insertions(+)
diff
The HDMI WP timings are not programmed correctly for interlace.
We need to halve the vertical timings when interlace is used, and double
the horizontal timings when pixel doubling is used.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/hdmi_wp.c | 18 --
1 file ch
On OMAP4 and OMAP5 ES1.0 the HDMI_WP_VIDEO_TIMING_H:HSW field is
set directly to the HSW value. On later SoCs the field needs to be
programmed with the value of HSW-1.
Currently the driver always programs the field with the HSW value. Most
videomodes seem to work fine with that, but at least low r
We need double-pixel mode (pixel repetition) for interlace modes. This
patch adds the necessary support to HDMI to double the pixel clock when
double-pixel mode is used.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/hdmi4.c | 7 ++-
drivers/gpu/drm/omapdrm/dss/hdmi5.c | 7 +++
We need double-pixel mode (pixel repetition) for interlace modes. This
patch adds the necessary support to omapdrm to output double-pixel mode.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/omap_connector.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/omapd
We need double-pixel mode (pixel repetition) for interlace modes. This
patch adds the necessary support to DISPC to output double-pixel mode.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/dispc.c | 8
include/video/omapdss.h | 2 ++
2 files changed, 10 insert
omap_crtc_wait_pending() waits until the config changes have been taken
into use, usually at next vblank. The wait-timeout used is 50ms, which
usually is enough, but in some rare cases not.
As time wait-timeout is just a safety measure for cases where something
is broken, we can just as well incre
We no longer have the omapdrm plugin system for SGX, and we can thus
remove the support for external memory and sync objects from omap_gem.c.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/omap_gem.c | 91 +++---
1 file changed, 16 insertions(+), 75 del
From: Laurent Pinchart
OMAP GEM objects backed by dma_buf reuse the current OMAP GEM object
support as much as possible. If the imported buffer is physically
contiguous its physical address will be used directly, reusing the
OMAP_BO_MEM_DMA_API code paths. Otherwise it will be mapped through the
From: Laurent Pinchart
Split the individual steps of GEM object allocation and initialization
clearly. This improves readability and prepares for dma_buf import
support.
Signed-off-by: Laurent Pinchart
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/omap_gem.c | 75 +
From: Laurent Pinchart
The driver assumes that only objects backed by shmem need to be mapped
through DMM. While this is true with the current code, the assumption
won't hold with dma_buf import support.
Condition the mapping based on whether the buffer has been allocated
using the DMA mapping A
If the panel's enable fails, omap_encoder silently ignores the failure.
omapdrm should really handle the failure, but unfortunately the whole
encoder enable codepath is expected to always succeed.
So for now, catch the enable failure and print an error.
Signed-off-by: Tomi Valkeinen
---
drivers
omap_gem_dma_sync() calls dma_map_page() but does not check the possible
error with dma_mapping_error(). If DMA-API debugging is enabled, the
debug layer will give a warning if dma_mapping_error() has not been
used.
This patch adds proper error handling to omap_gem_dma_sync().
Signed-off-by: Tomi
omap_gem_attach_pages() calls dma_map_page() but does not check the
possible error with dma_mapping_error(). If DMA-API debugging is
enabled, the debug layer will give a warning if dma_mapping_error() has
not been used.
This patch adds proper error handling to omap_gem_attach_pages().
Signed-off-
OMAP4+ DSS has WBUNCOMPLETEERROR irq, which was not defined in the irq
list. Add the define.
Signed-off-by: Tomi Valkeinen
---
include/video/omapdss.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 295b41e20d8e..86f28a92281a 100644
---
From: Manisha Agrawal
tpd12s015 HW has LS_OE, CT_CP_HPD and HPD gpios. Out of these gpios,
driver only handled LS_OE as optional. The CT_CP_HPD gpio should also
be treated as optional gpio as it is just a power saving feature. Some
boards hardwire this gpio to be always enable. In this patch, all
From: Manisha Agrawal
Migrated the gpio APIs to descriptor-interface based.
Signed-off-by: Manisha Agrawal
Acked-by: Tomi Valkeinen
Acked-by: Laurent Pinchart
---
.../gpu/drm/omapdrm/displays/encoder-tpd12s015.c | 79 --
1 file changed, 28 insertions(+), 51 deletions(-)
From: Manisha Agrawal
All devices using tpd12s015 driver are doing DT boot. No need of further
supporting the platform data. This patch removes support for platform
data.
Signed-off-by: Manisha Agrawal
[tomi.valkeinen at ti.com: minor adjustments]
Acked-by: Tomi Valkeinen
Acked-by: Laurent Pin
From: Jyri Sarha
drm_atomic_get_plane_state() may return ERR_PTR. Handle
drm_atomic_get_plane_state() return values right in
omap_crtc_atomic_set_property().
Signed-off-by: Jyri Sarha
Acked-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/omap_crtc.c | 4 ++--
1 file changed, 2 insertions(+), 2
Errata i878 says that MPU should not be used to access RAM and DMM at
the same time. As it's not possible to prevent MPU accessing RAM, we
need to access DMM via a proxy.
This patch changes DMM driver to access DMM registers via sDMA. Instead
of doing a normal readl/writel call to read/write a reg
This patch adds wrapper functions for readl() and writel(), dmm_read()
and dmm_write(), so that we can implement workaround for errata i878.
Signed-off-by: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 39
1 file changed, 24 insertions(+), 15 dele
A DMM timeout "timed out waiting for done" has been observed on DRA7
devices. The timeout happens rarely, and only when the system is under
heavy load.
Debugging showed that the timeout can be made to happen much more
frequently by optimizing the DMM driver, so that there's almost no code
between
The current driver uses non-blocking DMM fill when releasing memory.
This gives us a small performance increase as we don't have to wait for
the fill operation to finish.
However, the driver does not have any error handling for non-blocking
fill. In case of an error, the fill operation may silentl
We occasionally see DISPC sync-lost errors when enabling and disabling
HDMI. Sometimes we get only a few, which get handled (ignored) by the
driver, but sometimes there's a flood of the errors which doesn't seem
to stop.
The HW team has root caused this to the order in which HDMI and DISPC
are ena
Hi,
Here's a collection of patches for omapdrm. Some of them have been sent for
review at some point, most of them haven't.
There are two bigger features in the series: dmabuf import support and HDMI
interlace output support. Otherwise they are smaller improvements, fixes and
cleanups.
Tomi
Jy
On Friday 19 February 2016 09:22:44 Marek Szyprowski wrote:
> This patch replaces ARM-specific IOMMU-based DMA-mapping implementation
> with generic IOMMU DMA-mapping code shared with ARM64 architecture. The
> side-effect of this change is a switch from bitmap-based IO address space
> management to
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Hi Dave,
here are a couple of fixes for the imx-drm drivers. With these, the
ipu-v3 driver probe doesn't bail out if nodes that are marked as
optional are not present in the device tree. The reset is moved before
irq initialization, and the DRM core is made aware of the vblank
interrupt enable sta
>>
>> Can you elaborate, please?
Looks like there might be an update for The Talos Principle which will address
this.
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On 19.02.2016 10:06, Mario Kleiner wrote:
> This fixes a regression introduced in Linux 4.4.
>
> Limit the amount of time radeon_flip_work_func can
> delay programming a page flip, by both limiting the
> maximum amount of time per wait cycle and the maximum
> number of wait cycles. Continue the fl
Am Freitag, den 19.02.2016, 16:31 +0800 schrieb Jitao Shi:
> Add documentation for DT properties supported by
> ps8640 DSI-eDP converter.
>
> Signed-off-by: Jitao Shi
> Acked-by: Rob Herring
> Reviewed-by: Philipp Zabel
> ---
> Changes since v9:
> - No change
> ---
> .../devicetree/bindings/d
Am Freitag, den 19.02.2016, 16:31 +0800 schrieb Jitao Shi:
> This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
>
> Signed-off-by: Jitao Shi
> ---
> Changes since v9:
> - replace dev_kmalloc with devm_kmalloc in ps8640_get_modes
> - remove ps_bridge->dsi = devm_kzalloc(dev, si
From: Jose Abreu
The defconfigs for the AXS boards were updated to
enable Designware I2S driver.
Signed-off-by: Jose Abreu
---
arch/arc/configs/axs101_defconfig | 1 +
arch/arc/configs/axs103_defconfig | 1 +
arch/arc/configs/axs103_smp_defconfig | 1 +
3 files changed, 3 insertions(+)
From: Jose Abreu
HDMI audio support was added to the AXS board using an
I2S cpu driver and a custom platform driver.
The platform driver supports two channels @ 16 bits with
rates 32k, 44.1k and 48k. ALSA Simple audio card is used to
glue the cpu, platform and codec driver (adv7511).
Signed-off
From: Jose Abreu
The defconfigs for the AXS boards were updated so that
ALSA SoC is enabled and also the audio for the ADV7511
HDMI transmitter.
Signed-off-by: Jose Abreu
---
arch/arc/configs/axs101_defconfig | 3 +++
arch/arc/configs/axs103_defconfig | 5 +
arch/arc/configs/axs103
ARC AXS10x platforms consist of a mainboard with several peripherals.
One of those peripherals is an HDMI output port controlled by ADV7511
transmitter.
This patch set adds audio for the ADV7511 transmitter and I2S audio for the
AXS10x platform.
Jose Abreu (4):
drm/i2c/adv7511: Add audio supp
This patch replaces ARM-specific IOMMU-based DMA-mapping implementation
with generic IOMMU DMA-mapping code shared with ARM64 architecture. The
side-effect of this change is a switch from bitmap-based IO address space
management to tree-based code. There should be no functional changes
for drivers,
This patch moves all the IOMMU-based DMA-mapping code from arch/arm64/mm
to drivers/iommu/dma-iommu-ops.c. This way it can be easily shared with
ARM architecture, which will also use them.
Signed-off-by: Marek Szyprowski
---
arch/arm64/include/asm/dma-mapping.h | 39 ++-
arch/arm64/mm/dma-mappi
This patch replaces usage of ARM-specific IOMMU/DMA-mapping related calls
with new generic code for managing DMA-IOMMU integration layer. It also
removes all the hacks, which were needed to configure common DMA/IO address
space on the virtual exynos-drm device. Since moving Exynos GEM code to use
o
Dear All,
This is an initial RFC on the unification of IOMMU-based DMA-mapping
code for ARM and ARM64 architectures.
Right now ARM architecture still use my old code for IOMMU-based
DMA-mapping glue, initially merged in commit
4ce63fcd919c32d22528e54dcd89506962933719 ("ARM: dma-mapping: add suppo
https://bugzilla.kernel.org/show_bug.cgi?id=89521
varikonniemi at hush.com changed:
What|Removed |Added
CC||varikonniemi at hush.com
--- Co
ri-devel/attachments/20160219/795cafbe/attachment.html>
e316aa0, mesa git fe14110f, Xorg
1.18
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This fixes a regression introduced in Linux 4.4.
This is a port of the same fix for radeon-kms in the
patch "drm/radeon: Don't hang in radeon_flip_work_func
on disabled crtc. (v2)"
Limit the amount of time amdgpu_flip_work_func can
delay programming a page flip, by both limiting the
maximum amoun
This fixes a regression introduced in Linux 4.4.
Limit the amount of time radeon_flip_work_func can
delay programming a page flip, by both limiting the
maximum amount of time per wait cycle and the maximum
number of wait cycles. Continue the flip if the limit
is exceeded, even if that may result i
Two more patches for radeon-kms/amdgpu-kms to fix some new
regression introduced into Linux 4.4 by other fixes for
the vblank regressions in 4.4.
These fix fdo bug 93746 filed against Linux 4.4.
thanks,
-mario
On Thu, Feb 18, 2016 at 11:20 PM, Lukas Wunner wrote:
> Hi,
>
> On Thu, Feb 18, 2016 at 10:39:05PM +0100, Daniel Vetter wrote:
>> On Thu, Feb 18, 2016 at 9:34 PM, Lukas Wunner wrote:
>> >
>> >> Ok, makes sense. I still think adding the check to the client_register
>> >> function would be good, ju
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