[Bug 105256] Slow performance using glDrawElements calls with GL_UNSIGNED_BYTE indices

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105256

--- Comment #7 from H4nN1baL  ---
Just as a constancy and this does not remain in oblivion, this is related to
this another: https://bugs.freedesktop.org/show_bug.cgi?id=102204

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[Bug 102204] GLideN64 very slow on r600/radeonsi - GL_ARB_buffer_storage bug

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=102204

H4nN1baL  changed:

   What|Removed |Added

 QA Contact|reizemb...@gmail.com|dri-devel@lists.freedesktop
   ||.org
 Resolution|--- |WONTFIX
Summary|GLideN64 very slow on   |GLideN64 very slow on
   |r600/radeonsi   |r600/radeonsi -
   ||GL_ARB_buffer_storage bug
 Status|NEW |RESOLVED
   Keywords|love|

--- Comment #4 from H4nN1baL  ---
 This problem is currently "solved" on the GLide64 side. But it reveals a
serious problem with GL_ARB_buffer_storage extension.
 GL_UNSIGNED_BYTE with GL_ARB_buffer_storage extension it's extremely slow.
GL_UNSIGNED_SHORT with GL_ARB_buffer_storage extension is a little better but
is still slow. GL_UNSIGNED_BYTE without GL_ARB_buffer_storage is faster, but
not work at full speed. GL_UNSIGNED_SHORT without GL_ARB_buffer_storage works
perfect.

 The dangerous combination is GL_UNSIGNED_SHORT with GL_ARB_buffer_storage
extension, that may end up destroying the hardware under the right conditions.

 I quote myself:

Sorry for the delay, but I had a "technical mishap" ...my video card is DEAD,
stone-dead.
I am responsible for my unwise BIOS configuration (GART error reporting =
Enabled + PCIE Spread Spectrum = Auto) and "pushing stress" on GPU to render at
non-standard resolutions (monitor 1080p to 120Hz (max 144Hz), mupen64plus
windowed to 1400x1050) using a buggy extension like some kind of "steeplechase
generator" for benchmarking. Well, I reaped what I sowed.

 Original post there:
https://github.com/gonetz/GLideN64/pull/1738#issuecomment-369848827

Full history:
https://github.com/gonetz/GLideN64/issues/1561
https://bugs.freedesktop.org/show_bug.cgi?id=105256
https://github.com/gonetz/GLideN64/pull/1735
https://github.com/gonetz/GLideN64/pull/1738

cya

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[drm:drm-next 8/10] htmldocs: drivers/gpu/drm/drm_vblank.c:1252: warning: Function parameter or member 'dev' not described in 'drm_vblank_restore'

[kbuild test robot]

tree:   git://people.freedesktop.org/~airlied/linux.git drm-next
head:   128ccceaba8656573b8b0f86d3ab6e38094cc754
commit: f073d78eeb8efd85718e611c15f9a78647751dea [8/10] Merge tag 
'drm-intel-next-2018-02-21' of git://anongit.freedesktop.org/drm/drm-intel into 
drm-next
reproduce: make htmldocs

All warnings (new ones prefixed by >>):

   include/net/cfg80211.h:4129: warning: Function parameter or member 'wext.ie' 
not described in 'wireless_dev'
   include/net/cfg80211.h:4129: warning: Function parameter or member 
'wext.ie_len' not described in 'wireless_dev'
   include/net/cfg80211.h:4129: warning: Function parameter or member 
'wext.bssid' not described in 'wireless_dev'
   include/net/cfg80211.h:4129: warning: Function parameter or member 
'wext.prev_bssid' not described in 'wireless_dev'
   include/net/cfg80211.h:4129: warning: Function parameter or member 
'wext.ssid' not described in 'wireless_dev'
   include/net/cfg80211.h:4129: warning: Function parameter or member 
'wext.default_key' not described in 'wireless_dev'
   include/net/cfg80211.h:4129: warning: Function parameter or member 
'wext.default_mgmt_key' not described in 'wireless_dev'
   include/net/cfg80211.h:4129: warning: Function parameter or member 
'wext.prev_bssid_valid' not described in 'wireless_dev'
   include/net/mac80211.h:2259: warning: Function parameter or member 
'radiotap_timestamp.units_pos' not described in 'ieee80211_hw'
   include/net/mac80211.h:2259: warning: Function parameter or member 
'radiotap_timestamp.accuracy' not described in 'ieee80211_hw'
   include/net/mac80211.h:950: warning: Function parameter or member 'rates' 
not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.rts_cts_rate_idx' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.use_rts' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.use_cts_prot' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.short_preamble' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.skip_table' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.jiffies' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.vif' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.hw_key' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.flags' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'control.enqueue_time' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 'ack' not 
described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'ack.cookie' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'status.rates' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'status.ack_signal' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'status.ampdu_ack_len' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'status.ampdu_len' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'status.antenna' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'status.tx_time' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'status_driver_data' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'driver_rates' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 'pad' not 
described in 'ieee80211_tx_info'
   include/net/mac80211.h:950: warning: Function parameter or member 
'rate_driver_data' not described in 'ieee80211_tx_info'
   net/mac80211/sta_info.h:584: warning: Function parameter or member 
'rx_stats_avg' not described in 'sta_info'
   net/mac80211/sta_info.h:584: warning: Function parameter or member 
'rx_stats_avg.signal' not described in 'sta_info'
   net/mac80211/sta_info.h:584: warning: Function parameter or member 
'rx_stats_avg.chain_signal' not described in 'sta_info'
   net/mac80211/sta_info.h:584: warning: Function parameter or member 
'status_stats.filtered' not described in 'sta_info'
   net/mac80211/sta_info.h:584: warning: Function parameter or member 

[radeon-alex:drm-next-4.17 458/491] drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:3617:13: error: implicit declaration of function 'amdgpu_acpi_pcie_performance_request'; did you mean 'sm

[kbuild test robot]

tree:   git://people.freedesktop.org/~agd5f/linux.git drm-next-4.17
head:   f6c3b601bd490eda08c27b03607448abd4b4841b
commit: e1deba285156fb4023bb48f22068de5b60e34e15 [458/491] drm/amd/pp: Use 
amdgpu acpi helper functions in powerplay
config: sparc64-allyesconfig (attached as .config)
compiler: sparc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout e1deba285156fb4023bb48f22068de5b60e34e15
# save the attached .config to linux build tree
make.cross ARCH=sparc64 

All errors (new ones prefixed by >>):

   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c: In function 
'smu7_request_link_speed_change_before_state_change':
>> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:3617:13: error: 
>> implicit declaration of function 'amdgpu_acpi_pcie_performance_request'; did 
>> you mean 'smu7_pcie_performance_request'? 
>> [-Werror=implicit-function-declaration]
   if (0 == amdgpu_acpi_pcie_performance_request(hwmgr->adev, 
PCIE_PERF_REQ_GEN3, false))
^~~~
smu7_pcie_performance_request
   cc1: some warnings being treated as errors

vim +3617 drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c

  3591  
  3592  static int smu7_request_link_speed_change_before_state_change(
  3593  struct pp_hwmgr *hwmgr, const void *input)
  3594  {
  3595  const struct phm_set_power_state_input *states =
  3596  (const struct phm_set_power_state_input *)input;
  3597  struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
  3598  const struct smu7_power_state *smu7_nps =
  3599  
cast_const_phw_smu7_power_state(states->pnew_state);
  3600  const struct smu7_power_state *polaris10_cps =
  3601  
cast_const_phw_smu7_power_state(states->pcurrent_state);
  3602  
  3603  uint16_t target_link_speed = smu7_get_maximum_link_speed(hwmgr, 
smu7_nps);
  3604  uint16_t current_link_speed;
  3605  
  3606  if (data->force_pcie_gen == PP_PCIEGenInvalid)
  3607  current_link_speed = smu7_get_maximum_link_speed(hwmgr, 
polaris10_cps);
  3608  else
  3609  current_link_speed = data->force_pcie_gen;
  3610  
  3611  data->force_pcie_gen = PP_PCIEGenInvalid;
  3612  data->pspp_notify_required = false;
  3613  
  3614  if (target_link_speed > current_link_speed) {
  3615  switch (target_link_speed) {
  3616  case PP_PCIEGen3:
> 3617  if (0 == 
> amdgpu_acpi_pcie_performance_request(hwmgr->adev, PCIE_PERF_REQ_GEN3, false))
  3618  break;
  3619  data->force_pcie_gen = PP_PCIEGen2;
  3620  if (current_link_speed == PP_PCIEGen2)
  3621  break;
  3622  case PP_PCIEGen2:
  3623  if (0 == 
amdgpu_acpi_pcie_performance_request(hwmgr->adev, PCIE_PERF_REQ_GEN2, false))
  3624  break;
  3625  default:
  3626  data->force_pcie_gen = 
smu7_get_current_pcie_speed(hwmgr);
  3627  break;
  3628  }
  3629  } else {
  3630  if (target_link_speed < current_link_speed)
  3631  data->pspp_notify_required = true;
  3632  }
  3633  
  3634  return 0;
  3635  }
  3636  

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


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[Bug 105433] Unreliable Modesetting on Tonga with two DVI Screens

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105433

--- Comment #1 from Thomas R.  ---
Created attachment 137980
  --> https://bugs.freedesktop.org/attachment.cgi?id=137980=edit
dmesg of boot, start of X and xrandr

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[Bug 105433] Unreliable Modesetting on Tonga with two DVI Screens

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105433

Bug ID: 105433
   Summary: Unreliable Modesetting on Tonga with two DVI Screens
   Product: DRI
   Version: DRI git
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Severity: normal
  Priority: medium
 Component: DRM/AMDgpu
  Assignee: dri-devel@lists.freedesktop.org
  Reporter: freedesktop-b...@digital-trauma.de

Two devices connected via DVI, one not coming up (powersave, no signal). On
retry , they may swap their working state, or both go to energy save, or
rarely, both work. This happens regardless of resolutions set on the screens in
question.

Screens: 2 x Benq GHDL
Connected via DVI (both straight to card)

Card: ASUS Strix R9285 DC2OC 2GD5

Kernel: amd-staging-drm-next 6e62bc7a123b "drm/amdgpu:Always save uvd vcpu_bo
in VM Mode"

Bug report as discussed in bug 100919.
Possibly related to bug 91202.

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[Bug 104064] (DC 4.15-rc2) WARNING: CPU: 4 PID: 75 at drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:601 dm_suspend+0x4e/0x60 [amdgpu]

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104064

taij...@posteo.de changed:

   What|Removed |Added

 Attachment #137852|0   |1
is obsolete||

--- Comment #29 from taij...@posteo.de ---
Created attachment 137979
  --> https://bugs.freedesktop.org/attachment.cgi?id=137979=edit
dmesg with 4.17-wip-d1eeebbd78fd and dc=1

OK, I've gotten around to doing some more testing and playing around with some
more kcl setting, in order to better debug my crashing issues. Here's what I
found.

1) I believe that the crashing issues I kept having with force_atpx=1 and dc=1
after repeated or longer lasting invocations of the dGPU might have been
because of the shitty ACPI/UEFI implementation of my laptop vendor. I have now
tried setting acpi.osi=!* acpi.osi='Windos 2015' and voilá, the crashing has
vanished. So that seems to be a problem on that end, unfortunately improbable
to ever get properly fixed... But at least there is a workaround and the
problem does not appear to be with your code!

2) The inconsistend dpm behaviour between dc=1 and dc=0 is still a thing.
force_atpx=1 plus dc=1 gives me wonderful dpm with the dGPU fully powering down
between uses. force_atpx=1 plus dc=0 does not. No idea what's up with that.

3) There is a new bug, probably introduced by this commit:
https://cgit.freedesktop.org/~agd5f/linux/patch/?id=7c8c32854566dd9fb2ad4108029670604bc77b19.
On hybrid gpu laptops amdgpu does not actually control the brightness of the
internal screen, because that is controlled by the iGPU. So amdgpu should
probably not try. Maybe put a check in there? There is a crash referenced
related to this issue in the attached dmesg output, look starting at
[10.234751].

I hope this helps and isn't too late for a last minute pull to drm-next for
4.17, because I'd really like to see the force_atpx option in there!

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[Bug 197925] [amdgpu_dc][carrizo] multiple monitor handling errors

[bugzilla-daemon]

https://bugzilla.kernel.org/show_bug.cgi?id=197925

--- Comment #14 from kwka...@gmx.com ---
(In reply to Harry Wentland from comment #13)
> kwkaess, are you talking about the error message when saying "still not
> fixed" or the (arguably more disruptive and important) non-desirable
> behaviors mentioned in comment 1?

Hey, sorry I didn't get back to this.

I meant the other non-desireable behaviors. Some of them were fixed
temporarily, but experienced regressions.

However, I just pulled, built, and am testing the latest 4.16 fixes (ones
pulled mainstream - I'm on torvalds/linux.git commit
3266b5bd97eaa72793df0b6e5a106c69ccc166c4). The three problems I already listed
(excluding the message, but I don't really care about the message) ~seem~ to be
fixed.

There is a new problem. On return from blank screens, the color is all screwy
until I log in (when gnome blanks the screen to enter the user session from the
gdm login screen).  I consider this minor, since I always have to login anyway,
and the color isn't screwy enough to prevent me from doing this.


I will continue to test and report back.

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Re: [PATCH v2 1/2] spi: Split spi message into chunks of <65535 in the spi subsystem

[Geert Uytterhoeven]

Hi Meghana,

On Sat, Mar 10, 2018 at 4:51 PM, Meghana Madhyastha
 wrote:
> Split spi messages into chunks of <65535 in the spi subsystem and remove the 
> message
> length warning in bcm2835_spi_can_dma. This is so that the messages can be 
> transferred
> via dma and that the tinydrm drivers need not split it.
>
> Signed-off-by: Meghana Madhyastha 

Thanks for your patch!

> --- a/drivers/spi/spi.c
> +++ b/drivers/spi/spi.c
> @@ -1242,6 +1242,14 @@ static void __spi_pump_messages(struct spi_controller 
> *ctlr, bool in_kthread)
> trace_spi_message_start(ctlr->cur_msg);
>
> if (ctlr->prepare_message) {
> +   gfp_t gfp_flags = GFP_KERNEL | GFP_DMA;
> +   size_t max_transfer_size = 32000;

Do you really want to impose this arbitrary limit (which BTW doesn't match
the value in the patch description) to each and every SPI controller driver?

> +   ret = spi_split_transfers_maxsize(ctlr, ctlr->cur_msg, 
> max_transfer_size, gfp_flags);
> +   if (ret) {
> +   dev_err(>dev,
> +   "failed to split message\n");
> +   goto out;
> +   }
> ret = ctlr->prepare_message(ctlr, ctlr->cur_msg);
> if (ret) {
> dev_err(>dev, "failed to prepare message: %d\n",

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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Re: [PATCH v2 0/3] drm: Add LVDS decoder bridge

[jacopo mondi]

Hello Archit,

On Sat, Mar 10, 2018 at 11:23:19AM +0530, Archit Taneja wrote:
> Hi,
>
> On Friday 09 March 2018 07:21 PM, Jacopo Mondi wrote:
> >Hello,
> >after some discussion on the proposed bindings for generic lvds decoder 
> > and
> >Thine THC63LVD1024, I decided to drop the THC63 specific part and just live 
> >with
> >a transparent decoder that does not support any configuration from DT.
> >
> >Dropping THC63 support to avoid discussion on how to better implement support
> >for a DRM bridge with 2 input ports and focus on LVDS mode propagation 
> >through
> >bridges as explained in v1 cover letter (for DRM people: please see [1] as 
> >why
> >I find difficult to implement support for bridges with multiple input 
> >endpoints)
> >
> >Same base branch as v1, with same patches for V3M Eagle applied on top.
> >git://jmondi.org/linux v3m/v4.16-rc3/base
> >
> >Thanks
> >j
> >
> >v1 -> v2:
> >- Drop support for THC63LVD1024
> >
> >[1] I had a quick at how to model a DRM bridge with multiple input
> >ports, and I see a blocker in how DRM identifies and matches bridges using
> >the devices node in place of the endpoint nodes.
> >
> >As THC63LVD1024 supports up to 2 LVDS inputs and 2 LVDS outputs, I see only
> >a few ways to support that:
> >  1) register 2 drm bridges from the same driver (one for each input/output 
> > pair)
> > but they would both be matches on the same device node when the 
> > preceding
> > bridge calls "of_drm_find_bridge()".
>
> I think this is the way to go. DRM doesn't say anywhere that we can't have 2
> drm_bridge-s contained in a single device. About the issue with
> of_drm_find_bridge(), if you set the 2 bridge's 'of_node' field to
> the bridge1 and bridge2 nodes as shown below, wouldn't that suffice. From
> what I know, we don't necessarily need to set the bridge's of_node
> to the device (i.e, thschip) itself.

That's fine, but this implies that the preceding bridge (or encoder) in the
DRM pipeline has then to collect the "port" node and match on it
specifically when it attaches this driver. This introduces an ad-hoc
policy that prevents this driver from being easily integrated in
existing pipelines (where bridges are matched on the device node).

Also, I don't know much about the DRM framework, but it seems to me
that the helper function designed to find the next component to attach
to in the DRM pipeline is:

drm_of_find_panel_or_bridge():
remote = of_graph_get_remote_node();
ep = of_graph_get_endpoint_by_regs();
return of_graph_get_remote_port_parent();  <-- This returns the 
device node
of_drm_find_panel(remote);
of_drm_find_bridge(remote);

I so dare to say matching on device node is kind of the intended way
to do things in DRM, and this driver with two endpoints that wants to
be matched on port nodes would be kind of special one that does not
work as other driver expects to.

Is my understanding correct, or have I misinterpreted something?

Thanks
   j

>
> thschip {
>   ...
>   ports {
>   bridge1: port@0 {
>   ...
>   };
>
>   bridge2: port@1 {
>   ...
>   };
>   };
> };
>
>
> Thanks,
> Archit
>
> >  2) register a single bridge with multiple "next bridges", but when the 
> > bridge
> > gets attached I don't see a way on how to identify on which next bridge
> > "drm_bridge_attach()" on, as it depends on the endpoint the current 
> > bridge
> > has been attached on first, and we don't have that information.
> >  3) Register more instances of the same chip in DTS, one for each 
> > input/output
> > pair. They gonna share supplies and gpios, and I don't like that.
> >
> >I had a quick look at the currently in mainline bridges and none of them has
> >multiple input endpoints, except for HDMI audio endpoint, which I haven't 
> >found
> >in use in any DTS. I guess the problem has been already debated and maybe 
> >solved
> >in the past, so feel free to point me to other sources.
> >
> >Jacopo Mondi (3):
> >   dt-bindings: display: bridge: Document LVDS to parallel decoder
> >   drm: bridge: Add LVDS decoder driver
> >   arm64: dts: renesas: Add LVDS decoder to R-Car V3M Eagle
> >
> >  .../bindings/display/bridge/lvds-decoder.txt   |  42 ++
> >  arch/arm64/boot/dts/renesas/r8a77970-eagle.dts |  31 +++-
> >  drivers/gpu/drm/bridge/Kconfig |   8 ++
> >  drivers/gpu/drm/bridge/Makefile|   1 +
> >  drivers/gpu/drm/bridge/lvds-decoder.c  | 157 
> > +
> >  5 files changed, 237 insertions(+), 2 deletions(-)
> >  create mode 100644 
> > Documentation/devicetree/bindings/display/bridge/lvds-decoder.txt
> >  create mode 100644 drivers/gpu/drm/bridge/lvds-decoder.c
> >
> >--
> >2.7.4
> >
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Re: [RFC PATCH 00/13] SVM (share virtual memory) with HMM in nouveau

[Jerome Glisse]

On Sat, Mar 10, 2018 at 04:01:58PM +0100, Christian König wrote:
> Good to have an example how to use HMM with an upstream driver.

I have tried to keep hardware specific bits and overal HMM logic separated
so people can use it as an example without needing to understand NVidia GPU.
I think i can still split patches a bit some more along that line.

> Am 10.03.2018 um 04:21 schrieb jgli...@redhat.com:
> > This patchset adds SVM (Share Virtual Memory) using HMM (Heterogeneous
> > Memory Management) to the nouveau driver. SVM means that GPU threads
> > spawn by GPU driver for a specific user process can access any valid
> > CPU address in that process. A valid pointer is a pointer inside an
> > area coming from mmap of private, share or regular file. Pointer to
> > a mmap of a device file or special file are not supported.
> 
> BTW: The recent IOMMU patches which generalized the PASID handling calls
> this SVA for shared virtual address space.
> 
> We should probably sync up with those guys at some point what naming to use.

Let's create a committee to decide on the name ;)

> 
> > This is an RFC for few reasons technical reasons listed below and also
> > because we are still working on a proper open source userspace (namely
> > a OpenCL 2.0 for nouveau inside mesa). Open source userspace being a
> > requirement for the DRM subsystem. I pushed in [1] a simple standalone
> > program that can be use to test SVM through HMM with nouveau. I expect
> > we will have a somewhat working userspace in the coming weeks, work
> > being well underway and some patches have already been posted on mesa
> > mailing list.
> 
> You could use the OpenGL extensions to import arbitrary user pointers as
> bringup use case for this.
> 
> I was hoping to do the same for my ATC/HMM work on radeonsi and as far
> as I know there are even piglit tests for that.

OpenGL extensions are bit too limited when i checked them long time ago.
I think we rather have something like OpenCL ready so that it is easier
to justify some of the more compute only features. My timeline is 4.18
for HMM inside nouveau upstream (roughly) as first some other changes to
nouveau need to land. So i am thinking (hoping :)) that all the stars
will be properly align by then.


> > They are work underway to revamp nouveau channel creation with a new
> > userspace API. So we might want to delay upstreaming until this lands.
> > We can stil discuss one aspect specific to HMM here namely the issue
> > around GEM objects used for some specific part of the GPU. Some engine
> > inside the GPU (engine are a GPU block like the display block which
> > is responsible of scaning memory to send out a picture through some
> > connector for instance HDMI or DisplayPort) can only access memory
> > with virtual address below (1 << 40). To accomodate those we need to
> > create a "hole" inside the process address space. This patchset have
> > a hack for that (patch 13 HACK FOR HMM AREA), it reserves a range of
> > device file offset so that process can mmap this range with PROT_NONE
> > to create a hole (process must make sure the hole is below 1 << 40).
> > I feel un-easy of doing it this way but maybe it is ok with other
> > folks.
> 
> Well we have essentially the same problem with pre gfx9 AMD hardware.
> Felix might have some advise how it was solved for HSA.

Here my concern is around API expose to userspace for this "hole"/reserved
area. I considered several options:
  - Have userspace allocate all object needed by GPU and mmap them
at proper VA (Virtual Address) this need kernel to do special
handling for those like blocking userspace access for sensitive
object (page table, command buffer, ...) so a lot of kernel
changes. This somewhat make sense with some of the nouveau API
rework that have not landed yet.
  - Have kernel directly create a PROT_NONE vma against device file. Nice
thing is that it is easier in kernel to find a hole of proper size
in proper range. But this is ugly and i think i would be stone to
death if i were to propose that.
  - just pick a range and cross finger that userspace never got any of
its allocation in it (at least any allocation it want to use on the
GPU).
  - Have userspace mmap with PROT_NONE a specific region of the device
file to create this hole (this is what this patchset does). Note
that PROT_NONE is not strictly needed but this is what it would get
as device driver block any access to it.

Any other solution i missed ?

I don't like any of the above ... but this is more of a taste thing. The
last option is the least ugly in my view. Also in this patchset if user-
space munmap() the hole or any part of it, it does kill HMM for the
process. This is an important details for security and consistant result
in front of buggy/rogue applications.

Other aspect bother me too, like should i create a region in device file
so that mmap need to happen in the region, or should i just pick a single

Re: [PATCH v2 3/3] arm64: dts: renesas: Add LVDS decoder to R-Car V3M Eagle

[jacopo mondi]

Hi Sergei,

On Fri, Mar 09, 2018 at 08:30:36PM +0300, Sergei Shtylyov wrote:
> On 03/09/2018 04:51 PM, Jacopo Mondi wrote:
>
> > The R-Car V3M Eagle board includes a transparent LVDS decoder, connected
> > to the on-chip LVDS encoder output on one side and to HDMI encoder
> > ADV7511w on the other one.
> >
> > As the decoder does not need any configuration it has been so-far
> > omitted from DTS. Now that a driver for transparent LVDS decoder is
> > available, describe it in DT as well.
> >
> > Signed-off-by: Jacopo Mondi 
> > ---
> >  arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 31 
> > --
> >  1 file changed, 29 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts 
> > b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
> > index c0fd144..0a95c20 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
> > +++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
> > @@ -42,6 +42,33 @@
> > };
> > };
> > };
> > +
> > +   lvds,decoder {
>
>I said hyphen (-), not comma (,)! :-)

Ahah ok, my bad, I somehow confused the two :)
It looked weird to me, but I thought you were pointing me to some
convention I didn't know about!

I'll change this in v3

Thanks
  j
>
> [...]
>
> MBR, Sergei
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[PATCH v5 17/36] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip

[Enric Balletbo i Serra]

From: zain wang 

There are some different bits between Rockchip and Exynos in register
"AUX_PD". This patch fixes the incorrect operations about it.

Cc: Douglas Anderson 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 117 --
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |   2 +
 2 files changed, 65 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index bb72f8b0e603..dee1ba109b5f 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -248,76 +248,85 @@ void analogix_dp_set_analog_power_down(struct 
analogix_dp_device *dp,
 {
u32 reg;
u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
+   u32 mask;
 
if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
phy_pd_addr = ANALOGIX_DP_PD;
 
switch (block) {
case AUX_BLOCK:
-   if (enable) {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg |= AUX_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   } else {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg &= ~AUX_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   }
+   if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
+   mask = RK_AUX_PD;
+   else
+   mask = AUX_PD;
+
+   reg = readl(dp->reg_base + phy_pd_addr);
+   if (enable)
+   reg |= mask;
+   else
+   reg &= ~mask;
+   writel(reg, dp->reg_base + phy_pd_addr);
break;
case CH0_BLOCK:
-   if (enable) {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg |= CH0_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   } else {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg &= ~CH0_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   }
+   mask = CH0_PD;
+   reg = readl(dp->reg_base + phy_pd_addr);
+
+   if (enable)
+   reg |= mask;
+   else
+   reg &= ~mask;
+   writel(reg, dp->reg_base + phy_pd_addr);
break;
case CH1_BLOCK:
-   if (enable) {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg |= CH1_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   } else {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg &= ~CH1_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   }
+   mask = CH1_PD;
+   reg = readl(dp->reg_base + phy_pd_addr);
+
+   if (enable)
+   reg |= mask;
+   else
+   reg &= ~mask;
+   writel(reg, dp->reg_base + phy_pd_addr);
break;
case CH2_BLOCK:
-   if (enable) {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg |= CH2_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   } else {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg &= ~CH2_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   }
+   mask = CH2_PD;
+   reg = readl(dp->reg_base + phy_pd_addr);
+
+   if (enable)
+   reg |= mask;
+   else
+   reg &= ~mask;
+   writel(reg, dp->reg_base + phy_pd_addr);
break;
case CH3_BLOCK:
-   if (enable) {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg |= CH3_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   } else {
-   reg = readl(dp->reg_base + phy_pd_addr);
-   reg &= ~CH3_PD;
-   writel(reg, dp->reg_base + phy_pd_addr);
-   }
+   mask = CH3_PD;
+   reg = readl(dp->reg_base + phy_pd_addr);
+
+   if (enable)
+   reg |= mask;
+

[PATCH v5 27/36] drm/rockchip: pre dither down when output bpc is 8bit

[Enric Balletbo i Serra]

From: Mark Yao 

Some encoder have a crc verification check, crc check fail if
input and output data is not equal.

That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.

So pre dither down vop data to 8bit if panel's bpc is 8.

Signed-off-by: Mark Yao 
[seanpaul resolved conflict in rockchip_drm_vop.c]
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 2 ++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 6 ++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 1 +
 5 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c 
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8c884f9ce713..b3f46ed24cdc 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -218,6 +218,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder 
*encoder,
  struct drm_connector_state *conn_state)
 {
struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+   struct drm_display_info *di = _state->connector->display_info;
 
/*
 * The hardware IC designed that VOP must output the RGB10 video
@@ -229,6 +230,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder 
*encoder,
 
s->output_mode = ROCKCHIP_OUT_MODE_;
s->output_type = DRM_MODE_CONNECTOR_eDP;
+   s->output_bpc = di->bpc;
 
return 0;
 }
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h 
b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 9c064a40458b..3a6ebfc26036 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -36,6 +36,7 @@ struct rockchip_crtc_state {
struct drm_crtc_state base;
int output_type;
int output_mode;
+   int output_bpc;
 };
 #define to_rockchip_crtc_state(s) \
container_of(s, struct rockchip_crtc_state, base)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index b601c59e76a8..e2c9ee3204f4 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -923,6 +923,12 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
if (s->output_mode == ROCKCHIP_OUT_MODE_ &&
!(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
s->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+   if (s->output_mode == ROCKCHIP_OUT_MODE_ && s->output_bpc == 8)
+   VOP_REG_SET(vop, common, pre_dither_down, 1);
+   else
+   VOP_REG_SET(vop, common, pre_dither_down, 0);
+
VOP_REG_SET(vop, common, out_mode, s->output_mode);
 
VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 56bbd2e2a8ef..084acdd0019a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -67,6 +67,7 @@ struct vop_common {
struct vop_reg cfg_done;
struct vop_reg dsp_blank;
struct vop_reg data_blank;
+   struct vop_reg pre_dither_down;
struct vop_reg dither_down;
struct vop_reg dither_up;
struct vop_reg gate_en;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c 
b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 2e4eea3459fe..08023d3ecb76 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -264,6 +264,7 @@ static const struct vop_common rk3288_common = {
.standby = VOP_REG_SYNC(RK3288_SYS_CTRL, 0x1, 22),
.gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
.mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
+   .pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
.data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
-- 
2.16.1

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[PATCH v5 19/36] drm/rockchip: Restore psr->state when enable/disable psr failed

[Enric Balletbo i Serra]

From: zain wang 

If we failed disable psr, it would hang the display until next psr
cycle coming. So we should restore psr->state when it failed.

Cc: Tomasz Figa 
Signed-off-by: zain wang 
Signed-off-by: Douglas Anderson 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  4 +++-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c| 10 +-
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c| 20 +---
 drivers/gpu/drm/rockchip/rockchip_drm_psr.h|  2 +-
 4 files changed, 22 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index be6eddd0d0a7..1f1cb624414d 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -153,8 +153,10 @@ int analogix_dp_disable_psr(struct analogix_dp_device *dp)
psr_vsc.DB1 = 0;
 
ret = drm_dp_dpcd_writeb(>aux, DP_SET_POWER, DP_SET_POWER_D0);
-   if (ret != 1)
+   if (ret != 1) {
dev_err(dp->dev, "Failed to set DP Power0 %d\n", ret);
+   return ret;
+   }
 
return analogix_dp_send_psr_spd(dp, _vsc, false);
 }
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c 
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 3e8bf79bea58..8c884f9ce713 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -77,13 +77,13 @@ struct rockchip_dp_device {
struct analogix_dp_plat_data plat_data;
 };
 
-static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
+static int analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 {
struct rockchip_dp_device *dp = to_dp(encoder);
int ret;
 
if (!analogix_dp_psr_enabled(dp->adp))
-   return;
+   return 0;
 
DRM_DEV_DEBUG(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
 
@@ -91,13 +91,13 @@ static void analogix_dp_psr_set(struct drm_encoder 
*encoder, bool enabled)
 PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
if (ret) {
DRM_DEV_ERROR(dp->dev, "line flag interrupt did not arrive\n");
-   return;
+   return -ETIMEDOUT;
}
 
if (enabled)
-   analogix_dp_enable_psr(dp->adp);
+   return analogix_dp_enable_psr(dp->adp);
else
-   analogix_dp_disable_psr(dp->adp);
+   return analogix_dp_disable_psr(dp->adp);
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index b339ca943139..9376f4396b6b 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -36,7 +36,7 @@ struct psr_drv {
 
struct delayed_work flush_work;
 
-   void (*set)(struct drm_encoder *encoder, bool enable);
+   int (*set)(struct drm_encoder *encoder, bool enable);
 };
 
 static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
@@ -93,19 +93,25 @@ static void psr_set_state_locked(struct psr_drv *psr, enum 
psr_state state)
return;
}
 
-   psr->state = state;
-
/* Actually commit the state change to hardware */
-   switch (psr->state) {
+   switch (state) {
case PSR_ENABLE:
-   psr->set(psr->encoder, true);
+   if (psr->set(psr->encoder, true))
+   return;
break;
 
case PSR_DISABLE:
case PSR_FLUSH:
-   psr->set(psr->encoder, false);
+   if (psr->set(psr->encoder, false))
+   return;
break;
+
+   default:
+   pr_err("%s: Unknown state %d\n", __func__, state);
+   return;
}
+
+   psr->state = state;
 }
 
 static void psr_set_state(struct psr_drv *psr, enum psr_state state)
@@ -229,7 +235,7 @@ EXPORT_SYMBOL(rockchip_drm_psr_flush_all);
  * Zero on success, negative errno on failure.
  */
 int rockchip_drm_psr_register(struct drm_encoder *encoder,
-   void (*psr_set)(struct drm_encoder *, bool enable))
+   int (*psr_set)(struct drm_encoder *, bool enable))
 {
struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
struct psr_drv *psr;
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h 
b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
index b1ea0155e57c..06537ee27565 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
+++ 

[PATCH v5 03/36] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Enric Balletbo i Serra]

From: zain wang 

There is a race between AUX CH bring-up and enabling bridge which will
cause link training to fail. To avoid hitting it, don't change psr state
while enabling the bridge.

Cc: Tomeu Vizoso 
Cc: Sean Paul 
Signed-off-by: zain wang 
Signed-off-by: Caesar Wang 
[seanpaul fixed up the commit message a bit and renamed *_supported to 
*_enabled]
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c|  2 +-
 include/drm/bridge/analogix_dp.h   |  2 +-
 4 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index e738aa6de1af..ee00d3d920e0 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -98,18 +98,18 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device 
*dp)
return 0;
 }
 
-int analogix_dp_psr_supported(struct analogix_dp_device *dp)
+int analogix_dp_psr_enabled(struct analogix_dp_device *dp)
 {
 
-   return dp->psr_support;
+   return dp->psr_enable;
 }
-EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
+EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
 
 int analogix_dp_enable_psr(struct analogix_dp_device *dp)
 {
struct edp_vsc_psr psr_vsc;
 
-   if (!dp->psr_support)
+   if (!dp->psr_enable)
return 0;
 
/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
@@ -131,7 +131,7 @@ int analogix_dp_disable_psr(struct analogix_dp_device *dp)
struct edp_vsc_psr psr_vsc;
int ret;
 
-   if (!dp->psr_support)
+   if (!dp->psr_enable)
return 0;
 
/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
@@ -871,8 +871,8 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
/* Enable video */
analogix_dp_start_video(dp);
 
-   dp->psr_support = analogix_dp_detect_sink_psr(dp);
-   if (dp->psr_support)
+   dp->psr_enable = analogix_dp_detect_sink_psr(dp);
+   if (dp->psr_enable)
analogix_dp_enable_sink_psr(dp);
 }
 
@@ -1117,6 +1117,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge 
*bridge)
if (ret)
DRM_ERROR("failed to setup the panel ret = %d\n", ret);
 
+   dp->psr_enable = false;
dp->dpms_mode = DRM_MODE_DPMS_OFF;
 }
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index b039b28d8fcc..e135a42cb19e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -170,7 +170,7 @@ struct analogix_dp_device {
int dpms_mode;
int hpd_gpio;
boolforce_hpd;
-   boolpsr_support;
+   boolpsr_enable;
 
struct mutexpanel_lock;
boolpanel_is_modeset;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c 
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 36334839a3f8..3e8bf79bea58 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -82,7 +82,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, 
bool enabled)
struct rockchip_dp_device *dp = to_dp(encoder);
int ret;
 
-   if (!analogix_dp_psr_supported(dp->adp))
+   if (!analogix_dp_psr_enabled(dp->adp))
return;
 
DRM_DEV_DEBUG(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 711fff9b6803..e9a1116d2f8e 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -41,7 +41,7 @@ struct analogix_dp_plat_data {
 struct drm_connector *);
 };
 
-int analogix_dp_psr_supported(struct analogix_dp_device *dp);
+int analogix_dp_psr_enabled(struct analogix_dp_device *dp);
 int analogix_dp_enable_psr(struct analogix_dp_device *dp);
 int analogix_dp_disable_psr(struct analogix_dp_device *dp);
 
-- 
2.16.1

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[PATCH v5 35/36] drm/rockchip: Disallow PSR for the whole atomic commit

[Enric Balletbo i Serra]

From: Tomasz Figa 

Currently PSR flush is triggered from CRTC's .atomic_begin() callback,
which is executed after modeset disables and enables and before plane
updates are committed. Since PSR flush and re-enable can be triggered
asynchronously by external sources (input event, delayed work), it can
race with hardware programming done in the aforementioned stages.

This patch blocks the PSR completely before hardware programming part
begins and unblock after it ends. This relies on reference counted PSR
disable introduced with previous patch.

Cc: Kristian H. Kristensen 
Signed-off-by: Tomasz Figa 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/rockchip_drm_fb.c  | 61 -
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |  7 
 2 files changed, 60 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
index e266539e04e5..d4f4118b482d 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
@@ -167,8 +167,67 @@ rockchip_user_fb_create(struct drm_device *dev, struct 
drm_file *file_priv,
return ERR_PTR(ret);
 }
 
+static void
+rockchip_drm_psr_inhibit_get_state(struct drm_atomic_state *state)
+{
+   struct drm_crtc *crtc;
+   struct drm_crtc_state *crtc_state;
+   struct drm_encoder *encoder;
+   u32 encoder_mask = 0;
+   int i;
+
+   for_each_old_crtc_in_state(state, crtc, crtc_state, i) {
+   encoder_mask |= crtc_state->encoder_mask;
+   encoder_mask |= crtc->state->encoder_mask;
+   }
+
+   drm_for_each_encoder_mask(encoder, state->dev, encoder_mask)
+   rockchip_drm_psr_inhibit_get(encoder);
+}
+
+static void
+rockchip_drm_psr_inhibit_put_state(struct drm_atomic_state *state)
+{
+   struct drm_crtc *crtc;
+   struct drm_crtc_state *crtc_state;
+   struct drm_encoder *encoder;
+   u32 encoder_mask = 0;
+   int i;
+
+   for_each_old_crtc_in_state(state, crtc, crtc_state, i) {
+   encoder_mask |= crtc_state->encoder_mask;
+   encoder_mask |= crtc->state->encoder_mask;
+   }
+
+   drm_for_each_encoder_mask(encoder, state->dev, encoder_mask)
+   rockchip_drm_psr_inhibit_put(encoder);
+}
+
+static void
+rockchip_atomic_helper_commit_tail_rpm(struct drm_atomic_state *old_state)
+{
+   struct drm_device *dev = old_state->dev;
+
+   rockchip_drm_psr_inhibit_get_state(old_state);
+
+   drm_atomic_helper_commit_modeset_disables(dev, old_state);
+
+   drm_atomic_helper_commit_modeset_enables(dev, old_state);
+
+   drm_atomic_helper_commit_planes(dev, old_state,
+   DRM_PLANE_COMMIT_ACTIVE_ONLY);
+
+   rockchip_drm_psr_inhibit_put_state(old_state);
+
+   drm_atomic_helper_commit_hw_done(old_state);
+
+   drm_atomic_helper_wait_for_vblanks(dev, old_state);
+
+   drm_atomic_helper_cleanup_planes(dev, old_state);
+}
+
 static const struct drm_mode_config_helper_funcs rockchip_mode_config_helpers 
= {
-   .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
+   .atomic_commit_tail = rockchip_atomic_helper_commit_tail_rpm,
 };
 
 static const struct drm_mode_config_funcs rockchip_drm_mode_config_funcs = {
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index e2c9ee3204f4..27e37b653b61 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1027,16 +1027,9 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
}
 }
 
-static void vop_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_crtc_state)
-{
-   rockchip_drm_psr_flush(crtc);
-}
-
 static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = {
.mode_fixup = vop_crtc_mode_fixup,
.atomic_flush = vop_crtc_atomic_flush,
-   .atomic_begin = vop_crtc_atomic_begin,
.atomic_enable = vop_crtc_atomic_enable,
.atomic_disable = vop_crtc_atomic_disable,
 };
-- 
2.16.1

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[PATCH v5 22/36] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1

[Enric Balletbo i Serra]

From: zain wang 

Register ANALOGIX_DP_FUNC_EN_1(offset 0x18), Rockchip is different to
Exynos:

on Exynos edp phy,
BIT 7   MASTER_VID_FUNC_EN_N
BIT 6   reserved
BIT 5   SLAVE_VID_FUNC_EN_N

on Rockchip edp phy,
BIT 7   reserved
BIT 6   RK_VID_CAP_FUNC_EN_N
BIT 5   RK_VID_FIFO_FUNC_EN_N

So, we should do some private operations to Rockchip.

Cc: Tomasz Figa 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 19 ++-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |  2 ++
 2 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 02ab1aaa9993..4eae206ec31b 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -126,9 +126,14 @@ void analogix_dp_reset(struct analogix_dp_device *dp)
analogix_dp_stop_video(dp);
analogix_dp_enable_video_mute(dp, 0);
 
-   reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
-   AUD_FIFO_FUNC_EN_N | AUD_FUNC_EN_N |
-   HDCP_FUNC_EN_N | SW_FUNC_EN_N;
+   if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
+   reg = RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N |
+   SW_FUNC_EN_N;
+   else
+   reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
+   AUD_FIFO_FUNC_EN_N | AUD_FUNC_EN_N |
+   HDCP_FUNC_EN_N | SW_FUNC_EN_N;
+
writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
 
reg = SSC_FUNC_EN_N | AUX_FUNC_EN_N |
@@ -971,8 +976,12 @@ void analogix_dp_config_video_slave_mode(struct 
analogix_dp_device *dp)
u32 reg;
 
reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
-   reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
-   reg |= MASTER_VID_FUNC_EN_N;
+   if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
+   reg &= ~(RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N);
+   } else {
+   reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
+   reg |= MASTER_VID_FUNC_EN_N;
+   }
writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
 
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index b633a4a5082a..0cf27c731727 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -127,7 +127,9 @@
 
 /* ANALOGIX_DP_FUNC_EN_1 */
 #define MASTER_VID_FUNC_EN_N   (0x1 << 7)
+#define RK_VID_CAP_FUNC_EN_N   (0x1 << 6)
 #define SLAVE_VID_FUNC_EN_N(0x1 << 5)
+#define RK_VID_FIFO_FUNC_EN_N  (0x1 << 5)
 #define AUD_FIFO_FUNC_EN_N (0x1 << 4)
 #define AUD_FUNC_EN_N  (0x1 << 3)
 #define HDCP_FUNC_EN_N (0x1 << 2)
-- 
2.16.1

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[PATCH v5 34/36] drm/rockchip: Disable PSR from reboot notifier

[Enric Balletbo i Serra]

From: Tomasz Figa 

It looks like the driver subsystem detaches devices from power domains
at shutdown without consent of the drivers. This means that we might have
our power domain turned off behind our back and the only way to avoid
problems is to stop doing any hardware programming at some point before
the power is cut. A reboot notifier, despite being a misnomer and
handling shutdowns as well, is a good place to do it.

Signed-off-by: Tomasz Figa 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 24 
 1 file changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index e7e16d92d5a1..1bf5cba9a64d 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -13,6 +13,7 @@
  */
 
 #include 
+#include 
 
 #include 
 #include 
@@ -33,6 +34,7 @@ struct psr_drv {
struct delayed_work flush_work;
struct work_struct  disable_work;
 
+   struct notifier_block   reboot_nb;
struct input_handlerinput_handler;
 
int (*set)(struct drm_encoder *encoder, bool enable);
@@ -309,6 +311,24 @@ static const struct input_device_id psr_ids[] = {
{ },
 };
 
+static int rockchip_drm_psr_reboot_notifier(struct notifier_block *nb,
+   unsigned long action, void *data)
+{
+   struct psr_drv *psr = container_of(nb, struct psr_drv, reboot_nb);
+
+   /*
+* It looks like the driver subsystem detaches devices from power
+* domains at shutdown without consent of the drivers. This means
+* that we might have our power domain turned off behind our back
+* and the only way to avoid problems is to stop doing any hardware
+* programming after this point, which is achieved by the unbalanced
+* call below.
+*/
+   rockchip_drm_psr_inhibit_get(psr->encoder);
+
+   return 0;
+}
+
 /**
  * rockchip_drm_psr_register - register encoder to psr driver
  * @encoder: encoder that obtain the PSR function
@@ -361,6 +381,9 @@ int rockchip_drm_psr_register(struct drm_encoder *encoder,
if (error)
goto err1;
 
+   psr->reboot_nb.notifier_call = rockchip_drm_psr_reboot_notifier;
+   register_reboot_notifier(>reboot_nb);
+
mutex_lock(_drv->psr_list_lock);
list_add_tail(>list, _drv->psr_list);
mutex_unlock(_drv->psr_list_lock);
@@ -403,6 +426,7 @@ void rockchip_drm_psr_unregister(struct drm_encoder 
*encoder)
WARN_ON(psr->inhibit_count != 1);
 
list_del(>list);
+   unregister_reboot_notifier(>reboot_nb);
input_unregister_handler(>input_handler);
kfree(psr->input_handler.name);
kfree(psr);
-- 
2.16.1

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[PATCH v2 1/3] dt-bindings: display: bridge: Document LVDS to parallel decoder

[Jacopo Mondi]

Document transparent LVDS to CMOS/TTL decoder that do not require any
configuration.

Signed-off-by: Jacopo Mondi 
---
 .../bindings/display/bridge/lvds-decoder.txt   | 42 ++
 1 file changed, 42 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/lvds-decoder.txt

diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-decoder.txt 
b/Documentation/devicetree/bindings/display/bridge/lvds-decoder.txt
new file mode 100644
index 000..a9b1d9e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/lvds-decoder.txt
@@ -0,0 +1,42 @@
+LVDS to Parallel CMOS/TTL decoder
+-
+
+Bindings for transparent LVDS to CMOS/TTL parallel data decoder that don't
+require any configuration.
+
+Required properties:
+- compatible: shall be "lvds-decoder"
+
+The LVDS decoder has two video ports, whose connections are modeled according
+to OF graph bindings specified by Documentation/devicetree/bindings/graph.txt
+
+- Port@0: LVDS input port
+- Port@1: Digital CMOS/TTL parallel output
+
+Example:
+---
+
+   lvds,decoder: decoder-0 {
+   compatible = "lvds-decoder";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+
+   lvds_dec_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1{
+   reg = <1>;
+
+   lvds_dec_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
-- 
2.7.4

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[PATCH v5 06/36] drm/rockchip: Only wait for panel ACK on PSR entry

[Enric Balletbo i Serra]

From: zain wang 

We currently wait for the panel to mirror our intended PSR state
before continuing on both PSR enter and PSR exit. This is really
only important to do when we're entering PSR, since we want to
be sure the last frame we pushed is being served from the panel's
internal fb before shutting down the soc blocks (vop/analogix).

This patch changes the behavior such that we only wait for the
panel to complete the PSR transition when we're entering PSR, and
to skip verification when we're exiting.

Cc: Stéphane Marchesin 
Cc: Sonny Rao 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 4 ++--
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 5 -
 3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 806c3878b3d6..5a2e35dc41e3 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -125,7 +125,7 @@ int analogix_dp_enable_psr(struct analogix_dp_device *dp)
psr_vsc.DB0 = 0;
psr_vsc.DB1 = EDP_VSC_PSR_STATE_ACTIVE | EDP_VSC_PSR_CRC_VALUES_VALID;
 
-   return analogix_dp_send_psr_spd(dp, _vsc);
+   return analogix_dp_send_psr_spd(dp, _vsc, true);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_enable_psr);
 
@@ -151,7 +151,7 @@ int analogix_dp_disable_psr(struct analogix_dp_device *dp)
if (ret != 1)
dev_err(dp->dev, "Failed to set DP Power0 %d\n", ret);
 
-   return analogix_dp_send_psr_spd(dp, _vsc);
+   return analogix_dp_send_psr_spd(dp, _vsc, false);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index 920607d7eb3e..6a96ef7e6934 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -253,7 +253,7 @@ void analogix_dp_enable_scrambling(struct 
analogix_dp_device *dp);
 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
 void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp);
 int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
-struct edp_vsc_psr *vsc);
+struct edp_vsc_psr *vsc, bool blocking);
 ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 struct drm_dp_aux_msg *msg);
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 005a3f7005d2..9df2f3ef000c 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -1007,7 +1007,7 @@ static ssize_t analogix_dp_get_psr_status(struct 
analogix_dp_device *dp)
 }
 
 int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
-struct edp_vsc_psr *vsc)
+struct edp_vsc_psr *vsc, bool blocking)
 {
unsigned int val;
int ret;
@@ -1053,6 +1053,9 @@ int analogix_dp_send_psr_spd(struct analogix_dp_device 
*dp,
val |= IF_EN;
writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
 
+   if (!blocking)
+   return 0;
+
ret = readx_poll_timeout(analogix_dp_get_psr_status, dp, psr_status,
psr_status >= 0 &&
((vsc->DB1 && psr_status == DP_PSR_SINK_ACTIVE_RFB) ||
-- 
2.16.1

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[PATCH v5 32/36] drm/rockchip: psr: Avoid redundant calls to .set() callback

[Enric Balletbo i Serra]

From: Tomasz Figa 

The first time after we call rockchip_drm_do_flush() after
rockchip_drm_psr_register(), we go from PSR_DISABLE to PSR_FLUSH. The
difference between PSR_DISABLE and PSR_FLUSH is whether or not we have a
delayed work pending - PSR is off in either state.  However
psr_set_state() only catches the transition from PSR_FLUSH to
PSR_DISABLE (which never happens), while going from PSR_DISABLE to
PSR_FLUSH triggers a call to psr->set() to disable PSR while it's
already disabled. This triggers the eDP PHY power-on sequence without
being shut down first and this seems to occasionally leave the encoder
unable to later enable PSR. Let's just simplify the state machine and
simply consider PSR_DISABLE and PSR_FLUSH the same state. This lets us
represent the hardware state by a simple boolean called "enabled" and,
while at it, rename the misleading "active" boolean to "inhibit", which
represents the purpose much better.

Also, userspace can (and does) trigger the rockchip_drm_do_flush() path
from drmModeDirtyFB() at any time, whether or the encoder is active. If
no mode is set, we call into analogix_dp_psr_set() which returns -EINVAL
because encoder->crtc is NULL. Avoid this by starting out with
psr->allowed set to false.

Signed-off-by: Kristian H. Kristensen 
Signed-off-by: Tomasz Figa 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 79 +
 1 file changed, 23 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index c8655e625ba2..448c5fde241c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -22,19 +22,13 @@
 
 #define PSR_FLUSH_TIMEOUT_MS   100
 
-enum psr_state {
-   PSR_FLUSH,
-   PSR_ENABLE,
-   PSR_DISABLE,
-};
-
 struct psr_drv {
struct list_headlist;
struct drm_encoder  *encoder;
 
struct mutexlock;
boolactive;
-   enum psr_state  state;
+   boolenabled;
 
struct delayed_work flush_work;
struct work_struct  disable_work;
@@ -78,52 +72,22 @@ static struct psr_drv *find_psr_by_encoder(struct 
drm_encoder *encoder)
return psr;
 }
 
-static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state)
+static int psr_set_state_locked(struct psr_drv *psr, bool enable)
 {
-   /*
-* Allowed finite state machine:
-*
-*   PSR_ENABLE  < = = = = = >  PSR_FLUSH
-*   | ^|
-*   | ||
-*   v ||
-*   PSR_DISABLE < - - - - - - - - -
-*/
-   if (state == psr->state || !psr->active)
-   return;
-
-   /* Already disabled in flush, change the state, but not the hardware */
-   if (state == PSR_DISABLE && psr->state == PSR_FLUSH) {
-   psr->state = state;
-   return;
-   }
+   int ret;
 
-   /* Actually commit the state change to hardware */
-   switch (state) {
-   case PSR_ENABLE:
-   if (psr->set(psr->encoder, true))
-   return;
-   break;
-
-   case PSR_DISABLE:
-   case PSR_FLUSH:
-   if (psr->set(psr->encoder, false))
-   return;
-   break;
-
-   default:
-   pr_err("%s: Unknown state %d\n", __func__, state);
-   return;
-   }
+   if (!psr->active)
+   return -EINVAL;
 
-   psr->state = state;
-}
+   if (enable == psr->enabled)
+   return 0;
 
-static void psr_set_state(struct psr_drv *psr, enum psr_state state)
-{
-   mutex_lock(>lock);
-   psr_set_state_locked(psr, state);
-   mutex_unlock(>lock);
+   ret = psr->set(psr->encoder, enable);
+   if (ret)
+   return ret;
+
+   psr->enabled = enable;
+   return 0;
 }
 
 static void psr_flush_handler(struct work_struct *work)
@@ -131,10 +95,8 @@ static void psr_flush_handler(struct work_struct *work)
struct psr_drv *psr = container_of(to_delayed_work(work),
   struct psr_drv, flush_work);
 
-   /* If the state has changed since we initiated the flush, do nothing */
mutex_lock(>lock);
-   if (psr->state == PSR_FLUSH)
-   psr_set_state_locked(psr, PSR_ENABLE);
+   psr_set_state_locked(psr, true);
mutex_unlock(>lock);
 }
 
@@ -176,6 +138,7 @@ int rockchip_drm_psr_deactivate(struct drm_encoder *encoder)
 
mutex_lock(>lock);
psr->active = false;
+   psr->enabled = 

Re: [PATCH] drm/etnaviv: init DMA ops for virtual master device

[Russell King - ARM Linux]

On Fri, Mar 09, 2018 at 12:20:59PM +0100, Lucas Stach wrote:
> All the DRM GEM dma-buf import/export operations are done through the
> virtual DRM master device. As this isn't instanciated from DT anymore
> we need to make sure the DMA ops are set up correctly.
> 
> Signed-off-by: Lucas Stach 
> ---
>  drivers/gpu/drm/etnaviv/etnaviv_drv.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c 
> b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> index ab50090d066c..d7666aed943b 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> @@ -655,7 +655,8 @@ static int etnaviv_pdev_probe(struct platform_device 
> *pdev)
>   struct device *dev = >dev;
>   struct component_match *match = NULL;
>  
> - dma_set_coherent_mask(>dev, DMA_BIT_MASK(32));
> + arch_setup_dma_ops(dev, 0, 0x1, NULL, false);
> + dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));

NAK.  dma_coerce_mask_and_coherent() exists for broken devices.  Please
instead ensure that the device is created with the proper default DMA
mask.

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[PATCH v5 20/36] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll

[Enric Balletbo i Serra]

From: zain wang 

There is no register named ANALOGIX_DP_PLL_CTL in Rockchip edp phy reg
list.  We should use BIT_4 in ANALOGIX_DP_PD to control the pll power
instead of ANALOGIX_DP_PLL_CTL.

Cc: Douglas Anderson 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 20 
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 7b7fd227e1f9..02ab1aaa9993 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -230,16 +230,20 @@ enum pll_status analogix_dp_get_pll_lock_status(struct 
analogix_dp_device *dp)
 void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable)
 {
u32 reg;
+   u32 mask = DP_PLL_PD;
+   u32 pd_addr = ANALOGIX_DP_PLL_CTL;
 
-   if (enable) {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
-   reg |= DP_PLL_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
-   } else {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
-   reg &= ~DP_PLL_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
+   if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
+   pd_addr = ANALOGIX_DP_PD;
+   mask = RK_PLL_PD;
}
+
+   reg = readl(dp->reg_base + pd_addr);
+   if (enable)
+   reg |= mask;
+   else
+   reg &= ~mask;
+   writel(reg, dp->reg_base + pd_addr);
 }
 
 void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
-- 
2.16.1

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[PATCH v5 36/36] drm/rockchip: psr: Remove flush by CRTC

[Enric Balletbo i Serra]

From: Tomasz Figa 

It is not used anymore after last changes and it was not even correct to
begin with as it assumed a 1:1 relation between a CRTC and encoder,
while in fact a CRTC can be attached to multiple encoders.

Signed-off-by: Tomasz Figa 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 35 -
 drivers/gpu/drm/rockchip/rockchip_drm_psr.h |  1 -
 2 files changed, 36 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index 1bf5cba9a64d..b1988ac758d5 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -40,23 +40,6 @@ struct psr_drv {
int (*set)(struct drm_encoder *encoder, bool enable);
 };
 
-static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
-{
-   struct rockchip_drm_private *drm_drv = crtc->dev->dev_private;
-   struct psr_drv *psr;
-
-   mutex_lock(_drv->psr_list_lock);
-   list_for_each_entry(psr, _drv->psr_list, list) {
-   if (psr->encoder->crtc == crtc)
-   goto out;
-   }
-   psr = ERR_PTR(-ENODEV);
-
-out:
-   mutex_unlock(_drv->psr_list_lock);
-   return psr;
-}
-
 static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder)
 {
struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
@@ -173,24 +156,6 @@ static void rockchip_drm_do_flush(struct psr_drv *psr)
mutex_unlock(>lock);
 }
 
-/**
- * rockchip_drm_psr_flush - flush a single pipe
- * @crtc: CRTC of the pipe to flush
- *
- * Returns:
- * 0 on success, -errno on fail
- */
-int rockchip_drm_psr_flush(struct drm_crtc *crtc)
-{
-   struct psr_drv *psr = find_psr_by_crtc(crtc);
-   if (IS_ERR(psr))
-   return PTR_ERR(psr);
-
-   rockchip_drm_do_flush(psr);
-   return 0;
-}
-EXPORT_SYMBOL(rockchip_drm_psr_flush);
-
 /**
  * rockchip_drm_psr_flush_all - force to flush all registered PSR encoders
  * @dev: drm device
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h 
b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
index 40e026c14168..860c62494496 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
@@ -16,7 +16,6 @@
 #define __ROCKCHIP_DRM_PSR___
 
 void rockchip_drm_psr_flush_all(struct drm_device *dev);
-int rockchip_drm_psr_flush(struct drm_crtc *crtc);
 
 int rockchip_drm_psr_inhibit_put(struct drm_encoder *encoder);
 int rockchip_drm_psr_inhibit_get(struct drm_encoder *encoder);
-- 
2.16.1

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Re: [PATCH] drm/etnaviv: correct timeout calculation

[Russell King - ARM Linux]

On Fri, Mar 09, 2018 at 12:52:40PM +0100, Lucas Stach wrote:
> Hi Russell,
> 
> Am Freitag, den 09.03.2018, 11:44 + schrieb Russell King - ARM Linux:
> > Hi Lucas,
> > 
> > Please retain my authorship of my patch, which was sent on 23 Oct 2017.
> > The patch you have below is 100% identical to that which I sent.
> 
> I'll gladly do so if you provide me a proper Signed-off-by for this
> patch, which was missing from your 23 Oct 2017 submission.

It wasn't a submission, but was for discussion and I provided two
variants.

However, by doing what you've done, you're effectively claiming
authorship of my work, and as works are copyrighted, that's really
not nice.  Unfortunately, the Linux community has tied itself in
knots over the "author must sign-off on the patch" despite DCO (b)
existing, and DCO (b) specifically allows for patches that are not
authored by the submitter to be incorporated into the kernel.

If you take the authorship and the manufactured sign-off requirements
together, then effectively no one has the ability to submit code
that they did not author.

Nevertheless, for this patch,

Signed-off-by: Russell King 

> 
> > You should also point out, as per the follow-on discussion, that using
> > clock_gettime() on 32-bit systems will not work once the time it
> > reports wraps - so something like the comment I suggested in a follow
> > up patch:
> > 
> > + * Etnaviv timeouts are specified wrt CLOCK_MONOTONIC, not jiffies.
> > + * We need to calculate the timeout in terms of number of jiffies
> > + * between the specified timeout and the current CLOCK_MONOTONIC time.
> > + * Note: clock_gettime() is 32-bit on 32-bit arch.  Using 64-bit
> > + * timespec math here just means that when a wrap occurs, the
> > + * specified timeout goes into the past and we can't request a
> > + * timeout in the future: IOW, the code breaks.
> > 
> > would be sensible either in the commit message or the code.
> 
> I'll add it to the commit message, as I think the discussion with Arnd
> established that this is a very theoretical risk, not likely to be hit
> in practice.

True, it's only likely to be hit if a system is up for 68 years, but
it's still worth documenting.

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[PATCH v5 09/36] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up

[Enric Balletbo i Serra]

From: zain wang 

Panel would reset its setting when it powers down. It would forget the last
succeeded link training setting. So we can't use the last successful link
training setting to do fast link training. Let's reset fast_train_enable in
analogix_dp_bridge_disable();

Cc: Stéphane Marchesin 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 9 +
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index f9661b410cb9..ea7a80a989c6 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -579,14 +579,14 @@ static int analogix_dp_process_equalizer_training(struct 
analogix_dp_device *dp)
if (retval != 1) {
dev_err(dp->dev, "failed to read downspread %d\n",
retval);
-   dp->fast_train_support = false;
+   dp->fast_train_enable = false;
} else {
-   dp->fast_train_support =
+   dp->fast_train_enable =
(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
true : false;
}
dev_dbg(dp->dev, "fast link training %s\n",
-   dp->fast_train_support ? "supported" : "unsupported");
+   dp->fast_train_enable ? "supported" : "unsupported");
 
/* set enhanced mode if available */
analogix_dp_set_enhanced_mode(dp);
@@ -793,7 +793,7 @@ static int analogix_dp_fast_link_train(struct 
analogix_dp_device *dp)
 
 static int analogix_dp_train_link(struct analogix_dp_device *dp)
 {
-   if (dp->fast_train_support)
+   if (dp->fast_train_enable)
return analogix_dp_fast_link_train(dp);
 
return analogix_dp_full_link_train(dp, dp->video_info.max_lane_count,
@@ -1197,6 +1197,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge 
*bridge)
DRM_ERROR("failed to setup the panel ret = %d\n", ret);
 
dp->psr_enable = false;
+   dp->fast_train_enable = false;
dp->dpms_mode = DRM_MODE_DPMS_OFF;
 }
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index 6a96ef7e6934..403ff853464b 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -173,7 +173,7 @@ struct analogix_dp_device {
int hpd_gpio;
boolforce_hpd;
boolpsr_enable;
-   boolfast_train_support;
+   boolfast_train_enable;
 
struct mutexpanel_lock;
boolpanel_is_modeset;
-- 
2.16.1

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[PATCH v5 30/36] drm/rockchip: Disable PSR on input events

[Enric Balletbo i Serra]

From: "Kristian H. Kristensen" 

To improve PSR exit latency, we speculatively start exiting when we
receive input events. Occasionally, this may lead to false positives,
but most of the time we get a head start on coming out of PSR. Depending
on how userspace takes to produce a new frame in response to the event,
this can completely hide the exit latency. In case of Chrome OS, we
typically get the input notifier 50ms or more before the dirty_fb
triggered exit.

Signed-off-by: Kristian H. Kristensen 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 134 
 1 file changed, 134 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index 9376f4396b6b..a107845ba97c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -12,6 +12,8 @@
  * GNU General Public License for more details.
  */
 
+#include 
+
 #include 
 #include 
 
@@ -35,6 +37,9 @@ struct psr_drv {
enum psr_state  state;
 
struct delayed_work flush_work;
+   struct work_struct  disable_work;
+
+   struct input_handlerinput_handler;
 
int (*set)(struct drm_encoder *encoder, bool enable);
 };
@@ -133,6 +138,18 @@ static void psr_flush_handler(struct work_struct *work)
mutex_unlock(>lock);
 }
 
+static void psr_disable_handler(struct work_struct *work)
+{
+   struct psr_drv *psr = container_of(work, struct psr_drv, disable_work);
+
+   /* If the state has changed since we initiated the flush, do nothing */
+   mutex_lock(>lock);
+   if (psr->state == PSR_ENABLE)
+   psr_set_state_locked(psr, PSR_FLUSH);
+   mutex_unlock(>lock);
+   mod_delayed_work(system_wq, >flush_work, PSR_FLUSH_TIMEOUT_MS);
+}
+
 /**
  * rockchip_drm_psr_activate - activate PSR on the given pipe
  * @encoder: encoder to obtain the PSR encoder
@@ -173,6 +190,7 @@ int rockchip_drm_psr_deactivate(struct drm_encoder *encoder)
psr->active = false;
mutex_unlock(>lock);
cancel_delayed_work_sync(>flush_work);
+   cancel_work_sync(>disable_work);
 
return 0;
 }
@@ -226,6 +244,95 @@ void rockchip_drm_psr_flush_all(struct drm_device *dev)
 }
 EXPORT_SYMBOL(rockchip_drm_psr_flush_all);
 
+static void psr_input_event(struct input_handle *handle,
+   unsigned int type, unsigned int code,
+   int value)
+{
+   struct psr_drv *psr = handle->handler->private;
+
+   schedule_work(>disable_work);
+}
+
+static int psr_input_connect(struct input_handler *handler,
+struct input_dev *dev,
+const struct input_device_id *id)
+{
+   struct input_handle *handle;
+   int error;
+
+   handle = kzalloc(sizeof(struct input_handle), GFP_KERNEL);
+   if (!handle)
+   return -ENOMEM;
+
+   handle->dev = dev;
+   handle->handler = handler;
+   handle->name = "rockchip-psr";
+
+   error = input_register_handle(handle);
+   if (error)
+   goto err2;
+
+   error = input_open_device(handle);
+   if (error)
+   goto err1;
+
+   return 0;
+
+err1:
+   input_unregister_handle(handle);
+err2:
+   kfree(handle);
+   return error;
+}
+
+static void psr_input_disconnect(struct input_handle *handle)
+{
+   input_close_device(handle);
+   input_unregister_handle(handle);
+   kfree(handle);
+}
+
+/* Same device ids as cpu-boost */
+static const struct input_device_id psr_ids[] = {
+   {
+   .flags = INPUT_DEVICE_ID_MATCH_EVBIT |
+INPUT_DEVICE_ID_MATCH_ABSBIT,
+   .evbit = { BIT_MASK(EV_ABS) },
+   .absbit = { [BIT_WORD(ABS_MT_POSITION_X)] =
+   BIT_MASK(ABS_MT_POSITION_X) |
+   BIT_MASK(ABS_MT_POSITION_Y) },
+   }, /* multi-touch touchscreen */
+   {
+   .flags = INPUT_DEVICE_ID_MATCH_EVBIT,
+   .evbit = { BIT_MASK(EV_ABS) },
+   .absbit = { [BIT_WORD(ABS_X)] = BIT_MASK(ABS_X) }
+
+   }, /* stylus or joystick device */
+   {
+   .flags = INPUT_DEVICE_ID_MATCH_EVBIT,
+   .evbit = { BIT_MASK(EV_KEY) },
+   .keybit = { [BIT_WORD(BTN_LEFT)] = BIT_MASK(BTN_LEFT) },
+   }, /* pointer (e.g. trackpad, mouse) */
+   {
+   .flags = INPUT_DEVICE_ID_MATCH_EVBIT,
+   .evbit = { BIT_MASK(EV_KEY) },
+   .keybit = { [BIT_WORD(KEY_ESC)] = BIT_MASK(KEY_ESC) },
+   }, /* keyboard */
+   {
+   .flags = INPUT_DEVICE_ID_MATCH_EVBIT |
+   

[PATCH v5 12/36] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy

[Enric Balletbo i Serra]

From: zain wang 

Following the correct power up sequence:
dp_pd=ff => dp_pd=7f => wait 10us => dp_pd=00

Cc: Stéphane Marchesin 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 10 --
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |  3 +++
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index b47c5af43560..bb72f8b0e603 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -321,10 +321,16 @@ void analogix_dp_set_analog_power_down(struct 
analogix_dp_device *dp,
break;
case POWER_ALL:
if (enable) {
-   reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD |
-   CH1_PD | CH0_PD;
+   reg = DP_ALL_PD;
writel(reg, dp->reg_base + phy_pd_addr);
} else {
+   reg = DP_ALL_PD;
+   writel(reg, dp->reg_base + phy_pd_addr);
+   usleep_range(10, 15);
+   reg &= ~DP_INC_BG;
+   writel(reg, dp->reg_base + phy_pd_addr);
+   usleep_range(10, 15);
+
writel(0x00, dp->reg_base + phy_pd_addr);
}
break;
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 40200c652533..9602668669f4 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -342,12 +342,15 @@
 #define DP_PLL_REF_BIT_1_2500V (0x7 << 0)
 
 /* ANALOGIX_DP_PHY_PD */
+#define DP_INC_BG  (0x1 << 7)
+#define DP_EXP_BG  (0x1 << 6)
 #define DP_PHY_PD  (0x1 << 5)
 #define AUX_PD (0x1 << 4)
 #define CH3_PD (0x1 << 3)
 #define CH2_PD (0x1 << 2)
 #define CH1_PD (0x1 << 1)
 #define CH0_PD (0x1 << 0)
+#define DP_ALL_PD  (0xff)
 
 /* ANALOGIX_DP_PHY_TEST */
 #define MACRO_RST  (0x1 << 5)
-- 
2.16.1

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[PATCH v5 21/36] drm/bridge: analogix_dp: Fix timeout of video streamclk config

[Enric Balletbo i Serra]

From: zain wang 

The STRM_VALID bit in register ANALOGIX_DP_SYS_CTL_3 may be unstable,
so we may hit the error log "Timeout of video streamclk ok" since
checked this unstable bit.
In fact, we can go continue and the streamclk is ok if we wait enough time,
it does no effect on display.
Let's change this error to warn.

Cc: Douglas Anderson 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 1f1cb624414d..d76e1652b1fd 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -921,8 +921,9 @@ static int analogix_dp_config_video(struct 
analogix_dp_device *dp)
done_count = 0;
}
if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-   dev_err(dp->dev, "Timeout of video streamclk ok\n");
-   return -ETIMEDOUT;
+   dev_warn(dp->dev,
+"Ignoring timeout of video streamclk ok\n");
+   break;
}
 
usleep_range(1000, 1001);
-- 
2.16.1

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[PATCH v5 11/36] drm/bridge: analogix_dp: Wait for HPD signal before configuring link

[Enric Balletbo i Serra]

From: zain wang 

According to DP spec v1.3 chap 3.5.1.2 Link Training, Link Policy Maker
must first detect that the HPD signal is asserted high by the Downstream
Device before establishing a link with it.

Cc: Stéphane Marchesin 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index c81733b8185e..92fb9a072cb6 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1169,6 +1169,17 @@ static int analogix_dp_set_bridge(struct 
analogix_dp_device *dp)
if (ret)
goto out_dp_init;
 
+   /*
+* According to DP spec v1.3 chap 3.5.1.2 Link Training,
+* We should first make sure the HPD signal is asserted high by device
+* when we want to establish a link with it.
+*/
+   ret = analogix_dp_detect_hpd(dp);
+   if (ret) {
+   DRM_ERROR("failed to get hpd single ret = %d\n", ret);
+   goto out_dp_init;
+   }
+
ret = analogix_dp_commit(dp);
if (ret)
goto out_dp_init;
-- 
2.16.1

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[PATCH v5 02/36] drm/rockchip: Remove analogix psr worker

[Enric Balletbo i Serra]

From: Sean Paul 

Now that the spinlocks and timers are gone, we can remove the psr
worker located in rockchip's analogix driver and do the enable/disable
directly. This should simplify the code and remove races on disable.

Cc: 征增 王 
Cc: Stéphane Marchesin 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 31 ++---
 1 file changed, 2 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c 
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 7d76ff47028d..36334839a3f8 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -71,10 +71,6 @@ struct rockchip_dp_device {
struct regmap*grf;
struct reset_control *rst;
 
-   struct work_struct   psr_work;
-   struct mutex psr_lock;
-   unsigned int psr_state;
-
const struct rockchip_dp_chip_data *data;
 
struct analogix_dp_device *adp;
@@ -84,28 +80,13 @@ struct rockchip_dp_device {
 static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 {
struct rockchip_dp_device *dp = to_dp(encoder);
+   int ret;
 
if (!analogix_dp_psr_supported(dp->adp))
return;
 
DRM_DEV_DEBUG(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
 
-   mutex_lock(>psr_lock);
-   if (enabled)
-   dp->psr_state = EDP_VSC_PSR_STATE_ACTIVE;
-   else
-   dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
-
-   schedule_work(>psr_work);
-   mutex_unlock(>psr_lock);
-}
-
-static void analogix_dp_psr_work(struct work_struct *work)
-{
-   struct rockchip_dp_device *dp =
-   container_of(work, typeof(*dp), psr_work);
-   int ret;
-
ret = rockchip_drm_wait_vact_end(dp->encoder.crtc,
 PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
if (ret) {
@@ -113,12 +94,10 @@ static void analogix_dp_psr_work(struct work_struct *work)
return;
}
 
-   mutex_lock(>psr_lock);
-   if (dp->psr_state == EDP_VSC_PSR_STATE_ACTIVE)
+   if (enabled)
analogix_dp_enable_psr(dp->adp);
else
analogix_dp_disable_psr(dp->adp);
-   mutex_unlock(>psr_lock);
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
@@ -135,8 +114,6 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data 
*plat_data)
struct rockchip_dp_device *dp = to_dp(plat_data);
int ret;
 
-   cancel_work_sync(>psr_work);
-
ret = clk_prepare_enable(dp->pclk);
if (ret < 0) {
DRM_DEV_ERROR(dp->dev, "failed to enable pclk %d\n", ret);
@@ -355,10 +332,6 @@ static int rockchip_dp_bind(struct device *dev, struct 
device *master,
dp->plat_data.power_off = rockchip_dp_powerdown;
dp->plat_data.get_modes = rockchip_dp_get_modes;
 
-   mutex_init(>psr_lock);
-   dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
-   INIT_WORK(>psr_work, analogix_dp_psr_work);
-
ret = rockchip_drm_psr_register(>encoder, analogix_dp_psr_set);
if (ret < 0)
goto err_cleanup_encoder;
-- 
2.16.1

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[PATCH v5 05/36] drm/bridge: analogix_dp: add fast link train for eDP

[Enric Balletbo i Serra]

From: zain wang 

We would meet a short black screen when exit PSR with the full link
training, In this case, we should use fast link train instead of full
link training.

Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 142 -
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   3 +
 2 files changed, 114 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index ee00d3d920e0..806c3878b3d6 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -10,17 +10,18 @@
 * option) any later version.
 */
 
-#include 
-#include 
-#include 
 #include 
-#include 
+#include 
+#include 
+#include 
 #include 
+#include 
+#include 
+#include 
 #include 
 #include 
-#include 
-#include 
 #include 
+#include 
 
 #include 
 #include 
@@ -35,6 +36,8 @@
 
 #define to_dp(nm)  container_of(nm, struct analogix_dp_device, nm)
 
+static const bool verify_fast_training;
+
 struct bridge_init {
struct i2c_client *client;
struct device_node *node;
@@ -528,7 +531,7 @@ static int analogix_dp_process_equalizer_training(struct 
analogix_dp_device *dp)
 {
int lane, lane_count, retval;
u32 reg;
-   u8 link_align, link_status[2], adjust_request[2];
+   u8 link_align, link_status[2], adjust_request[2], spread;
 
usleep_range(400, 401);
 
@@ -571,6 +574,20 @@ static int analogix_dp_process_equalizer_training(struct 
analogix_dp_device *dp)
dev_dbg(dp->dev, "final lane count = %.2x\n",
dp->link_train.lane_count);
 
+   retval = drm_dp_dpcd_readb(>aux, DP_MAX_DOWNSPREAD,
+  );
+   if (retval != 1) {
+   dev_err(dp->dev, "failed to read downspread %d\n",
+   retval);
+   dp->fast_train_support = false;
+   } else {
+   dp->fast_train_support =
+   (spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
+   true : false;
+   }
+   dev_dbg(dp->dev, "fast link training %s\n",
+   dp->fast_train_support ? "supported" : "unsupported");
+
/* set enhanced mode if available */
analogix_dp_set_enhanced_mode(dp);
dp->link_train.lt_state = FINISHED;
@@ -627,10 +644,12 @@ static void analogix_dp_get_max_rx_lane_count(struct 
analogix_dp_device *dp,
*lane_count = DPCD_MAX_LANE_COUNT(data);
 }
 
-static void analogix_dp_init_training(struct analogix_dp_device *dp,
- enum link_lane_count_type max_lane,
- int max_rate)
+static int analogix_dp_full_link_train(struct analogix_dp_device *dp,
+  u32 max_lanes, u32 max_rate)
 {
+   int retval = 0;
+   bool training_finished = false;
+
/*
 * MACRO_RST must be applied after the PLL_LOCK to avoid
 * the DP inter pair skew issue for at least 10 us
@@ -656,18 +675,13 @@ static void analogix_dp_init_training(struct 
analogix_dp_device *dp,
}
 
/* Setup TX lane count & rate */
-   if (dp->link_train.lane_count > max_lane)
-   dp->link_train.lane_count = max_lane;
+   if (dp->link_train.lane_count > max_lanes)
+   dp->link_train.lane_count = max_lanes;
if (dp->link_train.link_rate > max_rate)
dp->link_train.link_rate = max_rate;
 
/* All DP analog module power up */
analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
-}
-
-static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
-{
-   int retval = 0, training_finished = 0;
 
dp->link_train.lt_state = START;
 
@@ -702,22 +716,88 @@ static int analogix_dp_sw_link_training(struct 
analogix_dp_device *dp)
return retval;
 }
 
-static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
- u32 count, u32 bwtype)
+static int analogix_dp_fast_link_train(struct analogix_dp_device *dp)
 {
-   int i;
-   int retval;
+   int i, ret;
+   u8 link_align, link_status[2];
+   enum pll_status status;
 
-   for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) {
-   analogix_dp_init_training(dp, count, bwtype);
-   retval = analogix_dp_sw_link_training(dp);
-   if (retval == 0)
-   break;
+   analogix_dp_reset_macro(dp);
+
+ 

[PATCH v5 25/36] drm/bridge: analogix_dp: Properly log AUX CH errors

[Enric Balletbo i Serra]

From: Douglas Anderson 

The code in analogix_dp_transfer() that was supposed to print out:
  AUX CH error happened

Was actually dead code. That's because the previous check (whether
the interrupt status indicated any errors) would have hit for all
errors anyway.

Let's combine the two error checks so we can actually see AUX CH
errors.  We'll also downgrade the message to a warning since some of
these types of errors might be expected for some displays.  If this
gets too noisy we can downgrade again to debug.

Cc: 征增 王 
Signed-off-by: Douglas Anderson 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 13 +
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 4eae206ec31b..58e8a28e99aa 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -1105,6 +1105,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device 
*dp,
 struct drm_dp_aux_msg *msg)
 {
u32 reg;
+   u32 status_reg;
u8 *buffer = msg->buffer;
unsigned int i;
int num_transferred = 0;
@@ -1193,16 +1194,12 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device 
*dp,
 
/* Clear interrupt source for AUX CH access error */
reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
-   if (reg & AUX_ERR) {
+   status_reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
+   if ((reg & AUX_ERR) || (status_reg & AUX_STATUS_MASK)) {
writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
-   goto aux_error;
-   }
 
-   /* Check AUX CH error access status */
-   reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
-   if ((reg & AUX_STATUS_MASK)) {
-   dev_err(dp->dev, "AUX CH error happened: %d\n\n",
-   reg & AUX_STATUS_MASK);
+   dev_warn(dp->dev, "AUX CH error happened: %#x (%d)\n",
+status_reg & AUX_STATUS_MASK, !!(reg & AUX_ERR));
goto aux_error;
}
 
-- 
2.16.1

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Re: [PATCH v2 3/3] arm64: dts: renesas: Add LVDS decoder to R-Car V3M Eagle

[Simon Horman]

On Fri, Mar 09, 2018 at 02:51:40PM +0100, Jacopo Mondi wrote:
> The R-Car V3M Eagle board includes a transparent LVDS decoder, connected
> to the on-chip LVDS encoder output on one side and to HDMI encoder
> ADV7511w on the other one.
> 
> As the decoder does not need any configuration it has been so-far
> omitted from DTS. Now that a driver for transparent LVDS decoder is
> available, describe it in DT as well.
> 
> Signed-off-by: Jacopo Mondi 

Thanks, I have marked this as deferred pending acceptance of the bindings.
Please repost or otherwise ping me once they have been accepted.
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[PATCH v5 24/36] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner

[Enric Balletbo i Serra]

From: Douglas Anderson 

The current user of the analogix power_off is "analogix_dp-rockchip".
That driver does this:
- deactivate PSR
- turn off a clock

Both of these things (especially deactive PSR) should be done before
we turn the PHY power off and turn off analog power.  Let's move the
callback up.

Note that without this patch (and with
https://patchwork.kernel.org/patch/9553349/ [seanpaul: this patch was
not applied, but it seems like the race can still occur]), I experienced
an error in reboot testing where one thread was at:

  rockchip_drm_psr_deactivate
  rockchip_dp_powerdown
  analogix_dp_bridge_disable
  drm_bridge_disable

...and the other thread was at:

  analogix_dp_send_psr_spd
  analogix_dp_enable_psr
  analogix_dp_psr_set
  psr_flush_handler

The flush handler thread was finding AUX channel errors and eventually
reported "Failed to apply PSR", where I had a kgdb breakpoint. Presumably
the device would have eventually given up and shut down anyway, but it
seems better to fix the order to be more correct.

Cc: Kristian H. Kristensen 
Signed-off-by: Douglas Anderson 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 37b16643f14c..eaf93cbd47a8 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1337,12 +1337,13 @@ static void analogix_dp_bridge_disable(struct 
drm_bridge *bridge)
}
 
disable_irq(dp->irq);
-   analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);
-   phy_power_off(dp->phy);
 
if (dp->plat_data->power_off)
dp->plat_data->power_off(dp->plat_data);
 
+   analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);
+   phy_power_off(dp->phy);
+
clk_disable_unprepare(dp->clock);
 
pm_runtime_put_sync(dp->dev);
-- 
2.16.1

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[PATCH v5 28/36] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts

[Enric Balletbo i Serra]

From: Douglas Anderson 

Some of the platform-specific stuff in rockchip_dp_poweron() needs to
happen before the generic code.  Some needs to happen after.  Let's
split the callback in two.

Specifically we can't start doing PSR work until _after_ the whole
controller is up, so don't set the enable until the end.

Cc: Kristian H. Kristensen 
Signed-off-by: Douglas Anderson 
[seanpaul added exynos change]
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  7 +--
 drivers/gpu/drm/exynos/exynos_dp.c |  2 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c| 12 ++--
 include/drm/bridge/analogix_dp.h   |  3 ++-
 4 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index eaf93cbd47a8..c527019daaa6 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1260,8 +1260,8 @@ static int analogix_dp_set_bridge(struct 
analogix_dp_device *dp)
goto out_dp_clk_pre;
}
 
-   if (dp->plat_data->power_on)
-   dp->plat_data->power_on(dp->plat_data);
+   if (dp->plat_data->power_on_start)
+   dp->plat_data->power_on_start(dp->plat_data);
 
phy_power_on(dp->phy);
 
@@ -1286,6 +1286,9 @@ static int analogix_dp_set_bridge(struct 
analogix_dp_device *dp)
goto out_dp_init;
}
 
+   if (dp->plat_data->power_on_end)
+   dp->plat_data->power_on_end(dp->plat_data);
+
enable_irq(dp->irq);
return 0;
 
diff --git a/drivers/gpu/drm/exynos/exynos_dp.c 
b/drivers/gpu/drm/exynos/exynos_dp.c
index 964831dab102..86330f396784 100644
--- a/drivers/gpu/drm/exynos/exynos_dp.c
+++ b/drivers/gpu/drm/exynos/exynos_dp.c
@@ -162,7 +162,7 @@ static int exynos_dp_bind(struct device *dev, struct device 
*master, void *data)
dp->drm_dev = drm_dev;
 
dp->plat_data.dev_type = EXYNOS_DP;
-   dp->plat_data.power_on = exynos_dp_poweron;
+   dp->plat_data.power_on_start = exynos_dp_poweron;
dp->plat_data.power_off = exynos_dp_poweroff;
dp->plat_data.attach = exynos_dp_bridge_attach;
dp->plat_data.get_modes = exynos_dp_get_modes;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c 
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index b3f46ed24cdc..23317a2269e1 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -109,7 +109,7 @@ static int rockchip_dp_pre_init(struct rockchip_dp_device 
*dp)
return 0;
 }
 
-static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
+static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
 {
struct rockchip_dp_device *dp = to_dp(plat_data);
int ret;
@@ -127,6 +127,13 @@ static int rockchip_dp_poweron(struct 
analogix_dp_plat_data *plat_data)
return ret;
}
 
+   return ret;
+}
+
+static int rockchip_dp_poweron_end(struct analogix_dp_plat_data *plat_data)
+{
+   struct rockchip_dp_device *dp = to_dp(plat_data);
+
return rockchip_drm_psr_activate(>encoder);
 }
 
@@ -330,7 +337,8 @@ static int rockchip_dp_bind(struct device *dev, struct 
device *master,
dp->plat_data.encoder = >encoder;
 
dp->plat_data.dev_type = dp->data->chip_type;
-   dp->plat_data.power_on = rockchip_dp_poweron;
+   dp->plat_data.power_on_start = rockchip_dp_poweron_start;
+   dp->plat_data.power_on_end = rockchip_dp_poweron_end;
dp->plat_data.power_off = rockchip_dp_powerdown;
dp->plat_data.get_modes = rockchip_dp_get_modes;
 
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index e9a1116d2f8e..475b706b49de 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -33,7 +33,8 @@ struct analogix_dp_plat_data {
struct drm_connector *connector;
bool skip_connector;
 
-   int (*power_on)(struct analogix_dp_plat_data *);
+   int (*power_on_start)(struct analogix_dp_plat_data *);
+   int (*power_on_end)(struct analogix_dp_plat_data *);
int (*power_off)(struct analogix_dp_plat_data *);
int (*attach)(struct analogix_dp_plat_data *, struct drm_bridge *,
  struct drm_connector *);
-- 
2.16.1

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[PATCH v5 01/36] drm/bridge: analogix_dp: detect Sink PSR state after configuring the PSR

[Enric Balletbo i Serra]

From: Yakir Yang 

Make sure the request PSR state takes effect in analogix_dp_send_psr_spd()
function, or print the sink PSR error state if we failed to apply the
requested PSR setting.

Cc: 征增 王 
Cc: Stéphane Marchesin 
Signed-off-by: Yakir Yang 
[seanpaul changed timeout loop to a readx poll]
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  6 ++--
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  6 ++--
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 35 +++---
 3 files changed, 37 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index a693ab3078f0..e738aa6de1af 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -122,8 +122,7 @@ int analogix_dp_enable_psr(struct analogix_dp_device *dp)
psr_vsc.DB0 = 0;
psr_vsc.DB1 = EDP_VSC_PSR_STATE_ACTIVE | EDP_VSC_PSR_CRC_VALUES_VALID;
 
-   analogix_dp_send_psr_spd(dp, _vsc);
-   return 0;
+   return analogix_dp_send_psr_spd(dp, _vsc);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_enable_psr);
 
@@ -149,8 +148,7 @@ int analogix_dp_disable_psr(struct analogix_dp_device *dp)
if (ret != 1)
dev_err(dp->dev, "Failed to set DP Power0 %d\n", ret);
 
-   analogix_dp_send_psr_spd(dp, _vsc);
-   return 0;
+   return analogix_dp_send_psr_spd(dp, _vsc);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index 5c6a28806129..b039b28d8fcc 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -20,6 +20,8 @@
 #define MAX_CR_LOOP 5
 #define MAX_EQ_LOOP 5
 
+#define DP_TIMEOUT_PSR_LOOP_MS 300
+
 /* DP_MAX_LANE_COUNT */
 #define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1)
 #define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f)
@@ -247,8 +249,8 @@ void analogix_dp_config_video_slave_mode(struct 
analogix_dp_device *dp);
 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
 void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp);
-void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
- struct edp_vsc_psr *vsc);
+int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
+struct edp_vsc_psr *vsc);
 ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 struct drm_dp_aux_msg *msg);
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 303083ad28e3..005a3f7005d2 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -10,10 +10,11 @@
  * option) any later version.
  */
 
-#include 
-#include 
 #include 
+#include 
 #include 
+#include 
+#include 
 
 #include 
 
@@ -992,10 +993,25 @@ void analogix_dp_enable_psr_crc(struct analogix_dp_device 
*dp)
writel(PSR_VID_CRC_ENABLE, dp->reg_base + ANALOGIX_DP_CRC_CON);
 }
 
-void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
- struct edp_vsc_psr *vsc)
+static ssize_t analogix_dp_get_psr_status(struct analogix_dp_device *dp)
+{
+   ssize_t val;
+   u8 status;
+
+   val = drm_dp_dpcd_readb(>aux, DP_PSR_STATUS, );
+   if (val < 0) {
+   dev_err(dp->dev, "PSR_STATUS read failed ret=%zd", val);
+   return val;
+   }
+   return status;
+}
+
+int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
+struct edp_vsc_psr *vsc)
 {
unsigned int val;
+   int ret;
+   ssize_t psr_status;
 
/* don't send info frame */
val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
@@ -1036,6 +1052,17 @@ void analogix_dp_send_psr_spd(struct analogix_dp_device 
*dp,
val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
val |= IF_EN;
writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
+
+   ret = readx_poll_timeout(analogix_dp_get_psr_status, dp, psr_status,
+   psr_status >= 0 &&
+   ((vsc->DB1 && psr_status == DP_PSR_SINK_ACTIVE_RFB) ||
+   (!vsc->DB1 && psr_status == DP_PSR_SINK_INACTIVE)), 1500,
+   DP_TIMEOUT_PSR_LOOP_MS * 1000);
+   if (ret) {
+   dev_warn(dp->dev, "Failed to apply PSR %d\n", ret);
+   

[PATCH v5 04/36] drm/rockchip: add mutex vop lock

[Enric Balletbo i Serra]

From: zain wang 

Add a lock to vop to avoid disabling the crtc while waiting for a line
flag while enabling psr. If we disable in the middle of waiting for the
line flag, we'll end up timing out or worse.

Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 30 +++--
 1 file changed, 24 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 158e79e5062e..b601c59e76a8 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -117,6 +117,8 @@ struct vop {
spinlock_t reg_lock;
/* lock vop irq reg */
spinlock_t irq_lock;
+   /* protects crtc enable/disable */
+   struct mutex vop_lock;
 
unsigned int irq;
 
@@ -569,6 +571,7 @@ static void vop_crtc_atomic_disable(struct drm_crtc *crtc,
 
WARN_ON(vop->event);
 
+   mutex_lock(>vop_lock);
drm_crtc_vblank_off(crtc);
 
/*
@@ -604,6 +607,7 @@ static void vop_crtc_atomic_disable(struct drm_crtc *crtc,
clk_disable(vop->aclk);
clk_disable(vop->hclk);
pm_runtime_put(vop->dev);
+   mutex_unlock(>vop_lock);
 
if (crtc->state->event && !crtc->state->active) {
spin_lock_irq(>dev->event_lock);
@@ -868,10 +872,13 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
uint32_t pin_pol, val;
int ret;
 
+   mutex_lock(>vop_lock);
+
WARN_ON(vop->event);
 
ret = vop_enable(crtc);
if (ret) {
+   mutex_unlock(>vop_lock);
DRM_DEV_ERROR(vop->dev, "Failed to enable vop (%d)\n", ret);
return;
}
@@ -935,6 +942,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);
 
VOP_REG_SET(vop, common, standby, 0);
+   mutex_unlock(>vop_lock);
 }
 
 static bool vop_fs_irq_is_pending(struct vop *vop)
@@ -1473,15 +1481,21 @@ int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, 
unsigned int mstimeout)
 {
struct vop *vop = to_vop(crtc);
unsigned long jiffies_left;
+   int ret = 0;
 
if (!crtc || !vop->is_enabled)
return -ENODEV;
 
-   if (mstimeout <= 0)
-   return -EINVAL;
+   mutex_lock(>vop_lock);
+   if (mstimeout <= 0) {
+   ret = -EINVAL;
+   goto out;
+   }
 
-   if (vop_line_flag_irq_is_enabled(vop))
-   return -EBUSY;
+   if (vop_line_flag_irq_is_enabled(vop)) {
+   ret = -EBUSY;
+   goto out;
+   }
 
reinit_completion(>line_flag_completion);
vop_line_flag_irq_enable(vop);
@@ -1492,10 +1506,13 @@ int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, 
unsigned int mstimeout)
 
if (jiffies_left == 0) {
DRM_DEV_ERROR(vop->dev, "Timeout waiting for IRQ\n");
-   return -ETIMEDOUT;
+   ret = -ETIMEDOUT;
+   goto out;
}
 
-   return 0;
+out:
+   mutex_unlock(>vop_lock);
+   return ret;
 }
 EXPORT_SYMBOL(rockchip_drm_wait_vact_end);
 
@@ -1545,6 +1562,7 @@ static int vop_bind(struct device *dev, struct device 
*master, void *data)
 
spin_lock_init(>reg_lock);
spin_lock_init(>irq_lock);
+   mutex_init(>vop_lock);
 
ret = devm_request_irq(dev, vop->irq, vop_isr,
   IRQF_SHARED, dev_name(dev), vop);
-- 
2.16.1

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[PATCH v5 08/36] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer

[Enric Balletbo i Serra]

From: Lin Huang 

We should check AUX_EN bit to confirm the AUX CH operation is completed.

Cc: Stéphane Marchesin 
Signed-off-by: Lin Huang 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 25 +--
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 9df2f3ef000c..e78c861b9e06 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -1073,9 +1073,9 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device 
*dp,
 {
u32 reg;
u8 *buffer = msg->buffer;
-   int timeout_loop = 0;
unsigned int i;
int num_transferred = 0;
+   int ret;
 
/* Buffer size of AUX CH is 16 bytes */
if (WARN_ON(msg->size > 16))
@@ -1139,17 +1139,20 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device 
*dp,
 
writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
 
-   /* Is AUX CH command reply received? */
+   ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2,
+reg, !(reg & AUX_EN), 25, 500 * 1000);
+   if (ret) {
+   dev_err(dp->dev, "AUX CH enable timeout!\n");
+   return -ETIMEDOUT;
+   }
+
/* TODO: Wait for an interrupt instead of looping? */
-   reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
-   while (!(reg & RPLY_RECEIV)) {
-   timeout_loop++;
-   if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-   dev_err(dp->dev, "AUX CH command reply failed!\n");
-   return -ETIMEDOUT;
-   }
-   reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
-   usleep_range(10, 11);
+   /* Is AUX CH command reply received? */
+   ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_INT_STA,
+reg, reg & RPLY_RECEIV, 10, 20 * 1000);
+   if (ret) {
+   dev_err(dp->dev, "AUX CH cmd reply timeout!\n");
+   return -ETIMEDOUT;
}
 
/* Clear interrupt source for AUX CH command reply */
-- 
2.16.1

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[PATCH v2 3/3] arm64: dts: renesas: Add LVDS decoder to R-Car V3M Eagle

[Jacopo Mondi]

The R-Car V3M Eagle board includes a transparent LVDS decoder, connected
to the on-chip LVDS encoder output on one side and to HDMI encoder
ADV7511w on the other one.

As the decoder does not need any configuration it has been so-far
omitted from DTS. Now that a driver for transparent LVDS decoder is
available, describe it in DT as well.

Signed-off-by: Jacopo Mondi 
---
 arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 31 --
 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts 
b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
index c0fd144..0a95c20 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
@@ -42,6 +42,33 @@
};
};
};
+
+   lvds,decoder {
+   compatible = "lvds-decoder";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+
+   lvds_dec_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   port@1{
+   reg = <1>;
+
+   lvds_dec_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+
+   };
+
+   };
+   };
 };
 
  {
@@ -98,7 +125,7 @@
port@0 {
reg = <0>;
adv7511_in: endpoint {
-   remote-endpoint = <_out>;
+   remote-endpoint = <_dec_out>;
};
};
 
@@ -153,7 +180,7 @@
ports {
port@1 {
endpoint {
-   remote-endpoint = <_in>;
+   remote-endpoint = <_dec_in>;
};
};
};
-- 
2.7.4

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[PATCH v5 14/36] drm/bridge: analogix_dp: Extend hpd check time to 100ms

[Enric Balletbo i Serra]

From: Lin Huang 

There was a 1ms delay to detect the hpd signal, which is too short to
detect a short pulse. This patch extends this delay to 100ms.

Cc: Stéphane Marchesin 
Cc: 征增 王 
Signed-off-by: Lin Huang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 3a222e7e46ee..6cbde8473f58 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -76,7 +76,7 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device 
*dp)
return 0;
 
timeout_loop++;
-   usleep_range(10, 11);
+   usleep_range(1000, 1100);
}
 
/*
-- 
2.16.1

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[PATCH] drm/sun4i: Fix exclusivity of the TCON clocks

[megous]

From: Ondrej Jirman 

Currently the exclusivity is enabled when the rate is set by
the mode setting functions. These functions are called by
mode_set_nofb callback of drm_crc_helper. Then exclusivity
is disabled when tcon is disabled by atomic_disable
callback.

What happens is that mode_set_nofb can be called once when
mode chnages, and afterwards the system can call atomic_enable
and atomic_disable multiple times without further calls to
mode_set_nofb.

This happens:

mode_set_nofb   - clk exclusivity is enabled
atomic_enable
atomic_disable  - clk exclusivity is disabled
atomic_enable
atomic_disable  - clk exclusivity is already disabled, leading to WARN
  in clk_rate_exclusive_put

Solution is to enable exclusivity in sun4i_tcon_channel_set_status.

Signed-off-by: Ondrej Jirman 
Cc: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c 
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index d4a29847dadd..cc29daa062f7 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -104,6 +104,7 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon 
*tcon, int channel,
 
if (enabled) {
clk_prepare_enable(clk);
+   clk_rate_exclusive_get(clk);
} else {
clk_rate_exclusive_put(clk);
clk_disable_unprepare(clk);
@@ -263,7 +264,7 @@ static void sun4i_tcon0_mode_set_common(struct sun4i_tcon 
*tcon,
const struct drm_display_mode *mode)
 {
/* Configure the dot clock */
-   clk_set_rate_exclusive(tcon->dclk, mode->crtc_clock * 1000);
+   clk_set_rate(tcon->dclk, mode->crtc_clock * 1000);
 
/* Set the resolution */
regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
@@ -428,7 +429,7 @@ static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon,
WARN_ON(!tcon->quirks->has_channel_1);
 
/* Configure the dot clock */
-   clk_set_rate_exclusive(tcon->sclk1, mode->crtc_clock * 1000);
+   clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000);
 
/* Adjust clock delay */
clk_delay = sun4i_tcon_get_clk_delay(mode, 1);
-- 
2.16.2

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[PATCH v5 26/36] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip

[Enric Balletbo i Serra]

From: Douglas Anderson 

The comments in analogix_dp_init_aux() claim that we're disabling aux
channel retries, but then right below it for Rockchip it sets them to
3.  If we actually need 3 retries for Rockchip then we could adjust
the comment, but it seems more likely that we want the same retry
behavior across all platforms.

Cc: Stéphane Marchesin 
Cc: 征增 王 
Signed-off-by: Douglas Anderson 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 58e8a28e99aa..a5f2763d72e4 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -481,15 +481,16 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
 
analogix_dp_reset_aux(dp);
 
-   /* Disable AUX transaction H/W retry */
+   /* AUX_BIT_PERIOD_EXPECTED_DELAY doesn't apply to Rockchip IP */
if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
-   reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
- AUX_HW_RETRY_COUNT_SEL(3) |
- AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+   reg = 0;
else
-   reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) |
- AUX_HW_RETRY_COUNT_SEL(0) |
- AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+   reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3);
+
+   /* Disable AUX transaction H/W retry */
+   reg |= AUX_HW_RETRY_COUNT_SEL(0) |
+  AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+
writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL);
 
/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
-- 
2.16.1

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[PATCH v5 18/36] drm/bridge: analogix_dp: Reset aux channel if an error occurred

[Enric Balletbo i Serra]

From: Lin Huang 

AUX errors are caused by many different reasons. We may not know what
happened in aux channel on failure, so let's reset aux channel if some
errors occurred.

Cc: 征增 王 
Cc: Douglas Anderson 
Signed-off-by: Lin Huang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Tested-by: Marek Szyprowski 
Signed-off-by: Enric Balletbo i Serra 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 18 ++
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index dee1ba109b5f..7b7fd227e1f9 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -466,6 +466,10 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
reg = RPLY_RECEIV | AUX_ERR;
writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
 
+   analogix_dp_set_analog_power_down(dp, AUX_BLOCK, true);
+   usleep_range(10, 11);
+   analogix_dp_set_analog_power_down(dp, AUX_BLOCK, false);
+
analogix_dp_reset_aux(dp);
 
/* Disable AUX transaction H/W retry */
@@ -1159,7 +1163,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device 
*dp,
 reg, !(reg & AUX_EN), 25, 500 * 1000);
if (ret) {
dev_err(dp->dev, "AUX CH enable timeout!\n");
-   return -ETIMEDOUT;
+   goto aux_error;
}
 
/* TODO: Wait for an interrupt instead of looping? */
@@ -1168,7 +1172,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device 
*dp,
 reg, reg & RPLY_RECEIV, 10, 20 * 1000);
if (ret) {
dev_err(dp->dev, "AUX CH cmd reply timeout!\n");
-   return -ETIMEDOUT;
+   goto aux_error;
}
 
/* Clear interrupt source for AUX CH command reply */
@@ -1178,7 +1182,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device 
*dp,
reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
if (reg & AUX_ERR) {
writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
-   return -EREMOTEIO;
+   goto aux_error;
}
 
/* Check AUX CH error access status */
@@ -1186,7 +1190,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device 
*dp,
if ((reg & AUX_STATUS_MASK)) {
dev_err(dp->dev, "AUX CH error happened: %d\n\n",
reg & AUX_STATUS_MASK);
-   return -EREMOTEIO;
+   goto aux_error;
}
 
if (msg->request & DP_AUX_I2C_READ) {
@@ -1212,4 +1216,10 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device 
*dp,
msg->reply = DP_AUX_NATIVE_REPLY_ACK;
 
return num_transferred > 0 ? num_transferred : -EBUSY;
+
+aux_error:
+   /* if aux err happen, reset aux */
+   analogix_dp_init_aux(dp);
+
+   return -EREMOTEIO;
 }
-- 
2.16.1

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[PATCH v5 10/36] drm/bridge: analogix_dp: Retry bridge enable when it failed

[Enric Balletbo i Serra]

From: zain wang 

When we enable bridge failed, we have to retry it, otherwise we would get
the abnormal display.

Cc: Stéphane Marchesin 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 65 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  3 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  5 +-
 3 files changed, 56 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index ea7a80a989c6..c81733b8185e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -43,8 +43,10 @@ struct bridge_init {
struct device_node *node;
 };
 
-static void analogix_dp_init_dp(struct analogix_dp_device *dp)
+static int analogix_dp_init_dp(struct analogix_dp_device *dp)
 {
+   int ret;
+
analogix_dp_reset(dp);
 
analogix_dp_swreset(dp);
@@ -56,10 +58,13 @@ static void analogix_dp_init_dp(struct analogix_dp_device 
*dp)
analogix_dp_enable_sw_function(dp);
 
analogix_dp_config_interrupt(dp);
-   analogix_dp_init_analog_func(dp);
+   ret = analogix_dp_init_analog_func(dp);
+   if (ret)
+   return ret;
 
analogix_dp_init_hpd(dp);
analogix_dp_init_aux(dp);
+   return 0;
 }
 
 static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
@@ -918,7 +923,7 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void 
*arg)
return IRQ_HANDLED;
 }
 
-static void analogix_dp_commit(struct analogix_dp_device *dp)
+static int analogix_dp_commit(struct analogix_dp_device *dp)
 {
int ret;
 
@@ -928,11 +933,10 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
DRM_ERROR("failed to disable the panel\n");
}
 
-   ret = readx_poll_timeout(analogix_dp_train_link, dp, ret, !ret, 100,
-DP_TIMEOUT_TRAINING_US * 5);
+   ret = analogix_dp_train_link(dp);
if (ret) {
dev_err(dp->dev, "unable to do link train, ret=%d\n", ret);
-   return;
+   return ret;
}
 
analogix_dp_enable_scramble(dp, 1);
@@ -953,6 +957,7 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
dp->psr_enable = analogix_dp_detect_sink_psr(dp);
if (dp->psr_enable)
analogix_dp_enable_sink_psr(dp);
+   return 0;
 }
 
 /*
@@ -1149,12 +1154,9 @@ static void analogix_dp_bridge_pre_enable(struct 
drm_bridge *bridge)
DRM_ERROR("failed to setup the panel ret = %d\n", ret);
 }
 
-static void analogix_dp_bridge_enable(struct drm_bridge *bridge)
+static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 {
-   struct analogix_dp_device *dp = bridge->driver_private;
-
-   if (dp->dpms_mode == DRM_MODE_DPMS_ON)
-   return;
+   int ret;
 
pm_runtime_get_sync(dp->dev);
 
@@ -1162,11 +1164,46 @@ static void analogix_dp_bridge_enable(struct drm_bridge 
*bridge)
dp->plat_data->power_on(dp->plat_data);
 
phy_power_on(dp->phy);
-   analogix_dp_init_dp(dp);
+
+   ret = analogix_dp_init_dp(dp);
+   if (ret)
+   goto out_dp_init;
+
+   ret = analogix_dp_commit(dp);
+   if (ret)
+   goto out_dp_init;
+
enable_irq(dp->irq);
-   analogix_dp_commit(dp);
+   return 0;
 
-   dp->dpms_mode = DRM_MODE_DPMS_ON;
+out_dp_init:
+   phy_power_off(dp->phy);
+   if (dp->plat_data->power_off)
+   dp->plat_data->power_off(dp->plat_data);
+   pm_runtime_put_sync(dp->dev);
+
+   return ret;
+}
+
+static void analogix_dp_bridge_enable(struct drm_bridge *bridge)
+{
+   struct analogix_dp_device *dp = bridge->driver_private;
+   int timeout_loop = 0;
+
+   if (dp->dpms_mode == DRM_MODE_DPMS_ON)
+   return;
+
+   while (timeout_loop < MAX_PLL_LOCK_LOOP) {
+   if (analogix_dp_set_bridge(dp) == 0) {
+   dp->dpms_mode = DRM_MODE_DPMS_ON;
+   return;
+   }
+   dev_err(dp->dev, "failed to set bridge, retry: %d\n",
+   timeout_loop);
+   timeout_loop++;
+   usleep_range(10, 11);
+   }
+   dev_err(dp->dev, "too many times retry set bridge, give it up\n");
 }
 
 static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h

[PATCH v5 33/36] drm/rockchip: psr: Sanitize semantics of allow/disallow API

[Enric Balletbo i Serra]

From: Tomasz Figa 

Currently both rockchip_drm_psr_activate() and _deactivate() only set the
boolean "active" flag without actually making sure that hardware state
complies with it.

Since we are going to extend the usage of this API to properly lock PSR
for the duration of atomic commits, we change the semantics in following
way:
 - a counter is used to track the number of disallow requests,
 - PSR is actually disabled in hardware on first disallow request,
 - PSR enable work is scheduled on last disallow request.

The above allows using the API as a way to deterministically synchronize
PSR state changes with other DRM events, i.e. atomic commits and cursor
updates. As a nice side effect, the naming is sorted out and we have
"inhibit" for stopping the software logic and "enable" for hardware
state.

Signed-off-by: Tomasz Figa 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c |  4 +-
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 57 ++---
 drivers/gpu/drm/rockchip/rockchip_drm_psr.h |  4 +-
 3 files changed, 46 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c 
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 6d45d62466b3..080f05352195 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -134,7 +134,7 @@ static int rockchip_dp_poweron_end(struct 
analogix_dp_plat_data *plat_data)
 {
struct rockchip_dp_device *dp = to_dp(plat_data);
 
-   return rockchip_drm_psr_activate(>encoder);
+   return rockchip_drm_psr_inhibit_put(>encoder);
 }
 
 static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
@@ -142,7 +142,7 @@ static int rockchip_dp_powerdown(struct 
analogix_dp_plat_data *plat_data)
struct rockchip_dp_device *dp = to_dp(plat_data);
int ret;
 
-   ret = rockchip_drm_psr_deactivate(>encoder);
+   ret = rockchip_drm_psr_inhibit_get(>encoder);
if (ret != 0)
return ret;
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index 448c5fde241c..e7e16d92d5a1 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -27,7 +27,7 @@ struct psr_drv {
struct drm_encoder  *encoder;
 
struct mutexlock;
-   boolactive;
+   int inhibit_count;
boolenabled;
 
struct delayed_work flush_work;
@@ -76,7 +76,7 @@ static int psr_set_state_locked(struct psr_drv *psr, bool 
enable)
 {
int ret;
 
-   if (!psr->active)
+   if (psr->inhibit_count > 0)
return -EINVAL;
 
if (enable == psr->enabled)
@@ -101,13 +101,18 @@ static void psr_flush_handler(struct work_struct *work)
 }
 
 /**
- * rockchip_drm_psr_activate - activate PSR on the given pipe
+ * rockchip_drm_psr_inhibit_put - release PSR inhibit on given encoder
  * @encoder: encoder to obtain the PSR encoder
  *
+ * Decrements PSR inhibit count on given encoder. Should be called only
+ * for a PSR inhibit count increment done before. If PSR inhibit counter
+ * reaches zero, PSR flush work is scheduled to make the hardware enter
+ * PSR mode in PSR_FLUSH_TIMEOUT_MS.
+ *
  * Returns:
  * Zero on success, negative errno on failure.
  */
-int rockchip_drm_psr_activate(struct drm_encoder *encoder)
+int rockchip_drm_psr_inhibit_put(struct drm_encoder *encoder)
 {
struct psr_drv *psr = find_psr_by_encoder(encoder);
 
@@ -115,21 +120,29 @@ int rockchip_drm_psr_activate(struct drm_encoder *encoder)
return PTR_ERR(psr);
 
mutex_lock(>lock);
-   psr->active = true;
+   --psr->inhibit_count;
+   if (!psr->inhibit_count)
+   mod_delayed_work(system_wq, >flush_work,
+PSR_FLUSH_TIMEOUT_MS);
mutex_unlock(>lock);
 
return 0;
 }
-EXPORT_SYMBOL(rockchip_drm_psr_activate);
+EXPORT_SYMBOL(rockchip_drm_psr_inhibit_put);
 
 /**
- * rockchip_drm_psr_deactivate - deactivate PSR on the given pipe
+ * rockchip_drm_psr_inhibit_get - acquire PSR inhibit on given encoder
  * @encoder: encoder to obtain the PSR encoder
  *
+ * Increments PSR inhibit count on given encoder. This function guarantees
+ * that after it returns PSR is turned off on given encoder and no PSR-related
+ * hardware state change occurs at least until a matching call to
+ * rockchip_drm_psr_inhibit_put() is done.
+ *
  * Returns:
  * Zero on success, negative errno on failure.
  */
-int rockchip_drm_psr_deactivate(struct drm_encoder *encoder)
+int rockchip_drm_psr_inhibit_get(struct drm_encoder *encoder)
 {
struct 

[PATCH v5 29/36] drm/rockchip: analogix_dp: Do not call Analogix code before bind

[Enric Balletbo i Serra]

From: Tomasz Figa 

Driver callbacks, such as system suspend or resume can be called any
time, specifically they can be called before the component bind
callback. Let's use dp->adp pointer as a safeguard and skip calling
Analogix entry points if it is an ERR_PTR().

Signed-off-by: Tomasz Figa 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c 
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 23317a2269e1..6d45d62466b3 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -368,6 +368,8 @@ static void rockchip_dp_unbind(struct device *dev, struct 
device *master,
analogix_dp_unbind(dp->adp);
rockchip_drm_psr_unregister(>encoder);
dp->encoder.funcs->destroy(>encoder);
+
+   dp->adp = ERR_PTR(-ENODEV);
 }
 
 static const struct component_ops rockchip_dp_component_ops = {
@@ -391,6 +393,7 @@ static int rockchip_dp_probe(struct platform_device *pdev)
return -ENOMEM;
 
dp->dev = dev;
+   dp->adp = ERR_PTR(-ENODEV);
dp->plat_data.panel = panel;
 
ret = rockchip_dp_of_probe(dp);
@@ -414,6 +417,9 @@ static int rockchip_dp_suspend(struct device *dev)
 {
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
 
+   if (IS_ERR(dp->adp))
+   return 0;
+
return analogix_dp_suspend(dp->adp);
 }
 
@@ -421,6 +427,9 @@ static int rockchip_dp_resume(struct device *dev)
 {
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
 
+   if (IS_ERR(dp->adp))
+   return 0;
+
return analogix_dp_resume(dp->adp);
 }
 #endif
-- 
2.16.1

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[PATCH v5 15/36] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode

[Enric Balletbo i Serra]

From: zain wang 

Enhanced mode is required by the eDP 1.2 specification, and not doing it
early could result in a period of time where we have a link transmitting
idle packets without it. Since there is no reason to disable it, we just
enable it at the beginning of link training and then keep it on all the
time.

Cc: Tomasz Figa 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 6cbde8473f58..1eed35f9eb8d 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -281,6 +281,8 @@ static int analogix_dp_link_start(struct analogix_dp_device 
*dp)
retval = drm_dp_dpcd_write(>aux, DP_LINK_BW_SET, buf, 2);
if (retval < 0)
return retval;
+   /* set enhanced mode if available */
+   analogix_dp_set_enhanced_mode(dp);
 
/* Set TX pre-emphasis to minimum */
for (lane = 0; lane < lane_count; lane++)
@@ -593,8 +595,6 @@ static int analogix_dp_process_equalizer_training(struct 
analogix_dp_device *dp)
dev_dbg(dp->dev, "fast link training %s\n",
dp->fast_train_enable ? "supported" : "unsupported");
 
-   /* set enhanced mode if available */
-   analogix_dp_set_enhanced_mode(dp);
dp->link_train.lt_state = FINISHED;
 
return 0;
@@ -940,8 +940,6 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
}
 
analogix_dp_enable_scramble(dp, 1);
-   analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
-   analogix_dp_enable_enhanced_mode(dp, 1);
 
analogix_dp_init_video(dp);
ret = analogix_dp_config_video(dp);
-- 
2.16.1

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[PATCH v5 16/36] drm/bridge: analogix_dp: Check dpcd write/read status

[Enric Balletbo i Serra]

From: Lin Huang 

We need to check the dpcd write/read return value to see whether the
write/read was successful

Cc: Kristian H. Kristensen 
Signed-off-by: Lin Huang 
Signed-off-by: zain wang 
Signed-off-by: Douglas Anderson 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 169 -
 1 file changed, 127 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 1eed35f9eb8d..be6eddd0d0a7 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -160,80 +160,137 @@ int analogix_dp_disable_psr(struct analogix_dp_device 
*dp)
 }
 EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
 
-static bool analogix_dp_detect_sink_psr(struct analogix_dp_device *dp)
+static int analogix_dp_detect_sink_psr(struct analogix_dp_device *dp)
 {
unsigned char psr_version;
+   int ret;
+
+   ret = drm_dp_dpcd_readb(>aux, DP_PSR_SUPPORT, _version);
+   if (ret != 1) {
+   dev_err(dp->dev, "failed to get PSR version, disable it\n");
+   return ret;
+   }
 
-   drm_dp_dpcd_readb(>aux, DP_PSR_SUPPORT, _version);
dev_dbg(dp->dev, "Panel PSR version : %x\n", psr_version);
 
-   return (psr_version & DP_PSR_IS_SUPPORTED) ? true : false;
+   dp->psr_enable = (psr_version & DP_PSR_IS_SUPPORTED) ? true : false;
+
+   return 0;
 }
 
-static void analogix_dp_enable_sink_psr(struct analogix_dp_device *dp)
+static int analogix_dp_enable_sink_psr(struct analogix_dp_device *dp)
 {
unsigned char psr_en;
+   int ret;
 
/* Disable psr function */
-   drm_dp_dpcd_readb(>aux, DP_PSR_EN_CFG, _en);
+   ret = drm_dp_dpcd_readb(>aux, DP_PSR_EN_CFG, _en);
+   if (ret != 1) {
+   dev_err(dp->dev, "failed to get psr config\n");
+   goto end;
+   }
+
psr_en &= ~DP_PSR_ENABLE;
-   drm_dp_dpcd_writeb(>aux, DP_PSR_EN_CFG, psr_en);
+   ret = drm_dp_dpcd_writeb(>aux, DP_PSR_EN_CFG, psr_en);
+   if (ret != 1) {
+   dev_err(dp->dev, "failed to disable panel psr\n");
+   goto end;
+   }
 
/* Main-Link transmitter remains active during PSR active states */
psr_en = DP_PSR_MAIN_LINK_ACTIVE | DP_PSR_CRC_VERIFICATION;
-   drm_dp_dpcd_writeb(>aux, DP_PSR_EN_CFG, psr_en);
+   ret = drm_dp_dpcd_writeb(>aux, DP_PSR_EN_CFG, psr_en);
+   if (ret != 1) {
+   dev_err(dp->dev, "failed to set panel psr\n");
+   goto end;
+   }
 
/* Enable psr function */
psr_en = DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE |
 DP_PSR_CRC_VERIFICATION;
-   drm_dp_dpcd_writeb(>aux, DP_PSR_EN_CFG, psr_en);
+   ret = drm_dp_dpcd_writeb(>aux, DP_PSR_EN_CFG, psr_en);
+   if (ret != 1) {
+   dev_err(dp->dev, "failed to set panel psr\n");
+   goto end;
+   }
 
analogix_dp_enable_psr_crc(dp);
+
+   return 0;
+end:
+   dev_err(dp->dev, "enable psr fail, force to disable psr\n");
+   dp->psr_enable = false;
+
+   return ret;
 }
 
-static void
+static int
 analogix_dp_enable_rx_to_enhanced_mode(struct analogix_dp_device *dp,
   bool enable)
 {
u8 data;
+   int ret;
 
-   drm_dp_dpcd_readb(>aux, DP_LANE_COUNT_SET, );
+   ret = drm_dp_dpcd_readb(>aux, DP_LANE_COUNT_SET, );
+   if (ret != 1)
+   return ret;
 
if (enable)
-   drm_dp_dpcd_writeb(>aux, DP_LANE_COUNT_SET,
-  DP_LANE_COUNT_ENHANCED_FRAME_EN |
-   DPCD_LANE_COUNT_SET(data));
+   ret = drm_dp_dpcd_writeb(>aux, DP_LANE_COUNT_SET,
+DP_LANE_COUNT_ENHANCED_FRAME_EN |
+DPCD_LANE_COUNT_SET(data));
else
-   drm_dp_dpcd_writeb(>aux, DP_LANE_COUNT_SET,
-  DPCD_LANE_COUNT_SET(data));
+   ret = drm_dp_dpcd_writeb(>aux, DP_LANE_COUNT_SET,
+DPCD_LANE_COUNT_SET(data));
+
+   return ret < 0 ? ret : 0;
 }
 
-static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device 
*dp)
+static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device 
*dp,
+ u8 *enhanced_mode_support)
 {
u8 data;
-   int retval;
+   int ret;
 
-   

[PATCH v5 00/36] DRM Rockchip rk3399 (Kevin)

[Enric Balletbo i Serra]

Hi,

This patchset includes cleanups, improvements, and bug fixes for
Rockchip DRM driver and PSR support.

This new version is the same as before removing some of the patches
already applied and fixing the Exynos issue due patch '[v4 15/38]
drm/bridge: analogix_dp: Ensure edp is disabled when shutting down
the panel' reported by Marek.

Regards,
 Enric

Changes in v5:
- Removed the following patches as are already applied.
  [PATCH v4 01/38] drm/bridge: analogix_dp: set psr activate/deactivate
   when enable/disable bridge
  [PATCH v4 02/38] drm/rockchip: Don't use atomic constructs for psr
- Add Mareks tested-tag and including the missing people.
  - [PATCH v4 15/38] move analogix_dp_set_analog_power_down() before
phy_power_off() to fix Exynos issue.

Changes in v4:
- Rebased all on top of drm-misc-next
- Removed the following patches as are already applied.
  [PATCH v3 01/43] drm/rockchip: Get rid of unnecessary struct fields
  [PATCH v3 02/43] drm/rockchip: support prime import sg table
  [PATCH v3 03/43] drm/rockchip: Respect page offset for PRIME mmap
  calls
- Removed the following patches as now are part of another patchset
  [PATCH v3 05/43] drm/bridge: analogix_dp: Don't power bridge in
  analogix_dp_bind
  [PATCH v3 33/43] drm/panel: simple: Change mode for Sharp lq123p1jx31

Changes in v3:
- Addressed some of the comments from Sean on the v2

Changes in v2:
- A few patches have been replaced by newer and cleaner versions from
  the ChromeOS kernel gerrit, especially about disallowing PSR for the
  whole atomic commit.


Douglas Anderson (4):
  drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner
  drm/bridge: analogix_dp: Properly log AUX CH errors
  drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip
  drm/bridge: analogix_dp: Split the platform-specific poweron in two
parts

Kristian H. Kristensen (1):
  drm/rockchip: Disable PSR on input events

Lin Huang (6):
  drm/bridge: analogix_dp: Move enable video into config_video()
  drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer
  drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the
panel
  drm/bridge: analogix_dp: Extend hpd check time to 100ms
  drm/bridge: analogix_dp: Check dpcd write/read status
  drm/bridge: analogix_dp: Reset aux channel if an error occurred

Mark Yao (1):
  drm/rockchip: pre dither down when output bpc is 8bit

Sean Paul (1):
  drm/rockchip: Remove analogix psr worker

Tomasz Figa (7):
  drm/rockchip: analogix_dp: Do not call Analogix code before bind
  drm/rockchip: Cancel PSR enable work before changing the state
  drm/rockchip: psr: Avoid redundant calls to .set() callback
  drm/rockchip: psr: Sanitize semantics of allow/disallow API
  drm/rockchip: Disable PSR from reboot notifier
  drm/rockchip: Disallow PSR for the whole atomic commit
  drm/rockchip: psr: Remove flush by CRTC

Yakir Yang (1):
  drm/bridge: analogix_dp: detect Sink PSR state after configuring the
PSR

zain wang (15):
  drm/bridge: analogix_dp: Don't change psr while bridge is disabled
  drm/rockchip: add mutex vop lock
  drm/bridge: analogix_dp: add fast link train for eDP
  drm/rockchip: Only wait for panel ACK on PSR entry
  drm/bridge: analogix_dp: Don't use fast link training when panel just
powered up
  drm/bridge: analogix_dp: Retry bridge enable when it failed
  drm/bridge: analogix_dp: Wait for HPD signal before configuring link
  drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy
  drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode
  drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip
  drm/rockchip: Restore psr->state when enable/disable psr failed
  drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll
  drm/bridge: analogix_dp: Fix timeout of video streamclk config
  drm/bridge: analogix_dp: Fix incorrect operations with register
ANALOGIX_DP_FUNC_EN_1
  drm/bridge: analogix_dp: Move fast link training detect to set_bridge

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 452 -
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  14 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 274 -
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   7 +
 drivers/gpu/drm/exynos/exynos_dp.c |   2 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c|  70 ++--
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h|   1 +
 drivers/gpu/drm/rockchip/rockchip_drm_fb.c |  61 ++-
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c| 309 +-
 drivers/gpu/drm/rockchip/rockchip_drm_psr.h|   7 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c|  43 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h|   1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c|   1 +
 include/drm/bridge/analogix_dp.h   |   5 +-
 14 files changed, 879 insertions(+), 368 deletions(-)

-- 
2.16.1

Re: [PATCH] drm/etnaviv: correct timeout calculation

[Russell King - ARM Linux]

Hi Lucas,

Please retain my authorship of my patch, which was sent on 23 Oct 2017.
The patch you have below is 100% identical to that which I sent.

You should also point out, as per the follow-on discussion, that using
clock_gettime() on 32-bit systems will not work once the time it
reports wraps - so something like the comment I suggested in a follow
up patch:

+ * Etnaviv timeouts are specified wrt CLOCK_MONOTONIC, not jiffies.
+ * We need to calculate the timeout in terms of number of jiffies
+ * between the specified timeout and the current CLOCK_MONOTONIC time.
+ * Note: clock_gettime() is 32-bit on 32-bit arch.  Using 64-bit
+ * timespec math here just means that when a wrap occurs, the
+ * specified timeout goes into the past and we can't request a
+ * timeout in the future: IOW, the code breaks.

would be sensible either in the commit message or the code.

On Fri, Mar 09, 2018 at 12:21:49PM +0100, Lucas Stach wrote:
> The old way did clamp the jiffy conversion and thus caused the timeouts
> to become negative after some time. Also it didn't work with userspace
> which actually fills the upper 32bits of the 64bit timestamp value.
> 
> Fix this by using the solution developed and tested by Russell.
> 
> Suggested-by: Russell King 
> Signed-off-by: Lucas Stach 
> ---
>  drivers/gpu/drm/etnaviv/etnaviv_drv.h | 25 +
>  1 file changed, 17 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.h 
> b/drivers/gpu/drm/etnaviv/etnaviv_drv.h
> index ddb17ee565e9..17a43da98fb9 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.h
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.h
> @@ -26,6 +26,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> @@ -132,19 +133,27 @@ static inline bool fence_after_eq(u32 a, u32 b)
>   return (s32)(a - b) >= 0;
>  }
>  
> +/*
> + * Etnaviv timeouts are specified wrt CLOCK_MONOTONIC, not jiffies.
> + * We need to calculate the timeout in terms of number of jiffies
> + * between the specified timeout and the current CLOCK_MONOTONIC time.
> + */
>  static inline unsigned long etnaviv_timeout_to_jiffies(
>   const struct timespec *timeout)
>  {
> - unsigned long timeout_jiffies = timespec_to_jiffies(timeout);
> - unsigned long start_jiffies = jiffies;
> - unsigned long remaining_jiffies;
> + struct timespec64 ts, to;
> +
> + to = timespec_to_timespec64(*timeout);
> +
> + ktime_get_ts64();
> +
> + /* timeouts before "now" have already expired */
> + if (timespec64_compare(, ) <= 0)
> + return 0;
>  
> - if (time_after(start_jiffies, timeout_jiffies))
> - remaining_jiffies = 0;
> - else
> - remaining_jiffies = timeout_jiffies - start_jiffies;
> + ts = timespec64_sub(to, ts);
>  
> - return remaining_jiffies;
> + return timespec64_to_jiffies();
>  }
>  
>  #endif /* __ETNAVIV_DRV_H__ */
> -- 
> 2.16.1
> 

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[PATCH v5 07/36] drm/bridge: analogix_dp: Move enable video into config_video()

[Enric Balletbo i Serra]

From: Lin Huang 

We need to enable video before analogix_dp_is_video_stream_on(), so
we can get the right video stream status.

Cc: 征增 王 
Cc: Stéphane Marchesin 
Signed-off-by: Lin Huang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 5a2e35dc41e3..f9661b410cb9 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -819,11 +819,10 @@ static int analogix_dp_config_video(struct 
analogix_dp_device *dp)
if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
break;
if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-   dev_err(dp->dev, "Timeout of video streamclk ok\n");
+   dev_err(dp->dev, "Timeout of slave video streamclk 
ok\n");
return -ETIMEDOUT;
}
-
-   usleep_range(1, 2);
+   usleep_range(1000, 1001);
}
 
/* Set to use the register calculated M/N video */
@@ -838,6 +837,9 @@ static int analogix_dp_config_video(struct 
analogix_dp_device *dp)
/* Configure video slave mode */
analogix_dp_enable_video_master(dp, 0);
 
+   /* Enable video */
+   analogix_dp_start_video(dp);
+
timeout_loop = 0;
 
for (;;) {
@@ -948,9 +950,6 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
DRM_ERROR("failed to enable the panel\n");
}
 
-   /* Enable video */
-   analogix_dp_start_video(dp);
-
dp->psr_enable = analogix_dp_detect_sink_psr(dp);
if (dp->psr_enable)
analogix_dp_enable_sink_psr(dp);
-- 
2.16.1

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Re: [PATCH v5 1/6] dt-bindings: add bindings for USB physical connector

[Roger Quadros]

Hi,

On 27/02/18 09:11, Andrzej Hajda wrote:
> These bindings allow to describe most known standard USB connectors
> and it should be possible to extend it if necessary.
> USB connectors, beside USB can be used to route other protocols,
> for example UART, Audio, MHL. In such case every device passing data
> through the connector should have appropriate graph bindings.
> 
> Signed-off-by: Andrzej Hajda 
> ---
> v4:
> - improved 'type' description (Rob),
> - improved description of 2nd example (Rob).
> v3:
> - removed MHL port (samsung connector will have separate bindings),
> - added 2nd example for USB-C,
> - improved formatting.
> v2:
> - moved connector type(A,B,C) to compatible string (Rob),
> - renamed size property to type (Rob),
> - changed type description to be less confusing (Laurent),
> - removed vendor specific compatibles (implied by graph port number),
> - added requirement of connector being a child of IC (Rob),
> - removed max-mode (subtly suggested by Rob, it should be detected anyway
>   by USB Controller in runtime, downside is that device is not able to
>   report its real capabilities, maybe better would be to make it optional(?)),
> - assigned port numbers to data buses (Rob).
> 
> Regards
> Andrzej
> ---
>  .../bindings/connector/usb-connector.txt   | 75 
> ++
>  1 file changed, 75 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/connector/usb-connector.txt
> 
> diff --git a/Documentation/devicetree/bindings/connector/usb-connector.txt 
> b/Documentation/devicetree/bindings/connector/usb-connector.txt
> new file mode 100644
> index ..e1463f14af38
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/connector/usb-connector.txt
> @@ -0,0 +1,75 @@
> +USB Connector
> +=
> +
> +USB connector node represents physical USB connector. It should be
> +a child of USB interface controller.
> +
> +Required properties:
> +- compatible: describes type of the connector, must be one of:
> +"usb-a-connector",
> +"usb-b-connector",
> +"usb-c-connector".

compatible should be just "usb-connector"

Type should be a property

type: type of usb connector "A", "B", "AB", "C"
AB is for dual-role connectors.

micro super-speed and high-speed connectors are different. How do you 
differentiate that?

> +
> +Optional properties:
> +- label: symbolic name for the connector,

Why do you need label? We can't maintain consistency as people will put 
creative names there.
Device/bus driver could generate a valid label.

> +- type: size of the connector, should be specified in case of USB-A, USB-B
> +  non-fullsize connectors: "mini", "micro".

type is misleading. Type is usually A/B/C. It should be size here instead.

size: size of the connector if not standard size. "mini", "micro"

If not specified it is treated as standard sized connector.
e.g. for Type-C there is no mini/micro. so size doesn't have to be specificed

What about Type-C connector?
> +
> +Required nodes:
> +- any data bus to the connector should be modeled using the OF graph bindings

s/modeled/modelled

> +  specified in bindings/graph.txt, unless the bus is between parent node and
> +  the connector. Since single connector can have multpile data buses every 
> bus

s/multpile/multiple

> +  has assigned OF graph port number as follows:
> +0: High Speed (HS), present in all connectors,
> +1: Super Speed (SS), present in SS capable connectors,
> +2: Sideband use (SBU), present in USB-C.
> +
> +Examples
> +
> +
> +1. Micro-USB connector with HS lines routed via controller (MUIC):
> +
> +muic-max77843@66 {
> + ...
> + usb_con: connector {
> + compatible = "usb-b-connector";
> + label = "micro-USB";
> + type = "micro";
> + };
> +};
> +
> +2. USB-C connector attached to CC controller (s2mm005), HS lines routed
> +to companion PMIC (max77865), SS lines to USB3 PHY and SBU to DisplayPort.
> +DisplayPort video lines are routed to the connector via SS mux in USB3 PHY.
> +
> +ccic: s2mm005@33 {
> + ...
> + usb_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";

The label is not consistent with the earlier example.

> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + usb_con_hs: endpoint {
> + remote-endpoint = <_usbc_hs>;
> + };
> + };
> + port@1 {
> + reg = <1>;
> + usb_con_ss: endpoint {
> + remote-endpoint = <_phy_ss>;
> + };
> + };
> + port@2 {
> + reg = <2>;
> 

[PATCH v2 0/3] drm: Add LVDS decoder bridge

[Jacopo Mondi]

Hello,
   after some discussion on the proposed bindings for generic lvds decoder and
Thine THC63LVD1024, I decided to drop the THC63 specific part and just live with
a transparent decoder that does not support any configuration from DT.

Dropping THC63 support to avoid discussion on how to better implement support
for a DRM bridge with 2 input ports and focus on LVDS mode propagation through
bridges as explained in v1 cover letter (for DRM people: please see [1] as why
I find difficult to implement support for bridges with multiple input endpoints)

Same base branch as v1, with same patches for V3M Eagle applied on top.
git://jmondi.org/linux v3m/v4.16-rc3/base

Thanks
   j

v1 -> v2:
- Drop support for THC63LVD1024

[1] I had a quick at how to model a DRM bridge with multiple input
ports, and I see a blocker in how DRM identifies and matches bridges using
the devices node in place of the endpoint nodes.

As THC63LVD1024 supports up to 2 LVDS inputs and 2 LVDS outputs, I see only
a few ways to support that:
 1) register 2 drm bridges from the same driver (one for each input/output pair)
but they would both be matches on the same device node when the preceding
bridge calls "of_drm_find_bridge()".
 2) register a single bridge with multiple "next bridges", but when the bridge
gets attached I don't see a way on how to identify on which next bridge
"drm_bridge_attach()" on, as it depends on the endpoint the current bridge
has been attached on first, and we don't have that information.
 3) Register more instances of the same chip in DTS, one for each input/output
pair. They gonna share supplies and gpios, and I don't like that.

I had a quick look at the currently in mainline bridges and none of them has
multiple input endpoints, except for HDMI audio endpoint, which I haven't found
in use in any DTS. I guess the problem has been already debated and maybe solved
in the past, so feel free to point me to other sources.

Jacopo Mondi (3):
  dt-bindings: display: bridge: Document LVDS to parallel decoder
  drm: bridge: Add LVDS decoder driver
  arm64: dts: renesas: Add LVDS decoder to R-Car V3M Eagle

 .../bindings/display/bridge/lvds-decoder.txt   |  42 ++
 arch/arm64/boot/dts/renesas/r8a77970-eagle.dts |  31 +++-
 drivers/gpu/drm/bridge/Kconfig |   8 ++
 drivers/gpu/drm/bridge/Makefile|   1 +
 drivers/gpu/drm/bridge/lvds-decoder.c  | 157 +
 5 files changed, 237 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/lvds-decoder.txt
 create mode 100644 drivers/gpu/drm/bridge/lvds-decoder.c

--
2.7.4

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[PATCH v5 13/36] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel

[Enric Balletbo i Serra]

From: Lin Huang 

When panel is shut down, we should make sure edp can be disabled to avoid
undefined behavior.

Cc: Stéphane Marchesin 
Signed-off-by: Lin Huang 
Signed-off-by: zain wang 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 92fb9a072cb6..3a222e7e46ee 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1160,6 +1160,12 @@ static int analogix_dp_set_bridge(struct 
analogix_dp_device *dp)
 
pm_runtime_get_sync(dp->dev);
 
+   ret = clk_prepare_enable(dp->clock);
+   if (ret < 0) {
+   DRM_ERROR("Failed to prepare_enable the clock clk [%d]\n", ret);
+   goto out_dp_clk_pre;
+   }
+
if (dp->plat_data->power_on)
dp->plat_data->power_on(dp->plat_data);
 
@@ -1191,6 +1197,8 @@ static int analogix_dp_set_bridge(struct 
analogix_dp_device *dp)
phy_power_off(dp->phy);
if (dp->plat_data->power_off)
dp->plat_data->power_off(dp->plat_data);
+   clk_disable_unprepare(dp->clock);
+out_dp_clk_pre:
pm_runtime_put_sync(dp->dev);
 
return ret;
@@ -1233,11 +1241,14 @@ static void analogix_dp_bridge_disable(struct 
drm_bridge *bridge)
}
 
disable_irq(dp->irq);
+   analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);
phy_power_off(dp->phy);
 
if (dp->plat_data->power_off)
dp->plat_data->power_off(dp->plat_data);
 
+   clk_disable_unprepare(dp->clock);
+
pm_runtime_put_sync(dp->dev);
 
ret = analogix_dp_prepare_panel(dp, false, true);
-- 
2.16.1

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[PATCH v5 31/36] drm/rockchip: Cancel PSR enable work before changing the state

[Enric Balletbo i Serra]

From: Tomasz Figa 

If we change the state first and reschedule later, we might have the
work executed according to previous scheduled time and end up with PSR
re-enabled instantly. Let's cancel the work before changing the state.

While at it, consolidate psr_disable_handler() to just call
rockchip_drm_do_flush(), as they are both supposed to do the same.

Signed-off-by: Tomasz Figa 
Signed-off-by: Thierry Escande 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 20 
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index a107845ba97c..c8655e625ba2 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -138,18 +138,6 @@ static void psr_flush_handler(struct work_struct *work)
mutex_unlock(>lock);
 }
 
-static void psr_disable_handler(struct work_struct *work)
-{
-   struct psr_drv *psr = container_of(work, struct psr_drv, disable_work);
-
-   /* If the state has changed since we initiated the flush, do nothing */
-   mutex_lock(>lock);
-   if (psr->state == PSR_ENABLE)
-   psr_set_state_locked(psr, PSR_FLUSH);
-   mutex_unlock(>lock);
-   mod_delayed_work(system_wq, >flush_work, PSR_FLUSH_TIMEOUT_MS);
-}
-
 /**
  * rockchip_drm_psr_activate - activate PSR on the given pipe
  * @encoder: encoder to obtain the PSR encoder
@@ -198,6 +186,7 @@ EXPORT_SYMBOL(rockchip_drm_psr_deactivate);
 
 static void rockchip_drm_do_flush(struct psr_drv *psr)
 {
+   cancel_delayed_work_sync(>flush_work);
psr_set_state(psr, PSR_FLUSH);
mod_delayed_work(system_wq, >flush_work, PSR_FLUSH_TIMEOUT_MS);
 }
@@ -244,6 +233,13 @@ void rockchip_drm_psr_flush_all(struct drm_device *dev)
 }
 EXPORT_SYMBOL(rockchip_drm_psr_flush_all);
 
+static void psr_disable_handler(struct work_struct *work)
+{
+   struct psr_drv *psr = container_of(work, struct psr_drv, disable_work);
+
+   rockchip_drm_do_flush(psr);
+}
+
 static void psr_input_event(struct input_handle *handle,
unsigned int type, unsigned int code,
int value)
-- 
2.16.1

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[PATCH v5 23/36] drm/bridge: analogix_dp: Move fast link training detect to set_bridge

[Enric Balletbo i Serra]

From: zain wang 

It's too early to detect fast link training, if other step after it
failed, we will set fast_link flag to 1, and retry set_bridge again. In
this case we will power down and power up panel power supply, and we
will do fast link training since we have set fast_link flag to 1. In
fact, we should do full link training now, not the fast link training.
So we should move the fast link detection at the end of set_bridge.

Cc: Tomasz Figa 
Signed-off-by: zain wang 
Signed-off-by: Douglas Anderson 
Signed-off-by: Sean Paul 
Signed-off-by: Thierry Escande 
Reviewed-by: Andrzej Hajda 
Signed-off-by: Enric Balletbo i Serra 
Tested-by: Marek Szyprowski 
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 42 +-
 1 file changed, 26 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index d76e1652b1fd..37b16643f14c 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -601,7 +601,7 @@ static int analogix_dp_process_equalizer_training(struct 
analogix_dp_device *dp)
 {
int lane, lane_count, retval;
u32 reg;
-   u8 link_align, link_status[2], adjust_request[2], spread;
+   u8 link_align, link_status[2], adjust_request[2];
 
usleep_range(400, 401);
 
@@ -645,20 +645,6 @@ static int analogix_dp_process_equalizer_training(struct 
analogix_dp_device *dp)
dev_dbg(dp->dev, "final lane count = %.2x\n",
dp->link_train.lane_count);
 
-   retval = drm_dp_dpcd_readb(>aux, DP_MAX_DOWNSPREAD,
-  );
-   if (retval != 1) {
-   dev_err(dp->dev, "failed to read downspread %d\n",
-   retval);
-   dp->fast_train_enable = false;
-   } else {
-   dp->fast_train_enable =
-   (spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
-   true : false;
-   }
-   dev_dbg(dp->dev, "fast link training %s\n",
-   dp->fast_train_enable ? "supported" : "unsupported");
-
dp->link_train.lt_state = FINISHED;
 
return 0;
@@ -996,6 +982,22 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void 
*arg)
return IRQ_HANDLED;
 }
 
+static int analogix_dp_fast_link_train_detection(struct analogix_dp_device *dp)
+{
+   int ret;
+   u8 spread;
+
+   ret = drm_dp_dpcd_readb(>aux, DP_MAX_DOWNSPREAD, );
+   if (ret != 1) {
+   dev_err(dp->dev, "failed to read downspread %d\n", ret);
+   return ret;
+   }
+   dp->fast_train_enable = !!(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING);
+   dev_dbg(dp->dev, "fast link training %s\n",
+   dp->fast_train_enable ? "supported" : "unsupported");
+   return 0;
+}
+
 static int analogix_dp_commit(struct analogix_dp_device *dp)
 {
int ret;
@@ -1038,8 +1040,16 @@ static int analogix_dp_commit(struct analogix_dp_device 
*dp)
if (ret)
return ret;
 
-   if (dp->psr_enable)
+   if (dp->psr_enable) {
ret = analogix_dp_enable_sink_psr(dp);
+   if (ret)
+   return ret;
+   }
+
+   /* Check whether panel supports fast training */
+   ret =  analogix_dp_fast_link_train_detection(dp);
+   if (ret)
+   dp->psr_enable = false;
 
return ret;
 }
-- 
2.16.1

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Re: [PATCH] drm/etnaviv: init DMA ops for virtual master device

[Russell King - ARM Linux]

On Fri, Mar 09, 2018 at 11:12:37AM -0300, Fabio Estevam wrote:
> Hi Russell,
> 
> On Fri, Mar 9, 2018 at 8:34 AM, Russell King - ARM Linux
>  wrote:
> > On Fri, Mar 09, 2018 at 12:20:59PM +0100, Lucas Stach wrote:
> >> All the DRM GEM dma-buf import/export operations are done through the
> >> virtual DRM master device. As this isn't instanciated from DT anymore
> >> we need to make sure the DMA ops are set up correctly.
> >>
> >> Signed-off-by: Lucas Stach 
> >> ---
> >>  drivers/gpu/drm/etnaviv/etnaviv_drv.c | 3 ++-
> >>  1 file changed, 2 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c 
> >> b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> >> index ab50090d066c..d7666aed943b 100644
> >> --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> >> +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> >> @@ -655,7 +655,8 @@ static int etnaviv_pdev_probe(struct platform_device 
> >> *pdev)
> >>   struct device *dev = >dev;
> >>   struct component_match *match = NULL;
> >>
> >> - dma_set_coherent_mask(>dev, DMA_BIT_MASK(32));
> >> + arch_setup_dma_ops(dev, 0, 0x1, NULL, false);
> >> + dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
> >
> > NAK.  dma_coerce_mask_and_coherent() exists for broken devices.  Please
> > instead ensure that the device is created with the proper default DMA
> > mask.
> 
> Should it be like this (like vc4_drv.c) ?
> 
> --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> @@ -578,6 +578,8 @@ static int etnaviv_bind(struct device *dev)
> struct drm_device *drm;
> int ret;
> 
> +   dev->coherent_dma_mask = DMA_BIT_MASK(32);
> +

No.  Drivers should be using dma_set_coherent_mask().

Whoever is creating this struct device has the responsibility to
initialise the DMA mask to something sensible.

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[PATCH v2 2/3] drm: bridge: Add LVDS decoder driver

[Jacopo Mondi]

Add transparent LVDS decoder driver.

A transparent LVDS decoder is a DRM bridge device that does not require
any configuration and converts LVDS input to digital CMOS/TTL parallel
data output.

Signed-off-by: Jacopo Mondi 
---
 drivers/gpu/drm/bridge/Kconfig|   8 +++
 drivers/gpu/drm/bridge/Makefile   |   1 +
 drivers/gpu/drm/bridge/lvds-decoder.c | 129 ++
 3 files changed, 138 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/lvds-decoder.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 3b99d5a..e52a5af 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -32,6 +32,14 @@ config DRM_DUMB_VGA_DAC
help
  Support for RGB to VGA DAC based bridges

+config DRM_LVDS_DECODER
+   tristate "Transparent LVDS to parallel decoder support"
+   depends on OF
+   select DRM_PANEL_BRIDGE
+   help
+ Support for transparent LVDS to parallel decoders that don't require
+ any configuration.
+
 config DRM_LVDS_ENCODER
tristate "Transparent parallel to LVDS encoder support"
depends on OF
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 373eb28..edc2332 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
 obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
+obj-$(CONFIG_DRM_LVDS_DECODER) += lvds-decoder.o
 obj-$(CONFIG_DRM_LVDS_ENCODER) += lvds-encoder.o
 obj-$(CONFIG_DRM_MEGACHIPS_STDP_GE_B850V3_FW) += 
megachips-stdp-ge-b850v3-fw.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
diff --git a/drivers/gpu/drm/bridge/lvds-decoder.c 
b/drivers/gpu/drm/bridge/lvds-decoder.c
new file mode 100644
index 000..319f4d5
--- /dev/null
+++ b/drivers/gpu/drm/bridge/lvds-decoder.c
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * LVDS to parallel data DRM bridge driver.
+ *
+ * Copyright (C) 2018 Jacopo Mondi 
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+struct lvds_decoder {
+   struct device *dev;
+
+   struct drm_bridge bridge;
+   struct drm_bridge *next;
+   struct drm_encoder *bridge_encoder;
+};
+
+static inline struct lvds_decoder *to_lvds_decoder(struct drm_bridge *bridge)
+{
+   return container_of(bridge, struct lvds_decoder, bridge);
+}
+
+static int lvds_decoder_attach(struct drm_bridge *bridge)
+{
+   struct lvds_decoder *lvds = to_lvds_decoder(bridge);
+
+   return drm_bridge_attach(bridge->encoder, lvds->next, bridge);
+}
+
+struct drm_bridge_funcs lvds_dec_bridge_func = {
+   .attach = lvds_decoder_attach,
+};
+
+static int lvds_decoder_parse_dt(struct lvds_decoder *lvds)
+{
+   struct device_node *lvds_output;
+   struct device_node *remote;
+   int ret = 0;
+
+   lvds_output = of_graph_get_endpoint_by_regs(lvds->dev->of_node, 1, -1);
+   if (!lvds_output) {
+   dev_err(lvds->dev, "Missing endpoint in Port@1\n");
+   return -ENODEV;
+   }
+
+   remote = of_graph_get_remote_port_parent(lvds_output);
+   if (!remote) {
+   dev_err(lvds->dev, "Endpoint in Port@1 unconnected\n");
+   ret = -ENODEV;
+   goto error_put_lvds_node;
+   }
+
+   if (!of_device_is_available(remote)) {
+   dev_err(lvds->dev, "Port@1 remote endpoint is disabled\n");
+   ret = -ENODEV;
+   goto error_put_remote_node;
+   }
+
+   lvds->next = of_drm_find_bridge(remote);
+   if (!lvds->next)
+   ret = -EPROBE_DEFER;
+
+error_put_remote_node:
+   of_node_put(remote);
+error_put_lvds_node:
+   of_node_put(lvds_output);
+
+   return ret;
+}
+
+static int lvds_decoder_probe(struct platform_device *pdev)
+{
+   struct lvds_decoder *lvds;
+   int ret;
+
+   lvds = devm_kzalloc(>dev, sizeof(*lvds), GFP_KERNEL);
+   if (!lvds)
+   return -ENOMEM;
+
+   lvds->dev = >dev;
+   platform_set_drvdata(pdev, lvds);
+
+   ret = lvds_decoder_parse_dt(lvds);
+   if (ret)
+   return ret;
+
+   lvds->bridge.driver_private = lvds;
+   lvds->bridge.of_node = pdev->dev.of_node;
+   lvds->bridge.funcs = _dec_bridge_func;
+
+   drm_bridge_add(>bridge);
+
+   return 0;
+}
+
+static int lvds_decoder_remove(struct platform_device *pdev)
+{
+   struct lvds_decoder *lvds = platform_get_drvdata(pdev);
+
+   drm_bridge_remove(>bridge);
+
+   return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id lvds_decoder_match[] = {
+   { .compatible = "lvds-decoder", },
+   { },
+};
+MODULE_DEVICE_TABLE(of, lvds_decoder_match);
+#endif
+
+static struct platform_driver lvds_decoder_driver = {
+   .probe  = lvds_decoder_probe,
+   .remove = 

[PATCH v2 2/2] drm/tinydrm: Remove chunk splitting in tinydrm_spi_transfer

[Meghana Madhyastha]

Remove chunk splitting in tinydrm_spi_transfer in tinydrm-helpers as the spi 
core will split
a buffer into max_dma_len chunks for the spi controller driver to handle, 
automatic byte
swapping in tinydrm_spi_transfer as it doesn't have users.

Signed-off-by: Meghana Madhyastha 
---
 drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c | 48 --
 drivers/gpu/drm/tinydrm/mipi-dbi.c | 10 ++
 drivers/spi/spi-bcm2835.c  |  2 +-
 3 files changed, 9 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c 
b/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
index bf96072d1b97..6064099e8e63 100644
--- a/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
+++ b/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
@@ -452,62 +452,26 @@ int tinydrm_spi_transfer(struct spi_device *spi, u32 
speed_hz,
struct spi_transfer tr = {
.bits_per_word = bpw,
.speed_hz = speed_hz,
+   .tx_buf = buf,
+   .len = len
};
struct spi_message m;
-   u16 *swap_buf = NULL;
size_t max_chunk;
-   size_t chunk;
-   int ret = 0;
 
-   if (WARN_ON_ONCE(bpw != 8 && bpw != 16))
-   return -EINVAL;
-
-   max_chunk = tinydrm_spi_max_transfer_size(spi, 0);
+   max_chunk = SIZE_MAX;
 
if (drm_debug & DRM_UT_DRIVER)
pr_debug("[drm:%s] bpw=%u, max_chunk=%zu, transfers:\n",
-__func__, bpw, max_chunk);
-
-   if (bpw == 16 && !tinydrm_spi_bpw_supported(spi, 16)) {
-   tr.bits_per_word = 8;
-   if (tinydrm_machine_little_endian()) {
-   swap_buf = kmalloc(min(len, max_chunk), GFP_KERNEL);
-   if (!swap_buf)
-   return -ENOMEM;
-   }
-   }
+   __func__, bpw, max_chunk);
 
spi_message_init();
if (header)
spi_message_add_tail(header, );
spi_message_add_tail(, );
 
-   while (len) {
-   chunk = min(len, max_chunk);
-
-   tr.tx_buf = buf;
-   tr.len = chunk;
-
-   if (swap_buf) {
-   const u16 *buf16 = buf;
-   unsigned int i;
-
-   for (i = 0; i < chunk / 2; i++)
-   swap_buf[i] = swab16(buf16[i]);
-
-   tr.tx_buf = swap_buf;
-   }
-
-   buf += chunk;
-   len -= chunk;
-
-   tinydrm_dbg_spi_message(spi, );
-   ret = spi_sync(spi, );
-   if (ret)
-   return ret;
-   }
+   tinydrm_dbg_spi_message(spi, );
 
-   return 0;
+   return spi_sync(spi, );
 }
 EXPORT_SYMBOL(tinydrm_spi_transfer);
 
diff --git a/drivers/gpu/drm/tinydrm/mipi-dbi.c 
b/drivers/gpu/drm/tinydrm/mipi-dbi.c
index 75dd65c57e74..c8af2d65c2ad 100644
--- a/drivers/gpu/drm/tinydrm/mipi-dbi.c
+++ b/drivers/gpu/drm/tinydrm/mipi-dbi.c
@@ -886,15 +886,9 @@ static int mipi_dbi_typec3_command(struct mipi_dbi *mipi, 
u8 cmd,
 int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *mipi,
  struct gpio_desc *dc)
 {
-   size_t tx_size = tinydrm_spi_max_transfer_size(spi, 0);
struct device *dev = >dev;
int ret;
 
-   if (tx_size < 16) {
-   DRM_ERROR("SPI transmit buffer too small: %zu\n", tx_size);
-   return -EINVAL;
-   }
-
/*
 * Even though it's not the SPI device that does DMA (the master does),
 * the dma mask is necessary for the dma_alloc_wc() in
@@ -924,8 +918,8 @@ int mipi_dbi_spi_init(struct spi_device *spi, struct 
mipi_dbi *mipi,
mipi->swap_bytes = true;
} else {
mipi->command = mipi_dbi_typec1_command;
-   mipi->tx_buf9_len = tx_size;
-   mipi->tx_buf9 = devm_kmalloc(dev, tx_size, GFP_KERNEL);
+   mipi->tx_buf9_len = SZ_16K;
+   mipi->tx_buf9 = devm_kmalloc(dev, mipi->tx_buf9_len, 
GFP_KERNEL);
if (!mipi->tx_buf9)
return -ENOMEM;
}
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
index 0dcc45f158b8..2fd650891c07 100644
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
@@ -448,7 +448,7 @@ static void bcm2835_dma_init(struct spi_master *master, 
struct device *dev)
 
/* all went well, so set can_dma */
master->can_dma = bcm2835_spi_can_dma;
-   master->max_dma_len = 65535; /* limitation by BCM2835_SPI_DLEN */
+   master->max_dma_len = 65528; /* limitation by BCM2835_SPI_DLEN */
/* need to do TX AND RX DMA, so we need dummy buffers */
master->flags = SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX;
 
-- 
2.11.0

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[PATCH v2 1/2] spi: Split spi message into chunks of <65535 in the spi subsystem

[Meghana Madhyastha]

Split spi messages into chunks of <65535 in the spi subsystem and remove the 
message
length warning in bcm2835_spi_can_dma. This is so that the messages can be 
transferred
via dma and that the tinydrm drivers need not split it.

Signed-off-by: Meghana Madhyastha 
---
 drivers/spi/spi-bcm2835.c | 13 -
 drivers/spi/spi.c |  8 
 2 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
index f35cc10772f6..0dcc45f158b8 100644
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
@@ -365,19 +365,6 @@ static bool bcm2835_spi_can_dma(struct spi_master *master,
if (tfr->len < BCM2835_SPI_DMA_MIN_LENGTH)
return false;
 
-   /* BCM2835_SPI_DLEN has defined a max transfer size as
-* 16 bit, so max is 65535
-* we can revisit this by using an alternative transfer
-* method - ideally this would get done without any more
-* interaction...
-*/
-   if (tfr->len > 65535) {
-   dev_warn_once(>dev,
- "transfer size of %d too big for dma-transfer\n",
- tfr->len);
-   return false;
-   }
-
/* if we run rx/tx_buf with word aligned addresses then we are OK */
if size_t)tfr->rx_buf & 3) == 0) &&
(((size_t)tfr->tx_buf & 3) == 0))
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index b33a727a0158..e8e2c366a93b 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1242,6 +1242,14 @@ static void __spi_pump_messages(struct spi_controller 
*ctlr, bool in_kthread)
trace_spi_message_start(ctlr->cur_msg);
 
if (ctlr->prepare_message) {
+   gfp_t gfp_flags = GFP_KERNEL | GFP_DMA;
+   size_t max_transfer_size = 32000;
+   ret = spi_split_transfers_maxsize(ctlr, ctlr->cur_msg, 
max_transfer_size, gfp_flags);
+   if (ret) {
+   dev_err(>dev,
+   "failed to split message\n");
+   goto out;
+   }
ret = ctlr->prepare_message(ctlr, ctlr->cur_msg);
if (ret) {
dev_err(>dev, "failed to prepare message: %d\n",
-- 
2.11.0

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[PATCH v2 0/2] Chunk splitting of spi transfers

[Meghana Madhyastha]

-Call spi_split_transfers_maxsize in __spi_pump_messages
to split large chunks for spi dma transfers.
-Remove chunk splitting in the tinydrm spi helper (as now the core is
handling the chunk splitting).

Changes in v2:
-Change the order of the two patches in the patchset.
-Undo the spurious blank line deletions
-Remove bcm2835_spi_transfer_one_message and add spi_split_transfers_maxsize
 in __spi_pump_messages. This solves the DMA time out error.

Meghana Madhyastha (2):
  spi: Split spi message into chunks of <65535 in the spi subsystem
  drm/tinydrm: Remove chunk splitting in tinydrm_spi_transfer

 drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c | 48 --
 drivers/gpu/drm/tinydrm/mipi-dbi.c | 10 ++
 drivers/spi/spi-bcm2835.c  | 15 +---
 drivers/spi/spi.c  |  8 +
 4 files changed, 17 insertions(+), 64 deletions(-)

-- 
2.11.0

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Re: [RFC PATCH 00/13] SVM (share virtual memory) with HMM in nouveau

[Christian König]

Good to have an example how to use HMM with an upstream driver.

Am 10.03.2018 um 04:21 schrieb jgli...@redhat.com:

This patchset adds SVM (Share Virtual Memory) using HMM (Heterogeneous
Memory Management) to the nouveau driver. SVM means that GPU threads
spawn by GPU driver for a specific user process can access any valid
CPU address in that process. A valid pointer is a pointer inside an
area coming from mmap of private, share or regular file. Pointer to
a mmap of a device file or special file are not supported.


BTW: The recent IOMMU patches which generalized the PASID handling calls 
this SVA for shared virtual address space.


We should probably sync up with those guys at some point what naming to use.


This is an RFC for few reasons technical reasons listed below and also
because we are still working on a proper open source userspace (namely
a OpenCL 2.0 for nouveau inside mesa). Open source userspace being a
requirement for the DRM subsystem. I pushed in [1] a simple standalone
program that can be use to test SVM through HMM with nouveau. I expect
we will have a somewhat working userspace in the coming weeks, work
being well underway and some patches have already been posted on mesa
mailing list.


You could use the OpenGL extensions to import arbitrary user pointers as 
bringup use case for this.


I was hoping to do the same for my ATC/HMM work on radeonsi and as far 
as I know there are even piglit tests for that.



They are work underway to revamp nouveau channel creation with a new
userspace API. So we might want to delay upstreaming until this lands.
We can stil discuss one aspect specific to HMM here namely the issue
around GEM objects used for some specific part of the GPU. Some engine
inside the GPU (engine are a GPU block like the display block which
is responsible of scaning memory to send out a picture through some
connector for instance HDMI or DisplayPort) can only access memory
with virtual address below (1 << 40). To accomodate those we need to
create a "hole" inside the process address space. This patchset have
a hack for that (patch 13 HACK FOR HMM AREA), it reserves a range of
device file offset so that process can mmap this range with PROT_NONE
to create a hole (process must make sure the hole is below 1 << 40).
I feel un-easy of doing it this way but maybe it is ok with other
folks.


Well we have essentially the same problem with pre gfx9 AMD hardware. 
Felix might have some advise how it was solved for HSA.


Regards,
Christian.
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[Bug 104717] Rocket League: grass rendering broken with nir

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104717

Gregor Münch  changed:

   What|Removed |Added

 Status|RESOLVED|VERIFIED

--- Comment #5 from Gregor Münch  ---
Yes, its fixed. Thank you!

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[Bug 100289] 'flip queue failed in radeon_scanout_flip: Invalid argument' error and small frame buffer allocated on turning off and on new monitor

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100289

--- Comment #18 from Michel Dänzer  ---
(In reply to OmegaPhil from comment #17)
> The current state is good enough for me - you could counter and say that there
> should be no disconnect event in the first place, [...]

AFAIK that's up to the monitor (settings?), or possibly even a general issue
with DisplayPort.

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[Bug 105426] [regression] Mesa-18.0rc4 - black screen in some Valve games when run under Wine

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105426

i...@yahoo.com changed:

   What|Removed |Added

  Component|Drivers/Gallium/r600|glsl-compiler

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[Bug 105426] [regression] Mesa-18.0rc4 - black screen in some Valve games when run under Wine

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105426

--- Comment #3 from i...@yahoo.com ---
Created attachment 137961
  --> https://bugs.freedesktop.org/attachment.cgi?id=137961=edit
terminal log of "MESA_GLSL=dump R600_DEBUG=nosb,vs,ps wine steam.exe"

I'm attaching full log created with
"MESA_GLSL=dump R600_DEBUG=nosb,vs,ps wine steam.exe &> glsl_error.log"

The most relevant line in the output seems to be this one:

"error: declarations for shader output `gl_BackSecondaryColor` are in
gl_PerVertex and gl_PerVertex"

It looks like the bug is not related to the R600 driver, but to the
glsl-compiler.

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[Bug 105051] circular locking, switcheroo-cont/889 is trying to acquire lock vga_switchto_stage2, but vga_switcheroo_debugfs_write already has lock

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105051

--- Comment #5 from bugzi...@colorremedies.com ---
Still happens in 4.16.0-0.rc4.git3.1.fc29.x86_64 which is git 1b88accf6a65.

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