Hi Laurent.
>
> > > + unsigned int i;
> >
> > index to arrays are default "int" IIRC.
> > Not that it matters but noticed it.
>
> Are they ? I've always advocated for unsigned indexes to use unsigned
> int.
I did not dig up anything authorative - but found this:
https://bugs.freedesktop.org/show_bug.cgi?id=109246
--- Comment #22 from valentin...@gmail.com ---
This is happening to me as well.
RX570 w/ Acer H236HL Dual head, both inputs HDMI
I didn't have this issue with the same monitors and an nvidia card, so it seems
specific to the amdgpu driver.
> -Original Message-
> From: Philipp Zabel
> Sent: 2019年7月5日 18:32
> To: Wen He ; linux-ker...@vger.kernel.org;
> dri-devel@lists.freedesktop.org
> Cc: Leo Li
> Subject: [EXT] Re: [v1] gpu: ipu-v3: allow to build with ARCH_LAYERSCAPE
>
> Caution: EXT Email
>
> Hi Wen,
>
> On Wed,
On Fri, 7 Jun 2019 13:11:11 +0200, "H. Nikolaus Schaller" wrote:
> Signed-off-by: H. Nikolaus Schaller
> ---
> .../bindings/display/panel/sharp,lq070y3dg3b.txt | 12
> 1 file changed, 12 insertions(+)
> create mode 100644
>
On Fri, 7 Jun 2019 13:11:10 +0200, "H. Nikolaus Schaller" wrote:
> Signed-off-by: H. Nikolaus Schaller
> ---
> .../display/panel/ortustech,com37h3m99dtc.txt| 12
> 1 file changed, 12 insertions(+)
> create mode 100644
>
On Fri, 7 Jun 2019 13:11:09 +0200, "H. Nikolaus Schaller" wrote:
> Signed-off-by: H. Nikolaus Schaller
> ---
> .../display/panel/ortustech,com37h3m05dtc.txt| 12
> 1 file changed, 12 insertions(+)
> create mode 100644
>
On Wed, 5 Jun 2019 19:42:43 +0800, wrote:
> From: Yongqiang Niu
>
> Update device tree binding documention for the display subsystem for
> Mediatek MT8183 SOCs
>
> Signed-off-by: Yongqiang Niu
> ---
> Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
> 1 file
On Wed, 5 Jun 2019 19:42:42 +0800, wrote:
> From: Yongqiang Niu
>
> Update device tree binding documention for the display subsystem for
> Mediatek MT8183 SOCs
>
> Signed-off-by: Yongqiang Niu
> ---
> Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
> 1 file
On Wed, Jun 05, 2019 at 07:42:41PM +0800, yongqiang@mediatek.com wrote:
> From: Yongqiang Niu
>
> Update device tree binding documention for the display subsystem for
> Mediatek MT8183 SOCs
>
> Signed-off-by: Yongqiang Niu
> ---
>
On Mon, Jul 8, 2019 at 7:00 PM Laurent Pinchart
wrote:
>
> Hi Rob,
>
> On Mon, Jul 08, 2019 at 01:00:35PM -0600, Rob Herring wrote:
> > On Sun, Jul 7, 2019 at 12:25 PM Laurent Pinchart wrote:
> > >
> > > The 'toppoly' vendor prefix is in use and refers to TPO, whose DT vendor
> > > prefix is
Hi Rob,
On Mon, Jul 08, 2019 at 01:00:35PM -0600, Rob Herring wrote:
> On Sun, Jul 7, 2019 at 12:25 PM Laurent Pinchart wrote:
> >
> > The 'toppoly' vendor prefix is in use and refers to TPO, whose DT vendor
> > prefix is already defined as 'tpo'. Add 'toppoly' as an alternative and
> > document
On Mon, Jul 1, 2019 at 2:58 AM Maxime Ripard wrote:
>
> Hi!
>
> On Fri, Jun 28, 2019 at 12:39:32PM +0200, Andrzej Hajda wrote:
> > On 12.06.2019 17:20, Maxime Ripard wrote:
> > >> I am not sure if I understand whole discussion here, but I also do not
> > >> understand whole edp-connector thing.
>
Hi all,
On Mon, 24 Jun 2019 21:06:59 +1000 Stephen Rothwell
wrote:
>
> On Mon, 24 Jun 2019 20:49:08 +1000 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the akpm-current tree got a conflict in:
> >
> > mm/memory.c
> >
> > between commit:
> >
> > 29875a52915e ("mm: Add an
Hi all,
On Mon, 24 Jun 2019 13:53:52 +1000 Stephen Rothwell
wrote:
>
> On Mon, 17 Jun 2019 13:20:27 +1000 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the drm-intel tree got a conflict in:
> >
> > drivers/gpu/drm/i915/i915_drv.h
> >
> > between commit:
> >
> >
Hi all,
On Mon, 24 Jun 2019 13:41:47 +1000 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the drm tree got a conflict in:
>
> Documentation/fb/modedb.rst
>
> between commit:
>
> ab42b818954c ("docs: fb: convert docs to ReST and rename to *.rst")
>
> from the jc_docs tree and
> On Mon, Jul 8, 2019 at 4:16 PM Brendan Higgins
> wrote:
>>
>> CC'ing Iurii Zaikin
>>
>> On Fri, Jul 5, 2019 at 1:48 PM Luis Chamberlain wrote:
>> >
>> > On Wed, Jul 03, 2019 at 05:36:15PM -0700, Brendan Higgins wrote:
>> > > Add entry for the new proc sysctl KUnit test to the PROC SYSCTL
Hi all,
On Wed, 19 Jun 2019 14:19:49 +1000 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the drm tree got a conflict in:
>
> drivers/gpu/drm/i915/Makefile.header-test
>
> between commit:
>
> e846f0dc57f4 ("kbuild: add support for ensuring headers are self-contained")
>
> from
CC'ing Iurii Zaikin
On Fri, Jul 5, 2019 at 1:48 PM Luis Chamberlain wrote:
>
> On Wed, Jul 03, 2019 at 05:36:15PM -0700, Brendan Higgins wrote:
> > Add entry for the new proc sysctl KUnit test to the PROC SYSCTL section.
> >
> > Signed-off-by: Brendan Higgins
> > Reviewed-by: Greg Kroah-Hartman
From: Yongqiang Niu
Update device tree binding documention for the display subsystem for
Mediatek MT8183 SOCs
Signed-off-by: Yongqiang Niu
---
.../bindings/display/mediatek/mediatek,disp.txt| 27 +++---
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git
From: Yongqiang Niu
This patch add mutex description for mt8183 display
Signed-off-by: Yongqiang Niu
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Yongqiang Niu
Update device tree binding documention for the display subsystem for
Mediatek MT8183 SOCs
Signed-off-by: Yongqiang Niu
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Yongqiang Niu
This patch add display nodes for mt8183
Signed-off-by: Yongqiang Niu
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 109 +++
1 file changed, 109 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
From: Yongqiang Niu
mutex sof will be ddp private data
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 43 +++---
1 file changed, 35 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
From: Yongqiang Niu
This patch add component OVL_2L1
Signed-off-by: Yongqiang Niu
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
2 files changed, 2 insertions(+)
diff --git
From: Yongqiang Niu
This patch add layer_nr for ovl private data
ovl_2l almost same with with ovl hardware, except the
layer number for ovl_2l is 2 and ovl is 4.
this patch is a preparation for ovl-2l and
ovl share the same driver.
Signed-off-by: Yongqiang Niu
Reviewed-by: CK Hu
---
From: Yongqiang Niu
this patch add add connection from OVL_2L0 to RDMA0
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
From: Yongqiang Niu
This patch add component DITHER
Signed-off-by: Yongqiang Niu
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 32 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++
2 files changed, 34 insertions(+)
diff --git
From: Yongqiang Niu
This patch add ovl0/ovl_2l0 usecase
in ovl->ovl_2l0 direct link usecase:
1. the crtc support layer number will 4+2
2. ovl_2l0 background color input select ovl0 when crtc init
and disable it when crtc finish
3. config ovl_2l0 layer, if crtc config layer number is
bigger than
From: Yongqiang Niu
This patch add ddp component CCORR
Signed-off-by: Yongqiang Niu
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 32 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++
2 files changed, 34 insertions(+)
diff --git
From: Yongqiang Niu
This patch add commponent OVL_2L0
Signed-off-by: Yongqiang Niu
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++
2 files changed, 4 insertions(+)
diff --git
From: Yongqiang Niu
mutex sof register offset will be private data of ddp
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
From: Yongqiang Niu
mutex mod register offset will be private data of ddp.
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
From: Yongqiang Niu
Update device tree binding documention for the display subsystem for
Mediatek MT8183 SOCs
Signed-off-by: Yongqiang Niu
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Yongqiang Niu
This patch add support for mediatek SOC MT8183
1.ovl_2l share driver with ovl
2.rdma1 share drive with rdma0, but fifo size is different
3.add mt8183 mutex private data, and mmsys private data
4.add mt8183 main and external path module for crtc create
Signed-off-by:
From: Yongqiang Niu
This patch add connection from RDMA0 to COLOR0
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index
From: Yongqiang Niu
distinguish ovl and ovl_2l by layer_nr when get comp
id
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
From: Yongqiang Niu
This patch add background color input select function for ovl/ovl_2l
ovl include 4 DRAM layer and 1 background color layer
ovl_2l include 4 DRAM layer and 1 background color layer
DRAM layer frame buffer data from render hardware, GPU for example.
backgournd color layer is
From: Yongqiang Niu
This patch add function to background color input select for ovl/ovl_2l direct
link
for ovl/ovl_2l direct link usecase, we need set background color
input select for these hardware.
this is preparation patch for ovl/ovl_2l usecase
Signed-off-by: Yongqiang Niu
---
From: Yongqiang Niu
This patch add connection from RDMA1 to DSI0
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index
From: Yongqiang Niu
This patch add connection from DITHER0 to DSI0
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index
From: Yongqiang Niu
This patch add gmc_bits for ovl private data
GMC register was set RDMA ultra and pre-ultra threshold.
10bit GMC register define is different with other SOC, gmc_thrshd_l not
used.
Signed-off-by: Yongqiang Niu
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
From: Yongqiang Niu
This patch add connection from RDMA0 to DSI0
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index
From: Yongqiang Niu
This patch add connection from OVL_2L1 to RDMA1
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index
From: Yongqiang Niu
Update device tree binding documention for the display subsystem for
Mediatek MT8183 SOCs
Signed-off-by: Yongqiang Niu
---
.../bindings/display/mediatek/mediatek,display.txt | 21 +
1 file changed, 21 insertions(+)
create mode 100644
From: Yongqiang Niu
except mutex mod, mutex mod reg,mutex sof reg,
and mutex sof id will be ddp private data
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 41 +-
1 file changed, 30 insertions(+), 11 deletions(-)
diff --git
From: Yongqiang Niu
This patch add RDMA1 description for mt8183 display
Signed-off-by: Yongqiang Niu
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Yongqiang Niu
Here is two modifition in this patch:
1.bls->dpi0 and rdma1->dsi are differen usecase,
Split DISP_REG_CONFIG_DSI_SEL setting into anther usecase
2.remove DISP_REG_CONFIG_DPI_SEL setting, DPI_SEL_IN_BLS is 0 and
this is same with hardware defautl setting,
Signed-off-by:
From: Yongqiang Niu
This series are based on 5.2-rc1 and provid 27 patch
to support mediatek SOC MT8183
Change since v3
- fix reviewed issue in v3
- fix type error in v3
- fix conflict with iommu patch
Yongqiang Niu (33):
dt-bindings: mediatek: add binding for mt8183 display
dt-bindings:
On Mon, Jul 8, 2019 at 11:08 AM Brendan Higgins
wrote:
>
> On Fri, Jul 5, 2019 at 1:15 PM Luis Chamberlain wrote:
> >
> > On Wed, Jul 03, 2019 at 05:35:58PM -0700, Brendan Higgins wrote:
> > > Add core facilities for defining unit tests; this provides a common way
> > > to define test cases,
On Thu, Jul 4, 2019 at 7:52 AM Nathan Chancellor
wrote:
>
> clang warns:
>
> In file included from drivers/gpu/drm/amd/amdgpu/nv.c:53:
> drivers/gpu/drm/amd/amdgpu/../amdgpu/mes_v10_1.h:24:9: warning:
> '__MES_V10_1_H__' is used as a header guard here, followed by #define of
> a different
On Mon, 8 Jul 2019, Qian Cai wrote:
> On Mon, 2019-07-08 at 15:21 -0400, Ilia Mirkin wrote:
> > > -/**
> > > +// SPDX-License-Identifier: MIT
> > > +/*
> > > * \file drm_memory.c
> > > * Memory management wrappers for DRM
> > > *
> > > @@ -12,25 +13,6 @@
> > > * Copyright 1999 Precision
Hi Laurent.
> > +
> > +MODULE_DEVICE_TABLE(of, ls037v7dw01_of_match);
> > +
> > +static struct platform_driver ls037v7dw01_driver = {
> > + .probe = ls037v7dw01_probe,
> > + .remove = __exit_p(ls037v7dw01_remove),
I hope _exit_p() is not needed.
No other panel drivers use it
Hi Laurent.
Third panel driver in line for review.
Review comments that are duplicates from the first two will have only a
brief remark - if any.
On Sun, Jul 07, 2019 at 09:18:58PM +0300, Laurent Pinchart wrote:
> This panel is used on the SDP3430.
Add a little more context and put it in Kconfig
On Mon, 2019-07-08 at 15:21 -0400, Ilia Mirkin wrote:
> On Mon, Jul 8, 2019 at 2:06 PM Qian Cai wrote:
> >
> > The opening comment mark "/**" is reserved for kernel-doc comments, so
> > it will generate a warning with "make W=1".
> >
> > drivers/gpu/drm/drm_memory.c:2: warning: Cannot
Hi Laurent.
>
> Use __maybe_unused, and loose the #ifdef
> And why does this panel need suspend/resume?
> The panel is supposed to be turned off in disable()
Sorry - the panel is supposed to be turned off in unprepare.
disable() is mainly for backlight and such.
Sam
On Mon, Jul 8, 2019 at 2:06 PM Qian Cai wrote:
>
> The opening comment mark "/**" is reserved for kernel-doc comments, so
> it will generate a warning with "make W=1".
>
> drivers/gpu/drm/drm_memory.c:2: warning: Cannot understand * \file
> drm_memory.c
>
> Also, silence a checkpatch warning by
https://bugs.freedesktop.org/show_bug.cgi?id=111082
--- Comment #7 from Sylvain BERTRAND ---
> My CPU load is also super low and never above 50 % on a single
> core.
This is the issue: looks like cpu capping in the 3d engine.
But, since csgo 3d engine is direct3d designed, this is why vulkan.
> My CPU load is also super low and never above 50 % on a single
> core.
This is the issue: looks like cpu capping in the 3d engine.
But, since csgo 3d engine is direct3d designed, this is why vulkan.
linux csgo devs are the ones who can profile properly their game and figure out
the culprit.
Hi Laurent.
Thanks for keeping me busy :-)
On Sun, Jul 07, 2019 at 09:18:57PM +0300, Laurent Pinchart wrote:
> This panel is used on the Zoom2/3/3630 SDP boards.
This information may be good to have in the Kconfig help entry too.
Maybe tell in the changelog where this code originates from.
>
On Sun, Jul 7, 2019 at 12:25 PM Laurent Pinchart
wrote:
>
> The 'toppoly' vendor prefix is in use and refers to TPO, whose DT vendor
> prefix is already defined as 'tpo'. Add 'toppoly' as an alternative and
> document it as legacy.
>
> Signed-off-by: Laurent Pinchart
> ---
>
Hi Laurent.
Good to move omapdrm to a more standard way to do things.
> new file mode 100644
> index ..d8a8c3a3a8c5
> --- /dev/null
> +++ b/drivers/gpu/drm/panel/panel-lg-lb035q02.c
> @@ -0,0 +1,235 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * LG.Philips LB035Q02 LCD Panel
On Tue, Jul 02, 2019 at 11:48:44AM +0200, Arend Van Spriel wrote:
> You made me look ;-) Actually not touching my drivers so I'm off the hook.
> However, I was wondering if drivers could know so I decided to look into
> the DMA-API.txt documentation which currently states:
>
> """
> The flag
Acked-by: Slava Abramov
Tested-by: Slava Abramov
From: amd-gfx on behalf of Arnd
Bergmann
Sent: Monday, July 8, 2019 9:52:08 AM
To: Wentland, Harry; Li, Sun peng (Leo); Deucher, Alexander; Koenig, Christian;
Zhou, David(ChunMing); David Airlie; Daniel
In the kernel documentation, HDCP specifications links are shared as a
reference for SRM table format.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/drm_hdcp.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index
DRM API for generating uevent for a status changes of connector's
property.
This uevent will have following details related to the status change:
HOTPLUG=1, CONNECTOR= and PROPERTY=
Need ACK from this uevent from userspace consumer.
v2:
Minor fixes at KDoc comments [Daniel]
v3:
Check the
drm function to update the content protection property state and to
generate a uevent is invoked from the intel hdcp property work.
Hence whenever kernel changes the property state, userspace will be
updated with a uevent.
Need a ACK for uevent generating uAPI from userspace.
v2:
state update
drm function is defined and exported to update a connector's
content protection property state and to generate a uevent along
with it.
Need ACK for the uevent from userspace consumer.
v2:
Update only when state is different from old one.
v3:
KDoc is added [Daniel]
v4:
KDoc is extended bit
Attaches the content type property for HDCP2.2 capable connectors.
Implements the update of content type from property and apply the
restriction on HDCP version selection.
Need ACK for content type property from userspace consumer.
v2:
s/cp_content_type/content_protection_type [daniel]
This patch adds a DRM ENUM property to the selected connectors.
This property is used for mentioning the protected content's type
from userspace to kernel HDCP authentication.
Type of the stream is decided by the protected content providers.
Type 0 content can be rendered on any HDCP protected
Adding the uAPI support for the HDCP content type is the main focus
here. Along with that uevent is implemented for the
"Content Protection" state change that got triggered by kernel.
v9:
KDoc improvements [pekka]
Ramalingam C (6):
drm: Add Content protection type property
drm/i915: Attach
On Wed 03 Jul 07:00 PDT 2019, Rob Clark wrote:
> From: Rob Clark
>
> For platforms that require the "zap shader" to take the GPU out of
> secure mode at boot, we also need the zap fw to end up in the initrd.
>
> Signed-off-by: Rob Clark
My upcoming pull request for this merge window includes
On Fri, Jul 5, 2019 at 1:20 PM Luis Chamberlain wrote:
>
> On Wed, Jul 03, 2019 at 05:35:58PM -0700, Brendan Higgins wrote:
> > +struct kunit {
> > + void *priv;
> > +
> > + /* private: internal use only. */
> > + const char *name; /* Read only after initialization! */
> > + bool
On Fri, Jul 5, 2019 at 1:15 PM Luis Chamberlain wrote:
>
> On Wed, Jul 03, 2019 at 05:35:58PM -0700, Brendan Higgins wrote:
> > Add core facilities for defining unit tests; this provides a common way
> > to define test cases, functions that execute code which is under test
> > and determine
The opening comment mark "/**" is reserved for kernel-doc comments, so
it will generate a warning with "make W=1".
drivers/gpu/drm/drm_memory.c:2: warning: Cannot understand * \file
drm_memory.c
Also, silence a checkpatch warning by adding a license identfiter where
it indicates the MIT license
On Mon, Jul 01, 2019 at 09:39:06AM -0700, Doug Anderson wrote:
> Hi,
>
> On Sun, Jun 30, 2019 at 1:55 PM Sam Ravnborg wrote:
> >
> > Hi Douglas.
> >
> > > > +
> > > > + /* Only add timings if override was not there or failed to validate
> > > > */
> > > > + if (num == 0 &&
Hi Dough.
On Mon, Jul 01, 2019 at 09:39:24AM -0700, Doug Anderson wrote:
> Hi,
>
> On Sun, Jun 30, 2019 at 1:22 PM Sam Ravnborg wrote:
> >
> > > @@ -91,6 +92,8 @@ struct panel_simple {
> > > struct i2c_adapter *ddc;
> > >
> > > struct gpio_desc *enable_gpio;
> > > +
> > > +
https://bugs.freedesktop.org/show_bug.cgi?id=111082
--- Comment #6 from nuc...@hotmail.com ---
Hm, well as I said my fps are constantly very high, so it looks like a frame
pacing issue. My CPU load is also super low and never above 50 % on a single
core.
Of course this might be an issue with the
https://bugs.freedesktop.org/show_bug.cgi?id=111087
--- Comment #12 from Michel Dänzer ---
Sounds like Xorg keeps crashing, please attach the Xorg.0.log.old file.
--
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dri-devel
I did report my CSGO performance pb to valve devs:
https://github.com/ValveSoftware/csgo-osx-linux/issues/
I have no idea if my CPU bound performance pb is in the driver (which is very
likely since it's opengl), or the 3D engine.
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https://bugs.freedesktop.org/show_bug.cgi?id=111082
--- Comment #5 from Sylvain BERTRAND ---
I did report my CSGO performance pb to valve devs:
https://github.com/ValveSoftware/csgo-osx-linux/issues/
I have no idea if my CPU bound performance pb is in the driver (which is very
likely since
The Sharp LD-D5116Z01B is a 12.3" eDP panel with a 1920X1280 resolution.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Sam Ravnborg
---
drivers/gpu/drm/panel/panel-simple.c | 29
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
The Lenovo Miix 630 laptop can be found with one of two panels - a BOE
or Sharp option. This likely provides options during manufacturing.
These panels connect via eDP, however they sit behind a DSI to eDP
bridge on the laptop, so they can easily be handled by the existing
simple panel code.
The Sharp LD-D5116Z01B is a 12.3" eDP panel with a 1920X1280 resolution.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Sam Ravnborg
---
.../display/panel/sharp,ld-d5116z01b.txt | 26 +++
1 file changed, 26 insertions(+)
create mode 100644
https://bugs.freedesktop.org/show_bug.cgi?id=111082
--- Comment #4 from nuc...@hotmail.com ---
So maybe we should figure out if it is graphics driver related or a bug in the
CS:GO engine?
Why has this bug report been set to "RESOLVED FIX"?
I understand claiming that this might not be a graphics
From: Ville Syrjälä
Rename the encoder->crtc_mask to encoder->pipe_mask to better
reflect what it actually contains.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_crt.c | 4 ++--
On 2019-07-08 at 13:16:23 +0300, Pekka Paalanen wrote:
> On Fri, 5 Jul 2019 06:16:42 +0530
> Ramalingam C wrote:
>
> > In the kernel documentation, HDCP specifications links are shared as a
> > reference for SRM table format.
> >
> > Signed-off-by: Ramalingam C
> > ---
> >
From: Ville Syrjälä
WARN if the encoder possible_crtcs is effectively empty or contains
bits for non-existing crtcs.
TODO: Or should we perhapst just filter out any bit for a
non-exisiting crtc?
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_encoder.c | 18 ++
1 file
From: Ville Syrjälä
We don't need to special case PCH vs. gen4 when setting up the LVDS
crtc_mask. Just claim pipes A|B|C work and intel_encoder_crtcs() drop
out any crtc that doesn't exist.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_lvds.c | 4 +---
1 file changed, 1
From: Ville Syrjälä
Many drivers are populating encoder->possible_clones wrong. Let's
persuade them to get it right by adding some loud WARNs.
We'll cross check the bits between any two encoders. So either
both encoders can clone with the other, or neither can.
We'll also complain about
From: Ville Syrjälä
Use BIT(pipe) for better legibility when populating the crtc_mask
for encoders.
Also remove the redundant possible_crtcs setup for the TV encoder.
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 4 ++--
From: Ville Syrjälä
It's not at all clear what cloning options this driver supports.
So let's just clear possible_clones instead of setting it to some
bogus value.
Cc: Philipp Zabel
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/imx/imx-drm-core.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Ville Syrjälä
Replace the hand rolled encoder bitmask thing with drm_encoder_mask()
Cc: Inki Dae
Cc: Joonyoung Shim
Cc: Seung-Woo Kim
Cc: Kyungmin Park
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/exynos/exynos_drm_drv.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
From: Ville Syrjälä
Don't advertize non-exisiting crtcs in the encoder possible_crtcs
bitmask.
Reviewed-by: Dhinakaran Pandiyan
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git
From: Ville Syrjälä
Each fake MST encoder is tied to a specific pipe. Fix the encoder's
crtc_mask to reflect that fact.
Reviewed-by: Dhinakaran Pandiyan
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Ville Syrjälä
Replace the hand rolled stuff with drm_encoder_mask() when populating
possible_clones, and rename the function to
intel_encoder_possible_clones() to make it clear what it's used for.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 13
From: Ville Syrjälä
The current possible_clones setup doesn't look sensible. I'm assuming
the 0 and 1 are supposed to refer to the indexes of the hdmi and hda
encoders? So it kinda looks like we want hda+hdmi cloning, but then
dvo also claims to be cloneable with hdmi, but hdmi won't
From: Ville Syrjälä
There's no point in the cast for accessing the base class. Just
take the address of the struct instead.
Cc: Benjamin Gaignard
Cc: Vincent Abriou
Acked-by: Benjamin Gaignard
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/sti/sti_tvout.c | 6 +++---
1 file changed, 3
From: Ville Syrjälä
I doubt the DP+DP and SDVO+SDVO cloning works for this driver.
i915 at least doesn't do those. Truthfully there could be some very
specific circumstances where some of them would do doable, but
genereally it's too much pain to deal with so we've chose not to
bother. Let's use
From: Ville Syrjälä
Resurrecting my possible_clones/crtcs cleanup from ~1 year ago.
Some prep work from the previous posting did get merged in the
meantime.
I have a feeling the WARNs from the new validation code may end up
triggering on some drivers, but I don't imagine this stuff would
get
From: Ville Syrjälä
The docs say possible_clones should always include the encoder itself.
Since most drivers don't want to deal with the complexities of cloning
let's allow them to set possible_clones=0 and instead we'll fix that
up in the core.
We can't put this special case into
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