Hi
Here's this week drm-misc-fixes PR.
Somehow the email wasn't sent yesterday when I first did it, so let's
try again.
Maxime
drm-misc-fixes-2022-07-07-1:
Three mode setting fixes for fsl-ldb, a fbdev removal use-after-free fix,
a dma-buf fence use-after-free fix, a DMA setup fix for
On 07-07-22, 21:53, Yang Yingliang wrote:
> mtk_dp_phy_driver is only used in phy-mtk-dp.c now, change it to static.
Applied, thanks
--
~Vinod
Hi Matthew,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm/drm-next
drm-exynos/exynos-drm-next drm-misc/drm-misc-next linus/master v5.19-rc5
next-20220707]
[If your patch is applied
On 08/07/2022 04:32, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-07-07 14:32:00)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index f00eae66196f..1ef845005b14 100644
---
On 08/07/2022 04:29, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-07-07 14:31:57)
The commit 687825c402f1 ("dt-bindings: msm/dp: Change reg definition")
changed reg property to list separate register blocks, which broke
validation of DT files using single register block. Restore
On 08/07/2022 04:28, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-07-07 14:31:56)
The p1 region was probably added by mistake, none of the DTS files
provides one (and the driver source code also doesn't use one). Drop it
now.
Yes, looks like the driver doesn't use it.
Fixes:
From: "Souptick Joarder (HPE)"
kernel test robot throws below warning ->
includecheck warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/amd/display/dc/os_types.h:
drm/drm_print.h is included more than once.
Remove duplicate header.
Reported-by: kernel test robot
Signed-off-by: Souptick
Quoting Dmitry Baryshkov (2022-07-07 14:32:04)
> Drop #address/#size-cells from eDP device node. For eDP the panels are
> not described directly under the controller node. They are either
> present under aux-bus child node, or they are declared separately (e.g.
> in a /soc node).
>
>
Quoting Dmitry Baryshkov (2022-07-07 14:32:03)
> Drop #clock-cells from DP device node. It is a leftover from the times
> before splitting the it into controller and PHY devices. Now clocks are
> provided by the PHY, while the controller doesn't provide any clocks.
>
> Signed-off-by: Dmitry
Quoting Dmitry Baryshkov (2022-07-07 14:32:02)
> Drop #clock-cells from DP device node. It is a leftover from the times
> before splitting the it into controller and PHY devices. Now clocks are
s/the it/the device/
> provided by the PHY, while the controller doesn't provide any clocks.
>
>
Quoting Dmitry Baryshkov (2022-07-07 14:32:01)
> The #sound-dai-cells property should be used only for DP controllers. It
> doesn't make sense for eDP, there is no support for audio output. Also
> aux-bus should not be used for DP controllers. Take care of these
> differences.
>
> Signed-off-by:
Quoting Dmitry Baryshkov (2022-07-07 14:32:00)
> diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> index f00eae66196f..1ef845005b14 100644
> ---
Quoting Dmitry Baryshkov (2022-07-07 14:31:59)
> Document missing definitions for opp-table (DP controller OPPs), aux-bus
> (eDP AUX BUS) and data-lanes (DP/eDP lanes mapping) properties.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Stephen Boyd
Quoting Dmitry Baryshkov (2022-07-07 14:31:57)
> The commit 687825c402f1 ("dt-bindings: msm/dp: Change reg definition")
> changed reg property to list separate register blocks, which broke
> validation of DT files using single register block. Restore
> compatibility with older (single register
Quoting Dmitry Baryshkov (2022-07-07 14:31:56)
> The p1 region was probably added by mistake, none of the DTS files
> provides one (and the driver source code also doesn't use one). Drop it
> now.
Yes, looks like the driver doesn't use it.
>
> Fixes: 687825c402f1 ("dt-bindings: msm/dp: Change
Quoting Kuogee Hsieh (2022-07-06 12:32:08)
> Some userspace presumes that the first connected connector is the main
> display, where it's supposed to display e.g. the login screen. For
> laptops, this should be the main panel.
>
> This patch call drm_helper_move_panel_connectors_to_head() after
>
Quoting Rasmus Villemoes (2022-07-07 10:46:24)
> On 05/07/2022 17.10, Kieran Bingham wrote:
> > Hi Rasmus,
> >
> > Quoting Rasmus Villemoes (2022-07-05 10:08:37)
> >> Hi
> >>
> >> I have an imx8mp board with a sn65dsi86 and a (full-size) DisplayPort
> >> connector, which I'm trying to get up and
On 7/7/2022 2:20 PM, Rob Clark wrote:
From: Rob Clark
Fixes `kms_cursor_crc --run-subtest cursor-offscreen`.. when the cursor
moves offscreen the plane becomes non-visible, so we need to skip over
it in crtc atomic test and mixer setup.
Signed-off-by: Rob Clark
Reviewed-by: Abhinav Kumar
On Mon, 4 Jul 2022 21:59:03 -0300
Jason Gunthorpe wrote:
> diff --git a/drivers/s390/cio/vfio_ccw_ops.c b/drivers/s390/cio/vfio_ccw_ops.c
> index b49e2e9db2dc6f..09e0ce7b72324c 100644
> --- a/drivers/s390/cio/vfio_ccw_ops.c
> +++ b/drivers/s390/cio/vfio_ccw_ops.c
> @@ -44,31 +44,19 @@ static int
On 08/07/2022 00:20, Rob Clark wrote:
From: Rob Clark
Fixes `kms_cursor_crc --run-subtest cursor-offscreen`.. when the cursor
moves offscreen the plane becomes non-visible, so we need to skip over
it in crtc atomic test and mixer setup.
Signed-off-by: Rob Clark
Fixes: 25fdd5933e4c
Drop #clock-cells from DP device node. It is a leftover from the times
before splitting the it into controller and PHY devices. Now clocks are
provided by the PHY, while the controller doesn't provide any clocks.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 --
1
The #sound-dai-cells property should be used only for DP controllers. It
doesn't make sense for eDP, there is no support for audio output. Also
aux-bus should not be used for DP controllers. Take care of these
differences.
Signed-off-by: Dmitry Baryshkov
---
Drop #clock-cells from DP device node. It is a leftover from the times
before splitting the it into controller and PHY devices. Now clocks are
provided by the PHY, while the controller doesn't provide any clocks.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 -
1
Drop #address/#size-cells from eDP device node. For eDP the panels are
not described directly under the controller node. They are either
present under aux-bus child node, or they are declared separately (e.g.
in a /soc node).
Signed-off-by: Dmitry Baryshkov
---
Document missing definitions for opp-table (DP controller OPPs), aux-bus
(eDP AUX BUS) and data-lanes (DP/eDP lanes mapping) properties.
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display/msm/dp-controller.yaml | 12
1 file changed, 12 insertions(+)
diff --git
The p1 region was probably added by mistake, none of the DTS files
provides one (and the driver source code also doesn't use one). Drop it
now.
Fixes: 687825c402f1 ("dt-bindings: msm/dp: Change reg definition")
Signed-off-by: Dmitry Baryshkov
---
On SC7280 platform the eDP controller uses an extended amount of clocks.
Since it is the only known platform using such configuration, use
if-then-else rather than listing each and every compatible string in the
if conditions.
Signed-off-by: Dmitry Baryshkov
---
The commit fa384dd8b9b8 ("drm/msm/dp: delete vdda regulator related
functions from eDP/DP controller") removed support for VDDA supplies
from the DP controller driver. These supplies are now handled by the eDP
or QMP PHYs. Mark these properties as deprecated and drop them from the
example.
The commit 687825c402f1 ("dt-bindings: msm/dp: Change reg definition")
changed reg property to list separate register blocks, which broke
validation of DT files using single register block. Restore
compatibility with older (single register block) DT files by declaring
it as a deprecated
Fix several issues with the DP and eDP bindings on the Qualcomm
platforms. While we are at it, fix several small issues with platform
files declaring these controllers.
Dmitry Baryshkov (9):
dt-bindings: msm/dp: drop extra p1 region
dt-bindings: msm/dp: bring back support for legacy DP reg
On 04.07.2022 10:09, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Avoid trying to invalidate the TLB in the middle of performing an
engine reset, as this may result in the reset timing out. Currently,
the TLB invalidate is only serialised by its own mutex, forgoing the
uncore lock, but we
On 04.07.2022 10:09, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Don't allow two engines to be reset in parallel, as they would both
try to select a reset bit (and send requests to common registers)
and wait on that register, at the same time. Serialize control of
the reset requests/acks
On 7/7/2022 2:21 PM, Stephen Boyd wrote:
Quoting Abhinav Kumar (2022-07-07 14:11:08)
On 7/6/2022 12:14 PM, Stephen Boyd wrote:
Set the panel orientation in drm when the panel is directly connected,
i.e. we're not using an external bridge. The external bridge case is
already handled by the
Quoting Abhinav Kumar (2022-07-07 14:11:08)
>
>
> On 7/6/2022 12:14 PM, Stephen Boyd wrote:
> > Set the panel orientation in drm when the panel is directly connected,
> > i.e. we're not using an external bridge. The external bridge case is
> > already handled by the panel bridge code, so we only
From: Rob Clark
Fixes `kms_cursor_crc --run-subtest cursor-offscreen`.. when the cursor
moves offscreen the plane becomes non-visible, so we need to skip over
it in crtc atomic test and mixer setup.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 ++
1 file
On 7/6/2022 12:14 PM, Stephen Boyd wrote:
Set the panel orientation in drm when the panel is directly connected,
i.e. we're not using an external bridge. The external bridge case is
already handled by the panel bridge code, so we only update the path we
take when the panel is directly
On 06/07/2022 22:32, Kuogee Hsieh wrote:
Some userspace presumes that the first connected connector is the main
display, where it's supposed to display e.g. the login screen. For
laptops, this should be the main panel.
This patch call drm_helper_move_panel_connectors_to_head() after
https://bugzilla.kernel.org/show_bug.cgi?id=208835
Mario Limonciello (AMD) (mario.limoncie...@amd.com) changed:
What|Removed |Added
Status|NEW
https://bugzilla.kernel.org/show_bug.cgi?id=210369
Mario Limonciello (AMD) (mario.limoncie...@amd.com) changed:
What|Removed |Added
Status|NEW
On Thu, Jul 7, 2022 at 4:38 PM Harry Wentland wrote:
>
>
>
> On 2022-07-07 14:22, Alex Deucher wrote:
> > On Wed, Jul 6, 2022 at 3:41 AM Zhongjun Tan wrote:
> >>
> >> From: Zhongjun Tan
> >>
> >> Fix unsigned expression compared with zero
> >>
> >> Signed-off-by: Zhongjun Tan
> >> ---
> >>
On 2022-07-07 14:22, Alex Deucher wrote:
> On Wed, Jul 6, 2022 at 3:41 AM Zhongjun Tan wrote:
>>
>> From: Zhongjun Tan
>>
>> Fix unsigned expression compared with zero
>>
>> Signed-off-by: Zhongjun Tan
>> ---
>> .../gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c | 4 ++--
>> 1
Hi Matthew,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm/drm-next
drm-exynos/exynos-drm-next drm-misc/drm-misc-next linus/master v5.19-rc5
next-20220707]
[If your patch is applied
While looping around each engine and testing for corrupted solen memory
during engine reset, the old requests from the previous engine can still
be yet to retire.
To prevent false positive corruption tests, wait for the outstanding
requests at the end of the test
Signed-off-by: Robert Beckett
igt_reset_engines_stolen tries to reset engines without checking if it
is possible.
Engines using GuC submission are not able to be reset from the host.
In this scenario, the reset exits early, then on the next iteration of
the each engine loop, the async teardown of the spinner request
context's
refactor stolen memory region to use ttm.
this necessitates using ttm resources to track reserved stolen regions
instead of drm_mm_nodes.
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/display/intel_fbc.c | 78 ++--
.../gpu/drm/i915/gem/i915_gem_object_types.h | 2 -
prepare for ttm based stolen region by using ttm range manager
as the resource manager for stolen region.
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 6 ++--
drivers/gpu/drm/i915/intel_region_ttm.c | 31
During testing make can_mmap consider whether the region is private.
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
ttm managed buffers start off with system resource definitions and ttm_tt
tracking structures allocated (though unpopulated).
currently this prevents clearing of buffers on first move to desired
placements.
The desired behaviour is to clear user allocated buffers and any kernel
buffers that
For situations where allocations need to fail on alloc instead of
delayed get_pages, add a new alloc flag to pin the ttm bo.
This makes sure that the resource has been allocated during buffer
creation, allowing it to fail with an error if the placement is
exhausted.
This allows existing fallback
Various places within the driver override the default chosen cache_level.
Before ttm, these overrides were permanent until explicitly changed again
or for the lifetime of the buffer.
TTM movement code came along and decided that it could make that
decision at that time, which is usually well
Stolen regions are not page backed or considered iomem.
Prevent flags indicating such.
This correctly prevents stolen buffers from attempting to directly map
them.
See i915_gem_object_has_struct_page() and i915_gem_object_has_iomem()
usage for where it would break otherwise.
Signed-off-by:
i965G[M] cannot relocate objects above 4GiB.
Ensure ttm uses dma32 on these systems.
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/intel_region_ttm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
By default i915_ttm_cache_level() decides I915_CACHE_LLC if HAS_SNOOP.
This is divergent from existing backends code which only considers
HAS_LLC.
Testing shows that trusting snooping on gen5- is unreliable and bsw via
ggtt mappings, so limit DGFX for now and maintain previous behaviour.
This series refactors i915's stolen memory region to use ttm.
v2: handle disabled stolen similar to legacy version.
relying on ttm to fail allocs works fine, but is dmesg noisy and causes
testing
dmesg warning regressions.
v3: rebase to latest drm-tip.
fix v2
As the enum dm_sw_gfx7_2d_thin_gl and dm_sw_gfx7_2d_thin_l_vp are not
used on the codebase, this commit drops those entries from enum
dm_swizzle_mode.
Signed-off-by: Maíra Canal
---
.../dc/dml/dcn20/display_mode_vba_20.c| 26 +-
.../dc/dml/dcn20/display_mode_vba_20v2.c
Reviewed-by: Lyude Paul
Will push to the appropriate branch in a moment
On Tue, 2022-07-05 at 21:25 +0800, Jianglei Nie wrote:
> nouveau_bo_init() is backed by ttm_bo_init() and ferries its return code
> back to the caller. On failures, ttm will call nouveau_bo_del_ttm() and
> free the
Hi,
> It seems we are duplicating a lot of code from i915_execbuffer.c. Did
> you consider
yeah... while reading the code I was thinking the same then I see
that you made the same comment. Perhaps we need to group
commonalities and make common library for execbuf 2 and 3.
Andi
On Thu, Jul 07, 2022 at 04:22:10PM -0300, Jason Gunthorpe wrote:
> On Thu, Jul 07, 2022 at 10:12:41AM -0700, Nicolin Chen wrote:
> > On Thu, Jul 07, 2022 at 08:42:28AM +, Tian, Kevin wrote:
> > > External email: Use caution opening links or attachments
> > >
> > >
> > > > From: Nicolin Chen
On Thu, Jul 07, 2022 at 10:12:41AM -0700, Nicolin Chen wrote:
> On Thu, Jul 07, 2022 at 08:42:28AM +, Tian, Kevin wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > > From: Nicolin Chen
> > > Sent: Wednesday, July 6, 2022 2:28 PM
> > >
> > > There's only one
The intention is to test hmm device coherent type under different get
user pages paths. Also, test gup with FOLL_LONGTERM flag set in
device coherent pages. These pages should get migrated back to system
memory.
Signed-off-by: Alex Sierra
Reviewed-by: Alistair Popple
---
Add two more parameters to set spm_addr_dev0 & spm_addr_dev1
addresses. These two parameters configure the start SP
addresses for each device in test_hmm driver.
Consequently, this configures zone device type as coherent.
Signed-off-by: Alex Sierra
Acked-by: Felix Kuehling
Reviewed-by: Alistair
The objective is to test device migration mechanism in pages marked
as COW, for private and coherent device type. In case of writing to
COW private page(s), a page fault will migrate pages back to system
memory first. Then, these pages will be duplicated. In case of COW
device coherent type, pages
new ioctl cmd added to query zone device type. This will be
used once the test_hmm adds zone device coherent type.
Signed-off-by: Alex Sierra
Acked-by: Felix Kuehling
Reviewed-by: Alistair Poppple
Signed-off-by: Christoph Hellwig
---
lib/test_hmm.c | 11 +--
lib/test_hmm_uapi.h
Test cases such as migrate_fault and migrate_multiple, were modified to
explicit migrate from device to sys memory without the need of page
faults, when using device coherent type.
Snapshot test case updated to read memory device type first and based
on that, get the proper returned results
Device Coherent type uses device memory that is coherently accesible by
the CPU. This could be shown as SP (special purpose) memory range
at the BIOS-e820 memory enumeration. If no SP memory is supported in
system, this could be faked by setting CONFIG_EFI_FAKE_MEMMAP.
Currently, test_hmm only
When CPU is connected throug XGMI, it has coherent
access to VRAM resource. In this case that resource
is taken from a table in the device gmc aperture base.
This resource is used along with the device type, which could
be DEVICE_PRIVATE or DEVICE_COHERENT to create the device
page map region.
In order to configure device coherent in test_hmm, two module parameters
should be passed, which correspond to the SP start address of each
device (2) spm_addr_dev0 & spm_addr_dev1. If no parameters are passed,
private device type is configured.
Signed-off-by: Alex Sierra
Acked-by: Felix
is_pinnable_page() and folio_is_pinnable() were renamed to
is_longterm_pinnable_page() and folio_is_longterm_pinnable()
respectively. These functions are used in the FOLL_LONGTERM flag
context.
Signed-off-by: Alex Sierra
---
include/linux/mm.h | 8
mm/gup.c | 4 ++--
With DEVICE_COHERENT, we'll soon have vm_normal_pages() return
device-managed anonymous pages that are not LRU pages. Although they
behave like normal pages for purposes of mapping in CPU page, and for
COW. They do not support LRU lists, NUMA migration or THP.
Callers to follow_page() currently
From: Alistair Popple
Currently any attempts to pin a device coherent page will fail. This is
because device coherent pages need to be managed by a device driver, and
pinning them would prevent a driver from migrating them off the device.
However this is no reason to fail pinning of these
From: Alistair Popple
migrate_vma_setup() checks that a valid vma is passed so that the page
tables can be walked to find the pfns associated with a given address
range. However in some cases the pfns are already known, such as when
migrating device coherent pages during pin_user_pages() meaning
[WHY]
Have a cleaner way to expose all page zone helpers in one header
file, rather than split them between mm.h and memremap.h files.
Signed-off-by: Alex Sierra
---
drivers/infiniband/core/rw.c | 1 -
drivers/nvme/target/io-cmd-bdev.c | 1 -
include/linux/memremap.h | 113
This case is used to migrate pages from device memory, back to system
memory. Device coherent type memory is cache coherent from device and CPU
point of view.
Signed-off-by: Alex Sierra
Acked-by: Felix Kuehling
Reviewed-by: Alistair Poppple
Signed-off-by: Christoph Hellwig
Reviewed-by: David
This is our MEMORY_DEVICE_COHERENT patch series rebased and updated
for current 5.19.0-rc5
Changes since the last version:
- Fixed problems with migration during long-term pinning in
get_user_pages
- Open coded vm_normal_lru_pages as suggested in previous code review
- Update hmm_gup_test with
Device memory that is cache coherent from device and CPU point of view.
This is used on platforms that have an advanced system bus (like CAPI
or CXL). Any page of a process can be migrated to such memory. However,
no one should be allowed to pin such memory so that it can always be
evicted.
On 22. 7. 4. 21:07, Viresh Kumar wrote:
> Make dev_pm_opp_set_regulators() accept a NULL terminated list of names
> instead of making the callers keep the two parameters in sync, which
> creates an opportunity for bugs to get in.
>
> Suggested-by: Greg Kroah-Hartman
> Signed-off-by: Viresh Kumar
On Wed, Jul 6, 2022 at 3:41 AM Zhongjun Tan wrote:
>
> From: Zhongjun Tan
>
> Fix unsigned expression compared with zero
>
> Signed-off-by: Zhongjun Tan
> ---
> .../gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff
Applied. Thanks!
Alex
On Wed, Jul 6, 2022 at 9:38 PM Yang Li wrote:
>
> Eliminate the follow smatch warnings:
> drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser2.c:405
> get_bios_object_from_path_v3() warn: inconsistent indenting
>
The field paddr of struct drm_gem_dma_object holds a DMA address, which
might actually be a physical address. However, depending on the platform,
it can also be a bus address or a virtual address managed by an IOMMU.
Hence, rename the field to dma_addr, which is more applicable.
In order to do
Rename "FB CMA" helpers to "FB DMA" helpers - considering the hierarchy
of APIs (mm/cma -> dma -> fb dma) calling them "FB DMA" seems to be
more applicable.
Besides that, commit e57924d4ae80 ("drm/doc: Task to rename CMA helpers")
requests to rename the CMA helpers and implies that people seem to
Both, GEM and FB, CMA helpers were renamed to "GEM DMA" and "FB DMA",
hence the task can be removed.
Acked-by: Thomas Zimmermann
Reviewed-by: Laurent Pinchart
Signed-off-by: Danilo Krummrich
---
Documentation/gpu/todo.rst | 13 -
1 file changed, 13 deletions(-)
diff --git
This patch series renames all CMA helpers to DMA helpers - considering the
hierarchy of APIs (mm/cma -> dma -> gem/fb dma helpers) calling them DMA
helpers seems to be more applicable.
Additionally, commit e57924d4ae80 ("drm/doc: Task to rename CMA helpers")
requests to rename the CMA helpers and
Conditional registration is a problem for other subsystems which may
unwittingly try to interact with host1x_context_device_bus_type in an
uninitialised state on non-Tegra platforms. A look under /sys/bus on a
typical system already reveals plenty of entries from enabled but
otherwise irrelevant
Hi "Christian,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Christian-K-nig/drm-ttm-rename-and-cleanup-ttm_bo_init_reserved/20220707-192538
base: git://anongit.freedesktop.org/drm/dr
On Thu, Jul 07, 2022 at 08:42:28AM +, Tian, Kevin wrote:
> External email: Use caution opening links or attachments
>
>
> > From: Nicolin Chen
> > Sent: Wednesday, July 6, 2022 2:28 PM
> >
> > There's only one caller that checks its return value with a WARN_ON_ONCE,
> > while all other
On Thu, Jul 7, 2022 at 9:11 AM Akhil P Oommen wrote:
>
> There are some hardware logic under CX domain. For a successful
> recovery, we should ensure cx headswitch collapses to ensure all the
> stale states are cleard out. This is especially true to for a6xx family
> where we can GMU
If we encounter some monster sized local-memory page that exceeds the
maximum sg length (UINT32_MAX), ensure that don't end up with some
misaligned address in the entry that follows, leading to fireworks
later. Also ensure we have some coverage of this in the selftests.
Fixes: f701b16d4cc5
On Thu, Jul 07, 2022 at 08:46:12AM +, Tian, Kevin wrote:
> External email: Use caution opening links or attachments
>
>
> > From: Nicolin Chen
> > Sent: Wednesday, July 6, 2022 2:28 PM
> > /*
> > - * Pin a set of guest PFNs and return their associated host PFNs for local
> > + * Pin
On Thu, Jul 07, 2022 at 08:49:28AM +, Tian, Kevin wrote:
> External email: Use caution opening links or attachments
>
>
> > From: Nicolin Chen
> > Sent: Wednesday, July 6, 2022 2:28 PM
> >
> > Most of the callers of vfio_pin_pages() want "struct page *" and the
> > low-level mm code to pin
On 7/7/2022 9:20 AM, Rob Clark wrote:
From: Rob Clark
We need to grab the lock after the early return for !hwpipe case.
Otherwise, we could have hit contention yet still returned 0.
Fixes an issue that the new CONFIG_DRM_DEBUG_MODESET_LOCK stuff flagged
in CI:
WARNING: CPU: 0 PID: 282
refactor stolen memory region to use ttm.
this necessitates using ttm resources to track reserved stolen regions
instead of drm_mm_nodes.
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/display/intel_fbc.c | 78 ++--
.../gpu/drm/i915/gem/i915_gem_object_types.h | 2 -
igt_reset_engines_stolen tries to reset engines without checking if it
is possible.
Engines using GuC submission are not able to be reset from the host.
In this scenario, the reset exits early, then on the next iteration of
the each engine loop, the async teardown of the spinner request
context's
While looping around each engine and testing for corrupted solen memory
during engine reset, the old requests from the previous engine can still
be yet to retire.
To prevent false positive corruption tests, wait for the outstanding
requests at the end of the test
Signed-off-by: Robert Beckett
For situations where allocations need to fail on alloc instead of
delayed get_pages, add a new alloc flag to pin the ttm bo.
This makes sure that the resource has been allocated during buffer
creation, allowing it to fail with an error if the placement is
exhausted.
This allows existing fallback
ttm managed buffers start off with system resource definitions and ttm_tt
tracking structures allocated (though unpopulated).
currently this prevents clearing of buffers on first move to desired
placements.
The desired behaviour is to clear user allocated buffers and any kernel
buffers that
prepare for ttm based stolen region by using ttm range manager
as the resource manager for stolen region.
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 6 ++--
drivers/gpu/drm/i915/intel_region_ttm.c | 31
By default i915_ttm_cache_level() decides I915_CACHE_LLC if HAS_SNOOP.
This is divergent from existing backends code which only considers
HAS_LLC.
Testing shows that trusting snooping on gen5- is unreliable and bsw via
ggtt mappings, so limit DGFX for now and maintain previous behaviour.
Stolen regions are not page backed or considered iomem.
Prevent flags indicating such.
This correctly prevents stolen buffers from attempting to directly map
them.
See i915_gem_object_has_struct_page() and i915_gem_object_has_iomem()
usage for where it would break otherwise.
Signed-off-by:
During testing make can_mmap consider whether the region is private.
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
Various places within the driver override the default chosen cache_level.
Before ttm, these overrides were permanent until explicitly changed again
or for the lifetime of the buffer.
TTM movement code came along and decided that it could make that
decision at that time, which is usually well
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