time_after() deals with timer wrapping correctly.
Signed-off-by: Yu Zhe
---
drivers/gpu/drm/radeon/radeon_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c
b/drivers/gpu/drm/radeon/radeon_pm.c
index e765abcb3b01..04c693ca419a 100644
---
On 27 6月 22 16:54:04, Cai Huoqing wrote:
> Remove the param "struct drm_buddy *mm" which is unused in
> the function drm_block_alloc()/drm_block_free().
Just ping this patch
>
> Signed-off-by: Cai Huoqing
> ---
> drivers/gpu/drm/drm_buddy.c | 25 +++--
> 1 file changed, 11
From: Fudong Wang
[ Upstream commit b2a93490201300a749ad261b5c5d05cb50179c44 ]
[Why]
After ODM clock off, optc underflow bit will be kept there always and clear not
work.
We need to clear that before clock off.
[How]
Clear that if have when clock off.
Reviewed-by: Alvin Lee
Acked-by: Tom
From: Fudong Wang
[ Upstream commit b2a93490201300a749ad261b5c5d05cb50179c44 ]
[Why]
After ODM clock off, optc underflow bit will be kept there always and clear not
work.
We need to clear that before clock off.
[How]
Clear that if have when clock off.
Reviewed-by: Alvin Lee
Acked-by: Tom
From: Ilya Bakoulin
[ Upstream commit 04fb918bf421b299feaee1006e82921d7d381f18 ]
[Why]
Some pixel clock values could cause HDMI TMDS SSCPs to be misaligned
between different HDMI lanes when using YCbCr420 10-bit pixel format.
BIOS functions for transmitter/encoder control take pixel clock in
From: Josip Pavic
[ Upstream commit 8de297dc046c180651c0500f8611663ae1c3828a ]
[why]
In some cases MPC tree bottom pipe ends up point to itself. This causes
iterating from top to bottom to hang the system in an infinite loop.
[how]
When looping to next MPC bottom pipe, check that the pointer
From: Josip Pavic
[ Upstream commit 8de297dc046c180651c0500f8611663ae1c3828a ]
[why]
In some cases MPC tree bottom pipe ends up point to itself. This causes
iterating from top to bottom to hang the system in an infinite loop.
[how]
When looping to next MPC bottom pipe, check that the pointer
From: Dusica Milinkovic
[ Upstream commit 373008bfc9cdb0f050258947fa5a095f0657e1bc ]
[Why]
During multi-vf executing benchmark (Luxmark) observed kiq error timeout.
It happenes because all of VFs do the tlb invalidation at the same time.
Although each VF has the invalidate register set, from
From: Evan Quan
[ Upstream commit 0a2d922a5618377cdf8fa476351362733ef55342 ]
To avoid any potential memory leak.
Signed-off-by: Evan Quan
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 1 +
1
From: Dusica Milinkovic
[ Upstream commit 373008bfc9cdb0f050258947fa5a095f0657e1bc ]
[Why]
During multi-vf executing benchmark (Luxmark) observed kiq error timeout.
It happenes because all of VFs do the tlb invalidation at the same time.
Although each VF has the invalidate register set, from
From: Ilya Bakoulin
[ Upstream commit 04fb918bf421b299feaee1006e82921d7d381f18 ]
[Why]
Some pixel clock values could cause HDMI TMDS SSCPs to be misaligned
between different HDMI lanes when using YCbCr420 10-bit pixel format.
BIOS functions for transmitter/encoder control take pixel clock in
From: Fudong Wang
[ Upstream commit b2a93490201300a749ad261b5c5d05cb50179c44 ]
[Why]
After ODM clock off, optc underflow bit will be kept there always and clear not
work.
We need to clear that before clock off.
[How]
Clear that if have when clock off.
Reviewed-by: Alvin Lee
Acked-by: Tom
From: Alvin Lee
[ Upstream commit 84ef99c728079dfd21d6bc70b4c3e4af20602b3c ]
[Description]
Observed in stereomode that programming FLIP_LEFT_EYE
can cause hangs. Keep FLIP_ANY_FRAME in stereo mode so
the surface flip can take place before left or right eye
Reviewed-by: Martin Leung
Acked-by:
From: Alvin Lee
[ Upstream commit 84ef99c728079dfd21d6bc70b4c3e4af20602b3c ]
[Description]
Observed in stereomode that programming FLIP_LEFT_EYE
can cause hangs. Keep FLIP_ANY_FRAME in stereo mode so
the surface flip can take place before left or right eye
Reviewed-by: Martin Leung
Acked-by:
From: Charlene Liu
[ Upstream commit 5544a7b5a07480192eb5fd3536462faed2c21528 ]
[why]
this is to ensure that driver will not reprogram hvm_prefetch_req again if
it is done.
Reviewed-by: Martin Leung
Acked-by: Brian Chang
Signed-off-by: Charlene Liu
Tested-by: Daniel Wheeler
Signed-off-by:
From: Evan Quan
[ Upstream commit 0a2d922a5618377cdf8fa476351362733ef55342 ]
To avoid any potential memory leak.
Signed-off-by: Evan Quan
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 1 +
1
From: Ilya Bakoulin
[ Upstream commit 04fb918bf421b299feaee1006e82921d7d381f18 ]
[Why]
Some pixel clock values could cause HDMI TMDS SSCPs to be misaligned
between different HDMI lanes when using YCbCr420 10-bit pixel format.
BIOS functions for transmitter/encoder control take pixel clock in
From: Fudong Wang
[ Upstream commit b2a93490201300a749ad261b5c5d05cb50179c44 ]
[Why]
After ODM clock off, optc underflow bit will be kept there always and clear not
work.
We need to clear that before clock off.
[How]
Clear that if have when clock off.
Reviewed-by: Alvin Lee
Acked-by: Tom
From: Leo Ma
[ Upstream commit 0591183699fceeafb4c4141072d47775de83ecfb ]
[Why]
Reported from customer the checksum in AMD VSIF V3 is incorrect and
causing blank screen issue.
[How]
Fix the packet length issue on AMD HDMI VSIF V3.
Reviewed-by: Anthony Koo
Acked-by: Tom Chung
Signed-off-by:
From: Josip Pavic
[ Upstream commit 8de297dc046c180651c0500f8611663ae1c3828a ]
[why]
In some cases MPC tree bottom pipe ends up point to itself. This causes
iterating from top to bottom to hang the system in an infinite loop.
[how]
When looping to next MPC bottom pipe, check that the pointer
From: Harish Kasiviswanathan
[ Upstream commit 1af9add1f1512b10d9ce44ec7137612bc81ff069 ]
Was missing. Add it.
Signed-off-by: Harish Kasiviswanathan
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/ih_v6_0.c | 1 +
1 file
From: Evan Quan
[ Upstream commit 4bac1c846eff8042dd59ddecd0a43f3b9de5fd23 ]
Without these, potential memory leak may be induced.
Signed-off-by: Evan Quan
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
From: Tom Chung
[ Upstream commit e98459c06e3d45c2229b097f7b8cdd412357fa2f ]
[Why]
Pipes for MPO primary and overlay will be power down and power up during
plug/unplug external monitor while MPO video playback.
But the pipes were the same after plug/unplug and should not need to be
power down
From: Mukul Joshi
[ Upstream commit de8341ee3ce7316883e836a2c4e9bf01ab651e0f ]
There are no backing hardware registers for ih_soft ring.
As a result, don't try to access hardware registers for read
and write pointers when processing interrupts on the IH soft
ring.
Signed-off-by: Mukul Joshi
From: Dusica Milinkovic
[ Upstream commit 373008bfc9cdb0f050258947fa5a095f0657e1bc ]
[Why]
During multi-vf executing benchmark (Luxmark) observed kiq error timeout.
It happenes because all of VFs do the tlb invalidation at the same time.
Although each VF has the invalidate register set, from
From: Ilya Bakoulin
[ Upstream commit 04fb918bf421b299feaee1006e82921d7d381f18 ]
[Why]
Some pixel clock values could cause HDMI TMDS SSCPs to be misaligned
between different HDMI lanes when using YCbCr420 10-bit pixel format.
BIOS functions for transmitter/encoder control take pixel clock in
From: Charlene Liu
[ Upstream commit 5544a7b5a07480192eb5fd3536462faed2c21528 ]
[why]
this is to ensure that driver will not reprogram hvm_prefetch_req again if
it is done.
Reviewed-by: Martin Leung
Acked-by: Brian Chang
Signed-off-by: Charlene Liu
Tested-by: Daniel Wheeler
Signed-off-by:
From: Shane Xiao
[ Upstream commit e42dfa66d59240afbdd8d4b47b87486db39504aa ]
Add secure display TA load for Renoir
Signed-off-by: Shane Xiao
Reviewed-by: Aaron Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c | 10 ++
1 file
From: Zhen Ni
[ Upstream commit 5afb76522a0af0513b6dc01f84128a73206b051b ]
Memory is allocated for gpu_metrics_table in
smu_v13_0_4_init_smc_tables(), but not freed in
smu_v13_0_4_fini_smc_tables(). This may cause memory leaks, fix it.
Reviewed-by: Evan Quan
Signed-off-by: Zhen Ni
From: Evan Quan
[ Upstream commit 0a2d922a5618377cdf8fa476351362733ef55342 ]
To avoid any potential memory leak.
Signed-off-by: Evan Quan
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 1 +
1
From: Evan Quan
[ Upstream commit 1b586595df6d04c27088ef348b8202204ce26d45 ]
Some stability issues were reported with these features.
Signed-off-by: Evan Quan
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 2 ++
1
From: Fudong Wang
[ Upstream commit b2a93490201300a749ad261b5c5d05cb50179c44 ]
[Why]
After ODM clock off, optc underflow bit will be kept there always and clear not
work.
We need to clear that before clock off.
[How]
Clear that if have when clock off.
Reviewed-by: Alvin Lee
Acked-by: Tom
From: Kenneth Feng
[ Upstream commit 4e64b529c5b04e7944b41de554ee686ecab00744 ]
skip pptable override for smu_v13_0_7 secure boards only.
Signed-off-by: Kenneth Feng
Reviewed-by: Feifei Xu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
From: Josip Pavic
[ Upstream commit 8de297dc046c180651c0500f8611663ae1c3828a ]
[why]
In some cases MPC tree bottom pipe ends up point to itself. This causes
iterating from top to bottom to hang the system in an infinite loop.
[how]
When looping to next MPC bottom pipe, check that the pointer
From: Felix Kuehling
[ Upstream commit bea9a56afbc4b5a41ea579b8b0dc5e189b439504 ]
When kfd_ioctl_wait_events needs to restart due to a signal, we need to
update the timeout to account for the time already elapsed. We also need
to undo auto_reset of events that have signaled already, so that the
From: Meenakshikumar Somasundaram
[ Upstream commit 30456ffa65469d1d2e5e1da05017e6728d24c11c ]
[Why]
After TDR recovery, eDP and USB4 display does not light up. Because
dmub outbox notifications are not enabled after dmub reload and link
encoder assignments for the streams are not cleared
From: Leo Ma
[ Upstream commit 0591183699fceeafb4c4141072d47775de83ecfb ]
[Why]
Reported from customer the checksum in AMD VSIF V3 is incorrect and
causing blank screen issue.
[How]
Fix the packet length issue on AMD HDMI VSIF V3.
Reviewed-by: Anthony Koo
Acked-by: Tom Chung
Signed-off-by:
From: Chiawen Huang
[ Upstream commit 9c580e8f6cd6524d4e2c3490c440110526f7ddd6 ]
[Why]
Enabling stream with tg lock makes config settings
pending causing the garbage until tg unlock.
[How]
Keep the original lock mechanism
The driver doesn't lock tg if plane_state is null.
Reviewed-by: Anthony
From: Alvin Lee
[ Upstream commit 84ef99c728079dfd21d6bc70b4c3e4af20602b3c ]
[Description]
Observed in stereomode that programming FLIP_LEFT_EYE
can cause hangs. Keep FLIP_ANY_FRAME in stereo mode so
the surface flip can take place before left or right eye
Reviewed-by: Martin Leung
Acked-by:
From: Aurabindo Pillai
[ Upstream commit 37bc31f0e7da4fbad4664e64d906ae7b9009e550 ]
[Why]
Add the missing definition to set the register field
HBLANK_MINIMUM_SYMBOL_WIDTH
Signed-off-by: Aurabindo Pillai
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
Hi,
On Wed, Aug 24, 2022 at 1:16 PM Kuogee Hsieh wrote:
>
> At current implementation there is an extra 0 at 1.62G link rate which cause
> no correct pixel_div selected for 1.62G link rate to calculate mvid and nvid.
> This patch delete the extra 0 to have mvid and nvid be calculated correctly.
On Fri, Aug 19, 2022 at 5:13 PM Maíra Canal wrote:
>
> Hi Mikhail,
>
> Could you please specify the steps to reproduce this use-after-free? I
> will try to reproduce it on the RX5700 XT and bisect the issue.
>
Hi Maíra, thanks for help.
I'm afraid that it will be unrealistic to reproduce,
Hi,
I've found a few potential issues left after the hotplug rework.
In vc4_hdmi.c we're missing two mutex_unlock() calls when the device is
unplugged.
vc4_crtc and vc4_plane seem to miss some drm_dev_enter()/drm_dev_exit() calls
to protect against resource access after the device/driver is
On Wed, Aug 24, 2022 at 09:59:21AM +0800, xinlei.lee wrote:
> On Tue, 2022-08-23 at 16:16 -0400, Nícolas F. R. A. Prado wrote:
> > On Tue, Aug 23, 2022 at 02:18:37PM +0800, xinlei@mediatek.com
> > wrote:
> > > From: Xinlei Lee
> > >
> > > Dpi output needs to adjust the output format to dual
amdgpu_dm_commit_planes already sets the flip_immediate flag for
async page-flips. This flag is used to set the UNP_FLIP_CONTROL
register. Thus, no additional change is required to handle async
page-flips with the atomic uAPI.
Note, async page-flips are still unsupported on DCE with the atomic
If the driver supports it, allow user-space to supply the
DRM_MODE_PAGE_FLIP_ASYNC flag to request an async page-flip.
Set drm_crtc_state.async_flip accordingly.
Signed-off-by: Simon Ser
Cc: Daniel Vetter
Cc: Joshua Ashton
Cc: Melissa Wen
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Nicholas
Am 24.08.22 um 16:47 schrieb Jason Ekstrand:
On Mon, Aug 8, 2022 at 11:39 AM Jason Ekstrand
wrote:
On Sun, 2022-08-07 at 18:35 +0200, Christian König wrote:
> Am 02.08.22 um 23:01 schrieb Jason Ekstrand:
> > Ever since 68129f431faa ("dma-buf: warn about containers in
> >
This should work, but I'm really wondering if this makes a difference
for somebody.
Anyway the approach is fine with me: Acked-by: Christian König
Regards,
Christian.
Am 24.08.22 um 12:22 schrieb Dmitry Osipenko:
Move dma_buf_mmap_unlocked() function to the dynamic locking specification
On Wed, 24 Aug 2022, Hans de Goede wrote:
> Before this commit when we want userspace to use the acpi_video backlight
> device we register both the GPU's native backlight device and acpi_video's
> firmware acpi_video# backlight device. This relies on userspace preferring
> firmware type backlight
On Wed, 24 Aug 2022, Hans de Goede wrote:
> On machins without an i915 opregion the acpi_video driver immediately
> probes the ACPI video bus and used to also immediately register
> acpi_video# backlight devices when supported.
>
> Once the drm/kms driver then loaded later and possibly registered
Remove this check from the asus-wmi backlight handling:
/* Some Asus desktop boards export an acpi-video backlight interface,
stop this from showing up */
chassis_type = dmi_get_system_info(DMI_CHASSIS_TYPE);
if (chassis_type && !strcmp(chassis_type, "3"))
On 18.08.2022 16:41, Radhakrishna Sripada wrote:
> From: José Roberto de Souza
>
> The GMD step field do not properly match the current stepping convention
> that we use(STEP_A0, STEP_A1, STEP_B0...).
>
> One platform could have { arch = 12, rel = 70, step = 1 } and the
> actual stepping is
Jadard JD9365DA-H3 is WUXGA MIPI DSI panel and it support TFT
dot matrix LCD with 800RGBx1280 dots at maximum.
Document it.
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Jagan Teki
---
.../display/panel/jadard,jd9365da-h3.yaml | 70 +++
MAINTAINERS
Please fix the subject line .
It should be drm/msm/dpu: fix repeated words in comments
Also, you can add
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
On 8/23/2022 4:51 AM, Jilin Yuan wrote:
Delete the redundant word 'is'.
Signed-off-by: Jilin Yuan
---
Delete the redundant word 'the'.
Signed-off-by: wangjianli
---
drivers/gpu/drm/i915/gvt/gtt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index b4f69364f9a1..62e5f27adca9 100644
---
Delete the redundant word 'the'.
Signed-off-by: wangjianli
---
drivers/gpu/drm/drm_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index c40bde96cfdf..fd2790a5664d 100644
---
Delete the redundant word 'the'.
Signed-off-by: wangjianli
---
drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c
b/drivers/gpu/drm/display/drm_dp_helper.c
index e7c22c2ca90c..499f75768523 100644
Delete the redundant word 'other'.
Delete the redundant word 'the'.
Delete the redundant word 'will'.
Signed-off-by: Jilin Yuan
---
drivers/gpu/drm/i915/i915_gem_evict.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 4 ++--
drivers/gpu/drm/i915/i915_memcpy.h| 2 +-
3 files changed, 4
Delete the redundant word 'old'.
Delete the redundant word 'new'.
Signed-off-by: Jilin Yuan
---
drivers/gpu/drm/drm_context.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_context.c b/drivers/gpu/drm/drm_context.c
index
We need to set also src_x, src_y, src_w and src_h for the mock plane.
After fix for drm_atomic_helper_damage_iter_init we are using these
when iterating damage_clips.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/tests/drm_damage_helper_test.c | 5 +
1 file changed, 5 insertions(+)
On 19/08/2022 19:40, Akhil P Oommen wrote:
> Documentation/devicetree/bindings/display/msm/gpu.yaml | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml
> b/Documentation/devicetree/bindings/display/msm/gpu.yaml
> index
From: Chris Wilson
Having addressed the issues surrounding incorrect types for local
variables and potential integer truncation in using the scatterlist API,
we have closed all the loop holes we had previously identified with
dangerously large object creation. As such, we can eliminate the
reg-io-width is a standard property, so no need for defining its type
with $ref.
Signed-off-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml | 1 -
1 file changed, 1 deletion(-)
diff --git
On 22/08/2022 12:19, zheng-yan.chen wrote:
> mt8195 uses 10bit-to-12bit gamma-LUT, which is different from
> current 9bit-to-10bit gamma-LUT, so this patch add its own compatible
> for mt8195.
I am not sure if this explains the need for change. Is mt8195 still
compatible with mt8183 or not? Your
"Michael Kelley (LINUX)" writes:
> From: Vitaly Kuznetsov Sent: Thursday, August 18, 2022
> 7:25 AM
>>
>> When drm_aperture_remove_conflicting_pci_framebuffers() fails, 'pdev'
>> needs to be released with pci_dev_put().
>>
>> Fixes: 76c56a5affeb ("drm/hyperv: Add DRM driver for hyperv
This patch fix potential memory leak (clk_src) when function run
into last return NULL.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
This patch fix cocci warning:
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c:1816:6-8:
WARNING: possible condition with no effect (if == else).
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c | 2 --
1 file changed, 2 deletions(-)
diff --git
Hi Tomi,
I love your patch! Perhaps something to improve:
[auto build test WARNING on pinchartl-media/drm/du/next]
[also build test WARNING on linus/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented
This reverts commit 211f276ed3d96e964d2d1106a198c7f4a4b3f4c0.
For quite some time, core DRM helpers already ensure that any relevant
connectors/CRTCs/etc. are disabled, as well as their associated
components (e.g., bridges) when suspending the system. Thus,
analogix_dp_bridge_{enable,disable}()
On 10/08/2022 06:50, Bjorn Andersson wrote:
The SC8280XP platform has four DisplayPort controllers, per MDSS
instance, all with widebus support.
The first two are defined to be DisplayPort only, while the latter pair
(of each instance) can be either DisplayPort or Embedded DisplayPort.
The two
On 24/07/2022 23:42, Jason Wang wrote:
The double `be' is duplicated in the comment, remove one.
Signed-off-by: Jason Wang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi,
On Thu, Aug 18, 2022 at 8:03 AM Doug Anderson wrote:
>
> Hi,
>
> On Wed, Aug 17, 2022 at 8:22 PM Hsin-Yi Wang wrote:
> >
> > On Thu, Aug 18, 2022 at 11:19 AM Rock Chiu
> > wrote:
> > >
> > > How does T4/T5 impact the real case? We talked previously the T4/T5
> > > shouldn't cause user
From: Tomi Valkeinen
The rcar crtc depends on the clock provided from the rcar DSI bridge.
When the DSI bridge is disabled, the clock is stopped, which causes the
crtc disable to timeout.
Also, while I have no issue with the enable, the documentation suggests
to enable the DSI before the crtc
Am 22.08.22 um 10:34 schrieb Bas Nieuwenhuizen:
On Mon, Aug 22, 2022 at 9:28 AM Dave Airlie wrote:
On Mon, 22 Aug 2022 at 17:05, Dave Airlie wrote:
Hey,
I've just been looking at the vm bind type interfaces and wanted to at
least document how we think the unmapping API should work. I know
Hello Marek,
Am Freitag, 19. August 2022, 16:08:51 CEST schrieb Marek Vasut:
> Update debug print to report bridge timings over connector ones.
> Drop missed comment commit from mxsfb.
>
> Acked-by: Sam Ravnborg
> Reviewed-by: Liu Ying
> Reported-by: Liu Ying
> Tested-by: Martyn Welch
>
On Sun, Aug 21, 2022 at 7:43 PM Karol Herbst wrote:
>
> On Sun, Aug 21, 2022 at 5:46 PM Rob Clark wrote:
> >
> > On Sat, Aug 20, 2022 at 5:23 AM Karol Herbst wrote:
> > >
> > > Hey everybody,
> > >
> > > so I think it's time to have this discussion for real.
> > >
> > > I am working on Rusticl
From: Hamza Mahfooz
> Sent: 18 August 2022 17:49
>
> Addresses the following warning:
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3596:6:
> error: stack frame
> size (2092) exceeds limit (2048) in
> 'dml30_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-
>
(Hardware) resources which are bound to the driver and device lifecycle
must not be accessed after the device and driver are unbound.
However, the DRM device isn't freed as long as the last user didn't
close it, hence userspace can still call into the driver.
Therefore protect the critical
Use drm managed resource allocation (drmm_universal_plane_alloc()) in
order to get rid of the explicit destroy hook in struct drm_plane_funcs.
Signed-off-by: Danilo Krummrich
---
drivers/gpu/drm/arm/malidp_planes.c | 28 +++-
1 file changed, 7 insertions(+), 21
Le vendredi 19 août 2022 à 23:44 +0800, Hsia-Jun Li a écrit :
>
> On 8/19/22 23:28, Nicolas Dufresne wrote:
> > CAUTION: Email originated externally, do not click links or open
> > attachments unless you recognize the sender and know the content is safe.
> >
> >
> > Le vendredi 19 août 2022 à
Le jeudi 18 août 2022 à 14:33 +0800, Hsia-Jun Li a écrit :
>
> On 8/18/22 14:06, Tomasz Figa wrote:
> > CAUTION: Email originated externally, do not click links or open
> > attachments unless you recognize the sender and know the content is safe.
> >
> >
> > Hi Randy,
> >
> > On Tue, Aug 9,
On Fri, Jul 22, 2022 at 1:27 AM AngeloGioacchino Del Regno
wrote:
>
> Add callbacks for atomic_destroy_state, atomic_duplicate_state and
> atomic_reset to restore functionality of the DSI driver: this solves
> vblank timeouts when another bridge is present in the chain.
>
> Tested bridge chain:
On Thu, Aug 18, 2022 at 03:37:01PM +0200, Christian König wrote:
> Am 18.08.22 um 15:16 schrieb Jason Gunthorpe:
> > On Thu, Aug 18, 2022 at 02:58:10PM +0200, Christian König wrote:
> >
> > > > > The only thing I'm not 100% convinced of is dma_buf_try_get(), I've
> > > > > seen
> > > > > this
Hi Jouni,
On 7/15/22 10:49, Jouni Högander wrote:
> drm_plane_state->src might be modified by the driver. This is done
> e.g. in i915 driver when there is bigger framebuffer than the plane
> and there is some offset within framebuffer. I915 driver calculates
> separate offset and adjusts src rect
(Hardware) resources which are bound to the driver and device lifecycle
must not be accessed after the device and driver are unbound.
However, the DRM device isn't freed as long as the last user closed it,
hence userspace can still call into the driver.
Therefore protect the critical sections
>From Meteorlake, Latency Level, SAGV bloack time are read from
LATENCY_SAGV register instead of the GT driver pcode mailbox. DDR type
and QGV information are also to be read from Mem SS registers.
v2:
- Simplify MTL_MEM_SS_INFO_QGV_POINT macro(MattR)
- Nit: Rearrange the bit def's from higher
From: Imre Deak
Add the proper VBT port,AUX_CH -> i915 port,AUX_CH mapping which just
follows the ADL_P one.
Reviewed-by: Matt Roper
Signed-off-by: Imre Deak
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_bios.c | 14 +++---
1 file changed, 7
The initialization sequence for Meteorlake reuses the sequence for
icelake for most parts. Some changes viz. reset PICA handshake
are added.
Bspec: 49189
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_display_power.c | 3 +++
From: Vitaly Lubart
The discrete graphics card with GSC firmware
using command streamer API hence it requires to enhance
pxp module with the new gsc_command() handler.
The handler is implemented via mei_pxp_gsc_command() which is
just just a thin wrapper around mei_cldev_send_gsc_command()
V2:
From: Vitaly Lubart
Add mei bus API for sending gsc commands: mei_cldev_send_gsc_command()
The GSC commands are originated in the graphics stack
and are in form of SGL DMA buffers.
The GSC commands are synchronous, the response is received
in the same call on the out sg list buffers.
The
From: Tomas Winkler
GSC extend header is of variable size and data
is provided in a sgl list inside the header
and not in the data buffers, need to enable the path.
Signed-off-by: Tomas Winkler
Signed-off-by: Daniele Ceraolo Spurio
Cc: Vitaly Lubart
---
drivers/misc/mei/client.c| 55
acpi_backlight=native is the default for the "Samsung X360", but as
the comment explains the quirk was still necessary because even
briefly registering the acpi_video0 backlight; and then unregistering
it once the native driver showed up, was leading to issues.
After the "ACPI: video: Make
Move the WMI interface definitions to a header, so that the definitions
can be shared with drivers/acpi/video_detect.c .
Suggested-by: Daniel Dadap
Signed-off-by: Hans de Goede
---
MAINTAINERS | 1 +
.../platform/x86/nvidia-wmi-ec-backlight.c| 66
Before this commit when we want userspace to use the acpi_video backlight
device we register both the GPU's native backlight device and acpi_video's
firmware acpi_video# backlight device. This relies on userspace preferring
firmware type backlight devices over native ones.
Registering 2 backlight
When drm_aperture_remove_conflicting_pci_framebuffers() fails, 'pdev'
needs to be released with pci_dev_put().
Fixes: 76c56a5affeb ("drm/hyperv: Add DRM driver for hyperv synthetic video
device")
Signed-off-by: Vitaly Kuznetsov
---
drivers/gpu/drm/hyperv/hyperv_drm_drv.c | 2 +-
1 file
On Fri, 12 Aug 2022 13:08:17 +0300, Matti Vaittinen wrote:
> Devm helpers for regulator get and enable
>
> First patch in the series is actually just a simple documentation fix
> which could be taken in as it is now.
>
> A few* drivers seem to use pattern demonstrated by pseudocode:
>
> [...]
Add support for the EDT ETML1010G0DKA 10.1" 1280x800 LVDS panel.
Signed-off-by: Dominik Haller
---
drivers/gpu/drm/panel/panel-simple.c | 29
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
On Wed, Aug 24, 2022 at 10:46 AM Akhil P Oommen
wrote:
>
> On 8/21/2022 11:49 PM, Rob Clark wrote:
> > From: Rob Clark
> >
> > We can rely on the tlbinv done by CP_SMMU_TABLE_UPDATE in this case.
> >
> > Signed-off-by: Rob Clark
> > ---
> > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 ++
>
On Thu, Aug 18, 2022 at 01:07:16PM +0200, Christian König wrote:
> Am 17.08.22 um 18:11 schrieb Jason Gunthorpe:
> > dma-buf has become a way to safely acquire a handle to non-struct page
> > memory that can still have lifetime controlled by the exporter. Notably
> > RDMA can now import dma-buf
Am 18.08.22 um 11:45 schrieb oushixiong:
This patch adds ast specific codes for DRM prime feature, this is to
allow for offloading of rending in one direction and outputs in other.
v1->v2:
- Fix the comment.
Signed-off-by: oushixiong
---
drivers/gpu/drm/ast/ast_drv.c | 22 ++
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