Hello Roman,
On 2023-05-09 at 13:04:50 +0200, "Roman Beranek" wrote:
> On Mon May 8, 2023 at 10:47 AM CEST, Frank Oltmanns wrote:
>> I played back a 60 fps video (10 seconds) and recorded the panel's
>> output with a 240 fps camera. I noticed only 2 dropped frames, that I
>> account to the
+Jagan who worked on a similar design and initiated the thread.
Hi Stephen,
On Sat, Apr 29, 2023 at 12:47 PM Stephen Boyd wrote:
>
> Quoting Pin-yen Lin (2023-04-20 02:10:46)
> > On Thu, Apr 20, 2023 at 2:10 PM Stephen Boyd wrote:
> > >
> > > Quoting Stephen Boyd (2023-04-13 17:22:46)
> > > >
On 5/9/23 16:35, Joshua Ashton wrote:
> FWIW, we technically do use it right now, but it is always set to 1 in
> S.31.32.
>
> Before we used shaper + 3D LUT we did use it for scaling SDR content,
> but given we always have a shaper + 3D LUT it made sense for us to
> roll that into there.
>
From: Philip Yang
For native mode only, create TTM pool for each memory partition to store
the NUMA node id, then the TTM pool will be selected using memory
partition id to allocate memory from the correct partition.
Acked-by: Christian König
(rajneesh: changed need_swiotlb and need_dma32 to
From: Rajneesh Bhardwaj
For native mode, after amdgpu_bo is created on CPU domain, then call
amdgpu_ttm_tt_set_mem_pool to select the TTM pool using bo->mem_id.
ttm_bo_validate will allocate the memory to the correct memory partition
before mapping to GPUs.
Reviewed-by: Felix Kuehling
From: Rajneesh Bhardwaj
ttm_pool_init is exported and used outside of ttm subsystem with
amdgpu_ttm interface, similarly export ttm_pool_fini for proper cleanup.
Reviewed-by: Felix Kuehling
Signed-off-by: Rajneesh Bhardwaj
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/ttm/ttm_pool.c | 1 +
hdisplay for compressed images should be calculated as bytes_per_slice *
slice_count. Thus, use MSM DSC helper to calculate hdisplay for
dsi_timing_setup instead of directly using mode->hdisplay.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi_host.c
From: Dmitry Baryshkov
Add a helper setting config values which are typically constant across
operating modes (table E-4 of the standard) and mux_word_size (which is
a const according to 3.5.2).
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
The current dpu_hw_dsc calculation for det_thresh_flatness does not
match the downstream calculation or the DSC spec.
Use the DRM DSC helper for det_thresh_flatness to match downstream
implementation and the DSC spec.
Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC")
Reviewed-by:
Use MSM and DRM DSC helper methods to configure DSC for DSI.
Signed-off-by: Jessica Zhang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
Correct the math for slice_last_group_size so that it matches the
calculations downstream.
Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC")
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Marijn Suijten
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 5
There are some overlap in calculations for MSM-specific DSC variables
between DP and DSI. In addition, the calculations for initial_scale_value
and det_thresh_flatness that are defined within the DSC 1.2 specifications,
but aren't yet included in drm_dsc_helper.c.
This series moves these
Add helpers to calculate det_thresh_flatness and initial_scale_value as
these calculations are defined within the DSC spec.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
include/drm/display/drm_dsc_helper.h | 11 +++
1 file changed, 11 insertions(+)
diff --git
From: Dmitry Baryshkov
Use new DRM DSC helpers to setup DSI DSC configuration. The
initial_scale_value needs to be adjusted according to the standard, but
this is a separate change.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Jessica Zhang
---
Introduce MSM-specific DSC helper methods, as some calculations are
common between DP and DSC.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/msm_dsc_helper.c | 26 ++
+ dri-devel
On Tue, May 9, 2023 at 5:43 PM wrote:
>
> From: Vitaly Prosyak
>
> During an IGT GPU reset test we see again oops despite of
> commit 0c8c901aaaebc9bf8bf189ffc116e678f7a2dc16
> drm/sched: Check scheduler ready before calling timeout handling.
>
> It uses ready condition whether to
On Tue, May 09, 2023 at 11:00:36AM -0300, Gustavo Sousa wrote:
Quoting Lucas De Marchi (2023-05-09 02:14:02)
Add GENMASK_U32(), GENMASK_U16() and GENMASK_U8() macros to create
masks for fixed-width types and also the corresponding BIT_U32(),
BIT_U16() and BIT_U8().
All of those depend on a
FWIW, we technically do use it right now, but it is always set to 1 in S.31.32.
Before we used shaper + 3D LUT we did use it for scaling SDR content,
but given we always have a shaper + 3D LUT it made sense for us to
roll that into there.
On Tue, 9 May 2023 at 20:00, Harry Wentland wrote:
>
>
From: Rob Clark
For errors after msm_submitqueue_get(), we need to drop the submitqueue
reference. Additionally after get_unused_fd() we need to drop the fd.
The ordering for dropping the queue lock and put_unused_fd() is not
important, so just move this all into out_post_unlock.
v2: Only drop
On 5/9/2023 11:02 AM, Abhinav Kumar wrote:
On 5/9/2023 4:42 AM, Dmitry Baryshkov wrote:
On 09/05/2023 11:54, Konrad Dybcio wrote:
On 9.05.2023 10:23, Neil Armstrong wrote:
On 09/05/2023 01:27, Dmitry Baryshkov wrote:
On 08/05/2023 23:09, Abhinav Kumar wrote:
On 5/3/2023 1:26 AM,
On Tuesday, May 9th, 2023 at 21:53, Dave Airlie wrote:
> There are also other vendor side effects to having this in userspace.
>
> Will the library have a loader?
> Will it allow proprietary plugins?
> Will it allow proprietary reimplementations?
> What will happen when a vendor wants distros
On 5/9/23 12:54, Joshua Ashton wrote:
> We currently do not have a use for this as we settled on per-plane 3D
> LUT + Shaper, but we might end up wanting to use in our scRGB stack
> someday so I would like to keep it.
>
uAPI should always have a userspace that uses it. But if we go
and put it
On Wed, 10 May 2023 at 00:31, Harry Wentland wrote:
>
>
>
> On 5/7/23 19:14, Dave Airlie wrote:
> > On Sat, 6 May 2023 at 08:21, Sebastian Wick
> > wrote:
> >>
> >> On Fri, May 5, 2023 at 10:40 PM Dave Airlie wrote:
> >>>
> >>> On Fri, 5 May 2023 at 01:23, Simon Ser wrote:
>
> Hi
On 5/8/2023 4:30 AM, Dmitry Baryshkov wrote:
On 08/05/2023 14:02, Leonard Lausen wrote:
Abhinav Kumar writes:
On 5/7/2023 7:15 PM, Bjorn Andersson wrote:
When booting with the cable connected on my X13s, 100 is long enough
for
my display to time out and require me to disconnect and
From: Marek Vasut
Implement support for DSI clock and data lane DN/DP polarity swap by
means of decoding 'lane-polarities' DT property. The controller does
support DN/DP swap of clock lane and all data lanes, the controller
does not support polarity swap of individual data lane bundles, add
a
From: Fabio Estevam
The Samsung DSIM IP block allows the inversion of the clock and
data lanes.
Add an optional property called 'lane-polarities' that describes the
polarities of the MIPI DSI clock and data lanes.
This property is useful for properly describing the hardware when the
board
The existing validations are incorrect and insufficient. This is
motivated by OOB access in amdgpu_vm_update_range when
offset_in_bo+map_size overflows.
Fixes: 9f7eb5367d00 ("drm/amdgpu: actually use the VM map parameters")
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 7 +--
Extend the address and size validations to AMDGPU_VA_OP_UNMAP and
AMDGPU_VA_OP_CLEAR by moving the validations to amdgpu_gem_va_ioctl.
Internal users of amdgpu_vm_bo_map are no longer validated but they
should be fine.
Userspace (radeonsi and radv) seems fine as well.
---
Fix the STI console to be able to execute either the 64-bit STI ROM code
or the 32-bit STI ROM code.
This is necessary on 64-bit only machines (e.g. C8000 workstation) which
otherwise won't show the STI text console on HP graphic cards like
Visualize-FX5/FX10/FXe.
When calling 32-bit code from a
On 5/9/2023 4:42 AM, Dmitry Baryshkov wrote:
On 09/05/2023 11:54, Konrad Dybcio wrote:
On 9.05.2023 10:23, Neil Armstrong wrote:
On 09/05/2023 01:27, Dmitry Baryshkov wrote:
On 08/05/2023 23:09, Abhinav Kumar wrote:
On 5/3/2023 1:26 AM, Dmitry Baryshkov wrote:
On 03/05/2023 04:19,
Hi Maxime,
On 5/4/23 12:04, Maxime Ripard wrote:
Hi Dinh,
On Thu, Apr 27, 2023 at 02:09:48PM -0500, Dinh Nguyen wrote:
Hi Maxime,
On 4/25/23 09:48, Maxime Ripard wrote:
Hi Dinh,
On Mon, Apr 24, 2023 at 01:32:28PM -0500, Dinh Nguyen wrote:
On 4/4/23 05:11, Maxime Ripard wrote:
The SoCFGPA
On 07/05/2023 22:12, Dmitry Baryshkov wrote:
> Follow the dp-connector example and add hdmi-pwr supply to drive the 5V
> pin of the HDMI connector (together with some simple glue logic possibly
> attached to the connector).
>
> Signed-off-by: Dmitry Baryshkov
> ---
Acked-by: Krzysztof Kozlowski
On 08/05/2023 04:56, Laurent Pinchart wrote:
> Hi Rob,
>
> On Sun, May 07, 2023 at 04:25:44PM -0500, Rob Herring wrote:
>> On Sun, 07 May 2023 23:12:16 +0300, Dmitry Baryshkov wrote:
>>> Follow the dp-connector example and add hdmi-pwr supply to drive the 5V
>>> pin of the HDMI connector
On 5/9/23 12:52, Melissa Wen wrote:
> On 05/08, Harry Wentland wrote:
>>
>>
>> On 4/23/23 10:10, Melissa Wen wrote:
>>> Hi all,
>>>
>>> Joshua Ashton and I (with the great collaboration of Harry Wentland -
>>> thanks) have been working on KMS color pipeline enhancement for Steam
>>>
From: Rob Clark
For errors after msm_submitqueue_get(), we need to drop the submitqueue
reference. Additionally after get_unused_fd() we need to drop the fd.
The ordering for dropping the queue lock and put_unused_fd() is not
important, so just move this all into out_post_unlock.
v2: Only drop
On 5/9/23 12:23, Melissa Wen wrote:
> On 05/08, Harry Wentland wrote:
>> On 4/23/23 10:10, Melissa Wen wrote:
>>> We are enabling a large set of color calibration features to enhance KMS
>>> color mgmt but these properties are specific of AMD display HW, and
>>> cannot be provided by other
On 5/9/23 12:52, Joshua Ashton wrote:
> I think the idea is that we wouldn't have a config option so it
> doesn't inherently become linux kernel uAPI?
>
> Then we can just build our SteamOS kernels with that definiton set.
>
That's the idea. Would that work for you?
Harry
> On Tue, 9 May
On 05/09, Pekka Paalanen wrote:
> On Tue, 9 May 2023 10:23:49 -0100
> Melissa Wen wrote:
>
> > On 05/05, Joshua Ashton wrote:
> > > Some corrections and replies inline.
> > >
> > > On Fri, 5 May 2023 at 12:42, Pekka Paalanen wrote:
> > > >
> > > > On Thu, 04 May 2023 15:22:59 +
> > > >
From: Fei Yang
Currently the KMD is using enum i915_cache_level to set caching policy for
buffer objects. This is flaky because the PAT index which really controls
the caching behavior in PTE has far more levels than what's defined in the
enum. In addition, the PAT index is platform dependent,
From: Fei Yang
The design is to keep Buffer Object's caching policy immutable through
out its life cycle. This patch ends the support for set caching ioctl
from MTL onward. While doing that we also set BO's to be 1-way coherent
at creation time because GPU is no longer automatically snooping CPU
From: Fei Yang
The first three patches in this series are taken from
https://patchwork.freedesktop.org/series/116868/
These patches are included here because the last patch
has dependency on the pat_index refactor.
This series is focusing on uAPI changes,
1. end support for set caching ioctl
From: Fei Yang
This patch is a preparation for replacing enum i915_cache_level with PAT
index. Caching policy for buffer objects is set through the PAT index in
PTE, the old i915_cache_level is not sufficient to represent all caching
modes supported by the hardware.
Preparing the transition by
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a
On Tue, May 09, 2023 at 11:10:08AM -0400, Rodrigo Vivi wrote:
As documented in drivers/staging/Kconfig:
STAGING means "that these drivers are under heavy development" and
"may contain userspace interfaces that most likely will be changed
in the near future."
As explained in
I am okay with us dropping the shaper + 3D LUT from crtc. It has
problems anyway wrt. atomicity.
On Tue, 9 May 2023 at 16:34, Melissa Wen wrote:
>
> On 05/08, Harry Wentland wrote:
> >
> >
> > On 4/23/23 10:10, Melissa Wen wrote:
> > > From: Joshua Ashton
> > >
> > > Add predefined transfer
We currently do not have a use for this as we settled on per-plane 3D
LUT + Shaper, but we might end up wanting to use in our scRGB stack
someday so I would like to keep it.
On Tue, 9 May 2023 at 16:37, Melissa Wen wrote:
>
> On 05/08, Harry Wentland wrote:
> >
> >
> > On 4/23/23 10:10, Melissa
I think the idea is that we wouldn't have a config option so it
doesn't inherently become linux kernel uAPI?
Then we can just build our SteamOS kernels with that definiton set.
On Tue, 9 May 2023 at 16:26, Melissa Wen wrote:
>
> On 05/08, Harry Wentland wrote:
> > On 4/23/23 10:10, Melissa Wen
On Fri, May 05, 2023 at 08:57:52PM +0200, Maximilian Weigand wrote:
> From: Maximilian Weigand
>
> Use display_is_blank() to determine if the led strings should be turned
> off in the update_status() functions of both strings.
>
> Signed-off-by: Maximilian Weigand
> ---
>
On 05/08, Harry Wentland wrote:
>
>
> On 4/23/23 10:10, Melissa Wen wrote:
> > Hi all,
> >
> > Joshua Ashton and I (with the great collaboration of Harry Wentland -
> > thanks) have been working on KMS color pipeline enhancement for Steam
> > Deck/SteamOS by exposing the large set of color caps
From: Fei Yang
Currently the KMD is using enum i915_cache_level to set caching policy for
buffer objects. This is flaky because the PAT index which really controls
the caching behavior in PTE has far more levels than what's defined in the
enum. In addition, the PAT index is platform dependent,
From: Fei Yang
This patch set was posted at
https://patchwork.freedesktop.org/series/116868/
Change title since the PTE patch was merged separately.
These patches are extracted from series
https://patchwork.freedesktop.org/series/115980/
This series refactor the cache policy programming so
From: Fei Yang
This patch is a preparation for replacing enum i915_cache_level with PAT
index. Caching policy for buffer objects is set through the PAT index in
PTE, the old i915_cache_level is not sufficient to represent all caching
modes supported by the hardware.
Preparing the transition by
From: Rob Clark
When the special handling of qcom,adreno-smmu was moved into
qcom_smmu_create(), it was overlooked that we didn't have all the
required entries in qcom_smmu_impl_of_match. So we stopped getting
adreno_smmu_priv on sc7180, breaking per-process pgtables.
Fixes: 30b912a03d91
From: Rob Clark
Otherwise it is not always obvious if a dt or iommu change is causing us
to fall back to global pgtable.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_iommu.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_iommu.c
On 05/08, Harry Wentland wrote:
>
>
> On 4/23/23 10:10, Melissa Wen wrote:
> > From: Joshua Ashton
> >
> > Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
> > transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
> > least) When sRGB is decoded, 1.0 ->
On 05/08, Harry Wentland wrote:
>
>
> On 4/23/23 10:10, Melissa Wen wrote:
> > From amdgpu_dm_plane we can get it for both CRTC and plane color
> > properties. We are adding new plane properties for AMD driver-private
> > color mgmt.
> >
> > Signed-off-by: Melissa Wen
> > ---
> >
On 05/08, Harry Wentland wrote:
>
>
> On 4/23/23 10:10, Melissa Wen wrote:
> > From: Joshua Ashton
> >
> > Add predefined transfer function property to DRM CRTC gamma to convert
> > to wire encoding with or without gamma LUT.
> >
>
> Are all these new CRTC properties used by gamescope? I
On 05/08, Harry Wentland wrote:
>
>
> On 4/23/23 10:10, Melissa Wen wrote:
> > CRTC shaper LUT shapes the content after blending, i.e., de-linearizes
> > or normalizes space before applying a 3D LUT color correction. In the
> > next patch, we add CRTC 3D LUT property to DRM color management
On 05/08, Harry Wentland wrote:
> On 4/23/23 10:10, Melissa Wen wrote:
> > We are enabling a large set of color calibration features to enhance KMS
> > color mgmt but these properties are specific of AMD display HW, and
> > cannot be provided by other vendors. Therefore, set a config option to
> >
On 5/7/23 23:09, Huacai Chen wrote:
LoongArch now provides kernel_fpu_begin() and kernel_fpu_end() that are
used like the x86 counterparts in commit 2b3bd32ea3a22ea2d ("LoongArch:
Provide kernel fpu functions"), so we can enable DC_FP on LoongArch for
supporting more DCN devices.
Signed-off-by:
Smatch complains that:
arcfb_probe() warn: 'irq' from request_irq() not released on lines: 587.
Fix error handling in the arcfb_probe() function. If IO addresses are
not provided or framebuffer registration fails, the code will jump to
the err_addr or err_register_fb label to release resources.
Hi,
On Mon, May 8, 2023 at 7:52 PM Cong Yang
wrote:
>
> There is a problem of screen shake on the old panel. So increase the
> panel GOP component pull-down circuit size in hardware, and update the
> initialization code at the same time. The new initialization code mainly
> modifles the
Add DSI as main display output for mt8188 vdosys0.
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
Reviewed-by: Matthias Brugger
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +
1. Move output drm connector from each ddp_path array to connector array.
2. Add dynamic select available connector flow in crtc create and enable.
Signed-off-by: Nancy Lin
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
To support DSI and eDP as main display connector without modifying
mtk-drm driver, we add the dynamic connector selection mechanism.
Change in v3:
1. Change max_num comparison statement to max().
Change in v2:
1. rebase on linux-next: next-20230426
2. Fix alphabetical order and max_num condition
From: Sumera Priyadarsini
Add a virtual hardware or vblank-less mode as a module to enable VKMS
to emulate virtual devices. This means no vertical blanking events
occur and page-flips are completed arbitrarily when required for
updating the frame.
Add a new drm_crtc_funcs struct,
This patchset is a rebase of a series sent a while ago that intended
to enable virtual hardware support on the VKMS. The original patchset,
developed by Sumera Priyadarsini, is available on [1].
>From the original patchset, not much has changed. It was essentially
just rebasing the code to the
Add a new function vkms_composer_common(). The actual plane
composition work has been moved to the helper function,
vkms_composer_common(), which is called by vkms_composer_worker() and
will be called in the implementation of the virtual HW mode as well.
Co-developed-by: Sumera Priyadarsini
On Sun, 7 May 2023 at 17:27, Uwe Kleine-König
wrote:
>
> The .remove() callback for a platform driver returns an int which makes
> many driver authors wrongly assume it's possible to do error handling by
> returning an error code. However the value returned is (mostly) ignored
> and this
On 5/7/23 19:14, Dave Airlie wrote:
> On Sat, 6 May 2023 at 08:21, Sebastian Wick wrote:
>>
>> On Fri, May 5, 2023 at 10:40 PM Dave Airlie wrote:
>>>
>>> On Fri, 5 May 2023 at 01:23, Simon Ser wrote:
Hi all,
The goal of this RFC is to expose a generic KMS uAPI to
Document the unit of ttm_resource_manager.usage which was
missing before.
Cc: Thomas Hellström
Cc: Christian König
Cc: Anshuman Gupta
Signed-off-by: Nirmoy Das
---
include/drm/ttm/ttm_resource.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
To support DSI and eDP as main display connector without modifying
mtk-drm driver, we add the dynamic connector selection mechanism.
Change in v3:
1. Change max_num comparison statement to max().
Change in v2:
1. rebase on linux-next: next-20230426
2. Fix alphabetical order and max_num condition
1. Move output drm connector from each ddp_path array to connector array.
2. Add dynamic select available connector flow in crtc create and enable.
Signed-off-by: Nancy Lin
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
Quoting Lucas De Marchi (2023-05-09 02:14:02)
>Add GENMASK_U32(), GENMASK_U16() and GENMASK_U8() macros to create
>masks for fixed-width types and also the corresponding BIT_U32(),
>BIT_U16() and BIT_U8().
>
>All of those depend on a new "U" suffix added to the integer constant.
>Due to naming
Add DSI as main display output for mt8188 vdosys0.
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
Reviewed-by: Matthias Brugger
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +
1. Accordin to the comment in drm_atomic_helper_async_commit(),
we should make sure FBs have been swapped, so that cleanups in the
new_state performs a cleanup in the old FB.
So we should move swap_fb() to mtk_plane_update_new_state() done,
to avoid using the old FB which could be
On Fri, May 05, 2023 at 08:57:52PM +0200, Maximilian Weigand wrote:
> From: Maximilian Weigand
>
> Use display_is_blank() to determine if the led strings should be turned
Shouldn't this be backlight_is_blank()?
> off in the update_status() functions of both strings.
Once the description is
On 5/8/23 11:10, Maíra Canal wrote:
I've been contributing to VKMS with improvements, reviews, testing and
debugging. Therefore, add myself as a co-maintainer of the VKMS driver.
Signed-off-by: Maíra Canal
Applied to drm/drm-misc (drm-misc-next).
Best Regards,
- Maíra Canal
---
Hello,
another gentle ping.
Alexander
Am Dienstag, 17. Januar 2023, 12:08:00 CEST schrieb Alexander Stein:
> fsl_dcu_drm_modeset_init can return -EPROBE_DEFER, so use dev_err_probe
> to remove an invalid error message and add it to deferral description.
>
> Signed-off-by: Alexander Stein
>
On 09/05/2023 00:48, fei.y...@intel.com wrote:
From: Fei Yang
Currently the KMD is using enum i915_cache_level to set caching policy for
buffer objects. This is flaky because the PAT index which really controls
the caching behavior in PTE has far more levels than what's defined in the
enum.
Hi Wolfram,
Thank you for the patch.
On Tue, May 09, 2023 at 09:48:17AM +0200, Wolfram Sang wrote:
> R-Car H3 ES1.* was only available to an internal development group and
> needed a lot of quirks and workarounds. These become a maintenance
> burden now, so our development group decided to
On Tue, 9 May 2023 10:23:49 -0100
Melissa Wen wrote:
> On 05/05, Joshua Ashton wrote:
> > Some corrections and replies inline.
> >
> > On Fri, 5 May 2023 at 12:42, Pekka Paalanen wrote:
> > >
> > > On Thu, 04 May 2023 15:22:59 +
> > > Simon Ser wrote:
> > >
...
> > > > Color
On 09/05/2023 11:54, Konrad Dybcio wrote:
On 9.05.2023 10:23, Neil Armstrong wrote:
On 09/05/2023 01:27, Dmitry Baryshkov wrote:
On 08/05/2023 23:09, Abhinav Kumar wrote:
On 5/3/2023 1:26 AM, Dmitry Baryshkov wrote:
On 03/05/2023 04:19, Jessica Zhang wrote:
Currently, word count is
On 05/08, Maíra Canal wrote:
> I've been contributing to VKMS with improvements, reviews, testing and
> debugging. Therefore, add myself as a co-maintainer of the VKMS driver.
>
> Signed-off-by: Maíra Canal
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On 05/05, Joshua Ashton wrote:
> Some corrections and replies inline.
>
> On Fri, 5 May 2023 at 12:42, Pekka Paalanen wrote:
> >
> > On Thu, 04 May 2023 15:22:59 +
> > Simon Ser wrote:
> >
> > > Hi all,
> > >
> > > The goal of this RFC is to expose a generic KMS uAPI to configure the
> > >
input_bus_flags are specified in drm_bridge_timings (legacy) as well
as drm_bridge_state->input_bus_cfg.flags
The flags from the timings will be deprecated. Bridges are supposed
to validate and set the bridge state flags from atomic_check.
Implement atomic_check hook for the same.
On Tue, 9 May 2023 at 10:00, Marijn Suijten
wrote:
>
> On 2023-05-09 02:08:52, Dmitry Baryshkov wrote:
> > On 09/05/2023 00:46, Jessica Zhang wrote:
> > >
> > >
> > > On 5/7/2023 9:00 AM, Marijn Suijten wrote:
> > >> On 2023-05-05 14:23:50, Jessica Zhang wrote:
> > >>> Add DATA_COMPRESS feature
Hi Fei,
On Mon, May 08, 2023 at 04:48:54PM -0700, fei.y...@intel.com wrote:
> From: Fei Yang
>
> Currently the KMD is using enum i915_cache_level to set caching policy for
> buffer objects. This is flaky because the PAT index which really controls
> the caching behavior in PTE has far more
Hello Frank,
On Mon May 8, 2023 at 10:47 AM CEST, Frank Oltmanns wrote:
> I tested this on my pinephone on drm-next, using additional patches for
> the pinephone's panel. [1] [2] [3]
Thank you for testing this and all the previous version of this
patchset. I appreciate your help.
> I played
Hello,
Another gentle ping.
Alexander
Am Mittwoch, 25. Januar 2023, 15:52:15 CEST schrieb Alexander Stein:
> From: Markus Niebel
>
> The DE signal is active high on this display, fill in the missing
> bus_flags. This aligns panel_desc with its display_timing.
>
> Fixes: 9a2654c0f62a
Hello,
after .IMX8M[MNP] support for samsung-dsim has been integrated into next, I'm
trying add support for the MIPI-DSI-to-DP bridge (TC358767) on my TQMa8MPxL/
MBa8MPxL board (imx8mp-tqma8mpql-mba8mpxl.dts).
Both, DSI host and device, probe and attach successfully.
But once lcdif is probing
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