* Krzysztof Kozlowski [231205 07:10]:
> On 04/12/2023 19:22, Andrew Davis wrote:
> > @@ -56,6 +76,43 @@ allOf:
> >properties:
> > clocks:
> >maxItems: 1
> > + required:
> > +- clocks
> > +- clock-names
>
> You need to define the clocks for your
On 04/12/2023 19:57, Chris Morgan wrote:
From: Chris Morgan
The driver shutdown is duplicate as it calls drm_unprepare and
drm_disable which are called anyway when associated drivers are
shutdown/removed.
Signed-off-by: Chris Morgan
---
drivers/gpu/drm/panel/panel-himax-hx8394.c | 17
On 04/12/2023 19:57, Chris Morgan wrote:
From: Chris Morgan
Add support for the Powkiddy X55 panel as used on the Powkiddy X55
handheld gaming console. This panel uses a Himax HX8394 display
controller and requires a vendor provided init sequence. The display
resolution is 720x1280 and is 67mm
On 04/12/2023 19:57, Chris Morgan wrote:
From: Chris Morgan
Add support for setting the rotation property for the Himax HX8394
panel.
Signed-off-by: Chris Morgan
---
drivers/gpu/drm/panel/panel-himax-hx8394.c | 15 +++
1 file changed, 15 insertions(+)
diff --git
On 04/12/2023 19:57, Chris Morgan wrote:
From: Chris Morgan
Drop the panel specific prepare/unprepare logic. This is now tracked
by the DRM stack [1].
[1] commit d2aacaf07395 ("drm/panel: Check for already prepared/enabled in
drm_panel")
Signed-off-by: Chris Morgan
---
On 30.11.2023 17:16, Paz Zcharya wrote:
There was an assumption that for iGPU there should be a 1:1 mapping
of GGTT to physical address pointing to actual framebuffer.
This assumption is not valid anymore for MTL.
Fix that by checking GGTT to determine the phys address.
The following
On 04/12/2023 19:22, Andrew Davis wrote:
> The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
> multiple vendors. Describe how the SGX GPU is integrated in these SoC,
> including register space and interrupts. Clocks, reset, and power domain
> information is SoC specific.
>
>
On 04/12/2023 13:33, Keith Zhao wrote:
> StarFive SoCs JH7110 display system:
> dc controller, hdmi controller,
> encoder, vout syscon.
Nothing improved here.
>
> add the path of yaml file in MAINTAINERS
Neither here - still these are not proper sentences and wrapping is wrong.
Please wrap
On 01.12.2023 16:44, Nirmoy Das wrote:
gen8_engine_reset_prepare() can fail when HW fails to set
RESET_CTL_READY_TO_RESET bit. In some cases this is not fatal
error as driver will retry.
Let the caller of gen8_engine_reset_prepare() decide if a
failure in gen8_engine_reset_prepare is an
On Mon, Dec 04, 2023 at 12:22:36PM -0600, Andrew Davis wrote:
> The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
> multiple vendors. Describe how the SGX GPU is integrated in these SoC,
> including register space and interrupts. Clocks, reset, and power domain
> information
On 04/12/2023 13:33, Keith Zhao wrote:
> This patch is a drm driver for Starfive Soc JH7110,
> I am sending Drm driver part and HDMI driver part.
>
> We used GEM framework for buffer management,
> and for buffer allocation,we use DMA APIs.
>
> the Starfive HDMI servers as interface between a LCD
Am 04.12.23 um 22:54 schrieb Rob Clark:
On Thu, Mar 23, 2023 at 2:30 PM Rob Clark wrote:
[SNIP]
So, this patch turns out to blow up spectacularly with dma_fence
refcnt underflows when I enable DRIVER_SYNCOBJ_TIMELINE .. I think,
because it starts unwrapping fence chains, possibly in parallel
A user or admin can configure a VMM (Qemu) Guest's memory to be
backed by hugetlb pages for various reasons. However, a Guest OS
would still allocate (and pin) buffers that are backed by regular
4k sized pages. In order to map these buffers and create dma-bufs
for them on the Host, we first need
For drivers that would like to longterm-pin the pages associated
with a memfd, the pin_user_pages_fd() API provides an option to
not only pin the pages via FOLL_PIN but also to check and migrate
them if they reside in movable zone or CMA block. This API
currently works with memfds but it should
Using memfd_pin_user_pages() will ensure that the pages are pinned
correctly using FOLL_PIN. And, this also ensures that we don't
accidentally break features such as memory hotunplug as it would
not allow pinning pages in the movable zone.
Using this new API also simplifies the code as we no
Since the memfd pages associated with a udmabuf may be migrated
as part of udmabuf create, we need to verify the data coherency
after successful migration. The new tests added in this patch try
to do just that using 4k sized pages and also 2 MB sized huge
pages for the memfd.
Successful
The first two patches were previously reviewed but not yet merged.
These ones need to be merged first as the fourth patch depends on
the changes introduced in them and they also fix bugs seen in
very specific scenarios (running Qemu with hugetlb=on, blob=true
and rebooting guest VM).
The third
Add VM_PFNMAP to vm_flags in the mmap handler to ensure that
the mappings would be managed without using struct page.
And, in the vm_fault handler, use vmf_insert_pfn to share the
page's pfn to userspace instead of directly sharing the page
(via struct page *).
Cc: David Hildenbrand
Cc: Daniel
On Tue, 2023-12-05 at 12:01 +1000, Dave Airlie wrote:
> These can happen in normal operations esp with auxch transactions.
>
> Gets rid of
> nouveau :01:00.0: gsp: cli:0xc1d2 obj:0x0073 ctrl cmd:0x00731341
> failed: 0x
> in logs.
Is this something you want me to look into?
These were leftover debug, if we need to bring them back do so
for debugging later.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c
On Mon, 30 Oct 2023 11:36:22 +0100, Neil Armstrong wrote:
> The SM8650 MDSS is very close from the MDSS 9.0.0 found
> on the SM8550 SoC, with the following difference:
> - DSI PHY 2.8.8, no significant differences
> - DPU 10.0.0:
> - Enhanced max_linewidth to 8k
> - PINGPONG_8 & PINGPONG_9
>
On Mon, 16 Oct 2023 22:18:07 -0400, Richard Acayan wrote:
> Changes since v3 (2023100927.485054-8-mailingrad...@gmail.com):
> - move status properties down (review tag retained) (6/6)
> - accumulate review tag (3/6)
>
> Changes since v2 (20231003012119.857198-9-mailingrad...@gmail.com):
>
On Sat, 02 Dec 2023 01:40:24 +0200, Dmitry Baryshkov wrote:
> The handling code also usually knows, which sub-block it is now looking
> at. Drop unused 'id' field and arguments and merge some of sub-block
> declarations.
>
> While we are at it, also fix all VIG subblocks to contain correct
On Sun, 03 Dec 2023 01:42:43 +0300, Dmitry Baryshkov wrote:
> Per agreement with Konrad, picked up this patch series.
>
> Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there's
> another path that needs to be handled to ensure MDSS functions properly,
> namely the "reg bus", a.k.a
The drm_atomic_helper_check_wb_encoder_state() function doesn't use
encoder for anything other than getting the drm_device instance. The
function's description talks about checking the writeback connector
state, not the encoder state. Moreover, there is no such thing as an
encoder state, encoders
As the renamed drm_atomic_helper_check_wb_connector_state() now accepts
drm_writeback_connector as the first argument (instead of drm_encoder),
move the VKMS writeback atomic_check from drm_encoder_helper_funcs to
drm_connector_helper_funcs. Also drop the vkms_wb_encoder_helper_funcs,
which have
The function drm_atomic_helper_check_wb_encoder_state() doesn't use
drm_encoder for anything sensible. Internally it checks
drm_writeback_connector's state. Thus it makes sense to let this
function accept drm_writeback_connector object and the drm_atomic_state
and rename it to
https://bugzilla.kernel.org/show_bug.cgi?id=218221
--- Comment #2 from airl...@gmail.com ---
Can't remember my bz, but all those errors are fine, I've sent patches
to clean them up so we don't report them in dmesg anymore.
On Tue, 5 Dec 2023 at 01:12, wrote:
>
>
Can't remember my bz, but all those errors are fine, I've sent patches
to clean them up so we don't report them in dmesg anymore.
On Tue, 5 Dec 2023 at 01:12, wrote:
>
> https://bugzilla.kernel.org/show_bug.cgi?id=218221
>
> Bug ID: 218221
>Summary: Nouveau GSP fail on
From: Dave Airlie
These can happen in normal operations esp with auxch transactions.
Gets rid of
nouveau :01:00.0: gsp: cli:0xc1d2 obj:0x0073 ctrl cmd:0x00731341
failed: 0x
in logs.
Cc: Lyude
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c
On 12/4/23 16:14, Boris Brezillon wrote:
Some users need to release resources attached to the vm_bo object when
it's destroyed. In Panthor's case, we need to release the pin ref so
BO pages can be returned to the system when all GPU mappings are gone.
This could be done through a custom
On 04/12/2023 10:38, Maxime Ripard wrote:
On Sat, Dec 02, 2023 at 12:07:49AM +0200, Dmitry Baryshkov wrote:
The drm_atomic_helper_check_wb_encoder_state() function doesn't use
encoder for anything other than getting the drm_device instance. The
function's description talks about checking the
Add NULL callbacks for some things GSP calls that we don't handle, but know
about
so we avoid the logging.
v2: Timur suggested allowing null fn.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff
Add a simple test that checks whether the action is indeed called right
away and that it is not called on the final drm_dev_put().
Signed-off-by: Michał Winiarski
---
drivers/gpu/drm/tests/drm_managed_test.c | 24
1 file changed, 24 insertions(+)
diff --git
It simplifies the process of extending the test suite with additional
test cases without unnecessary duplication.
Additionally, store drm_device inside priv to simplify the lifetime
management by tying priv lifetime with parent struct device.
Signed-off-by: Michał Winiarski
---
Similar to devres equivalent, it allows to call the "release" action
directly and remove the resource from the managed resources list.
Signed-off-by: Michał Winiarski
---
drivers/gpu/drm/drm_managed.c | 39 +++
include/drm/drm_managed.h | 4
2 files
Upcoming Intel Xe driver will need to have a more fine-grained control
over DRM managed actions - namely, the ability to release a given
action, triggering it manually at a different point in time than the
final drm_dev_put().
This series adds a drmm_release_action function (which is similar to
On Thu, Nov 30, 2023 at 09:38:35AM +0100, Maxime Ripard wrote:
> Hi,
>
> Thanks for creating a test for that, that's really appreciated :)
>
> On Wed, Nov 29, 2023 at 11:14:12PM +0100, Michał Winiarski wrote:
> > Add a simple test that checks whether the action is indeed called right
> > away
On Tue, 5 Dec 2023 at 01:55, Kuogee Hsieh wrote:
>
> A DCE (Display Compression Engine) contains two DSC hard slice
> encoders. Each DCE start with even DSC encoder index followed by
> an odd DSC encoder index. Each encoder can work independently.
> But Only two DSC encoders from same DCE can be
On Tue, 2023-12-05 at 10:01 +1000, Dave Airlie wrote:
> The current code prints a message when we get a callback we don't
> handle, this silences those, but maybe I should just silence them.
How about this:
In r535_gsp_msg_recv():
if (ntfy->fn && (ntfy->fn == msg->function)) {
On Tue, 5 Dec 2023 at 01:36, Abhinav Kumar wrote:
>
>
>
> On 12/3/2023 3:53 AM, Dmitry Baryshkov wrote:
> > Now as we have standard per-encoder debugfs directory, move DPU encoder
> > status file to that directory.
> >
> > Signed-off-by: Dmitry Baryshkov
> > ---
> >
On Tue, 5 Dec 2023 at 09:07, Timur Tabi wrote:
>
> On Tue, 2023-12-05 at 08:55 +1000, Dave Airlie wrote:
> > +static int
> > +r535_gsp_msg_ucode_libos_print(void *priv, u32 fn, void *repv, u32 repc)
> > +{
> > + /* work out what we should do here. */
> > + return 0;
> > +}
>
> This is
A DCE (Display Compression Engine) contains two DSC hard slice
encoders. Each DCE start with even DSC encoder index followed by
an odd DSC encoder index. Each encoder can work independently.
But Only two DSC encoders from same DCE can be paired to work
together to support merge mode. In addition,
On 12/1/2023 3:40 PM, Dmitry Baryshkov wrote:
After folding QSEED3LITE and QSEED4 feature bits into QSEED3_COMPATIBLE
several VIG feature masks became equal. Drop these duplicates.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h| 2 +-
On 12/1/2023 3:40 PM, Dmitry Baryshkov wrote:
Three different features, DPU_SSPP_SCALER_QSEED3, QSEED3LITE and QSEED4
are all related to different versions of the same HW scaling block.
Corresponding driver parts use scaler_blk.version to identify the
correct way to program the hardware. In
On 12/3/2023 3:53 AM, Dmitry Baryshkov wrote:
Now as we have standard per-encoder debugfs directory, move DPU encoder
status file to that directory.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 45 +++--
1 file changed, 6
On 12/2/2023 2:42 PM, Dmitry Baryshkov wrote:
Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there's
another path that needs to be handled to ensure MDSS functions properly,
namely the "reg bus", a.k.a the CPU-MDSS interconnect.
Gating that path may have a variety of effects,
On 12/2/2023 2:42 PM, Dmitry Baryshkov wrote:
There are just two places where we set the bandwidth: in the resume and
in the suspend paths. Drop the wrapping function
msm_mdss_icc_request_bw() and call icc_set_bw() directly.
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
On Tue, 2023-12-05 at 08:55 +1000, Dave Airlie wrote:
> +static int
> +r535_gsp_msg_ucode_libos_print(void *priv, u32 fn, void *repv, u32 repc)
> +{
> + /* work out what we should do here. */
> + return 0;
> +}
This is part of my logrm debugfs patch. It contains the printf log from a
These seem to get called, but it doesn't look like we have to care too much
at this point.
Signed-off-by: Dave Airlie
---
.../gpu/drm/nouveau/nvkm/subdev/gsp/r535.c| 24 ++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git
On 2023-12-04 12:49, Deucher, Alexander wrote:
[AMD Official Use Only - General]
-Original Message-
From: Kuehling, Felix
Sent: Friday, December 1, 2023 6:40 PM
To: amd-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Deucher,
Alexander
Cc: Daniel Vetter ; Koenig,
On Thu, Mar 23, 2023 at 2:30 PM Rob Clark wrote:
>
> On Thu, Mar 23, 2023 at 7:03 AM Christian König
> wrote:
> >
> > Am 23.03.23 um 14:54 schrieb Rob Clark:
> > > On Thu, Mar 23, 2023 at 12:35 AM Christian König
> > > wrote:
> > >> Am 22.03.23 um 23:44 schrieb Rob Clark:
> > >>> From: Rob
On 2023-11-14 17:58:30, Jonathan Marek wrote:
> The value returned by msm_dsi_wide_bus_enabled() doesn't match what the
> driver is doing in video mode. Fix that by actually enabling widebus for
> video mode.
>
> Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI")
> Signed-off-by:
On 12/2/2023 2:42 PM, Dmitry Baryshkov wrote:
From: Konrad Dybcio
The DPU1 driver needs to handle all MDPn<->DDR paths, as well as
CPU<->SLAVE_DISPLAY_CFG. The former ones share how their values are
calculated, but the latter one has static predefines spanning all SoCs.
In preparation for
Add SGX GPU device entries to base OMAP3 dtsi files.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/am3517.dtsi | 11 ++-
arch/arm/boot/dts/ti/omap/omap34xx.dtsi | 11 ++-
arch/arm/boot/dts/ti/omap/omap36xx.dtsi | 9 +
3 files changed, 17 insertions(+), 14
Add SGX GPU device entry to base sun6i-a31 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/allwinner/sun6i-a31.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
index
Add SGX GPU device entry to base OMAP4 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/omap4.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/omap4.dtsi
b/arch/arm/boot/dts/ti/omap/omap4.dtsi
index
Add SGX GPU device entry to base jz4780 dtsi file.
Signed-off-by: Andrew Davis
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index
Add SGX GPU device entry to base AM437x dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/am4372.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi
b/arch/arm/boot/dts/ti/omap/am4372.dtsi
index 9d2c064534f7d..5fd1b380ece62
On 12/2/2023 2:42 PM, Dmitry Baryshkov wrote:
Stop using hand-written reset function for ICC release, use
devm_of_icc_get() instead.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_mdss.c | 16 ++--
1 file changed, 2 insertions(+), 14 deletions(-)
Reviewed-by:
Hi,
On 12/4/23 19:56, Alex Bee wrote:
> Hi Johan,
> Am 04.12.23 um 18:39 schrieb Johan Jonker:
>> Convert inno_hdmi-rockchip.txt to yaml.
> Nice - I'm having something very similar on my queue :)
>>
>> Signed-off-by: Johan Jonker
>> ---
>>
>> Note for rob+dt:
>> Used enum to "soon" be able to
From: Lu Yao
[ Upstream commit 2161e09cd05a50d80736fe397145340d2e8f6c05 ]
For 'AMDGPU_FAMILY_SI' family cards, in 'si_common_early_init' func, init
'didt_rreg' and 'didt_wreg' to 'NULL'. But in func
'amdgpu_debugfs_regs_didt_read/write', using 'RREG32_DIDT' 'WREG32_DIDT'
lacks of relevant
From: Lu Yao
[ Upstream commit 2161e09cd05a50d80736fe397145340d2e8f6c05 ]
For 'AMDGPU_FAMILY_SI' family cards, in 'si_common_early_init' func, init
'didt_rreg' and 'didt_wreg' to 'NULL'. But in func
'amdgpu_debugfs_regs_didt_read/write', using 'RREG32_DIDT' 'WREG32_DIDT'
lacks of relevant
From: Lu Yao
[ Upstream commit 2161e09cd05a50d80736fe397145340d2e8f6c05 ]
For 'AMDGPU_FAMILY_SI' family cards, in 'si_common_early_init' func, init
'didt_rreg' and 'didt_wreg' to 'NULL'. But in func
'amdgpu_debugfs_regs_didt_read/write', using 'RREG32_DIDT' 'WREG32_DIDT'
lacks of relevant
From: Dmytro Laktyushkin
[ Upstream commit c92da0403d373c03ea5c65c0260c7db6762013b0 ]
[WHY/HOW]
Increase the pstate latency to improve ac/dc transition
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Dmytro Laktyushkin
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
From: Felix Kuehling
[ Upstream commit 0514f63cfff38a0dcb7ba9c5f245827edc0c5107 ]
This reverts commit 71a7974ac7019afeec105a54447ae1dc7216cbb3.
These helper functions are needed for KFD to export and import DMABufs
the right way without duplicating the tracking of DMABufs associated with
GEM
From: ZhenGuo Yin
[ Upstream commit 72838777aa38352e20301e123b97110c456cd38e ]
[Why]
Memory leaks of gang_ctx_bo and wptr_bo.
[How]
Free gang_ctx_bo and wptr_bo in pqm_uninit.
v2: add a common function pqm_clean_queue_resource to
free queue's resources.
v3: reset pdd->pqd.num_gws when
From: Lijo Lazar
[ Upstream commit ed6e4f0a27ebafffbd12bf3878ab004787685d8a ]
The legacy region at 0x7F000 maps to valid registers in GC 9.4.3 SOCs.
Use 0x1A000 offset instead as MMIO register remap region.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
From: Lu Yao
[ Upstream commit 2161e09cd05a50d80736fe397145340d2e8f6c05 ]
For 'AMDGPU_FAMILY_SI' family cards, in 'si_common_early_init' func, init
'didt_rreg' and 'didt_wreg' to 'NULL'. But in func
'amdgpu_debugfs_regs_didt_read/write', using 'RREG32_DIDT' 'WREG32_DIDT'
lacks of relevant
From: Dmytro Laktyushkin
[ Upstream commit c92da0403d373c03ea5c65c0260c7db6762013b0 ]
[WHY/HOW]
Increase the pstate latency to improve ac/dc transition
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Dmytro Laktyushkin
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
From: Hawking Zhang
[ Upstream commit 884e9b0827e889a8742e203ccd052101fb0b945d ]
In nbio v7_9, host driver should not issu gpu reset
Signed-off-by: Hawking Zhang
Reviewed-by: Stanley Yang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c | 5
From: Mukul Joshi
[ Upstream commit 2f86bf79b63dbe6963ebc647b77a5f576a906b40 ]
KFD_GC_VERSION was recently updated to use a new function
for IP version checks. As a result, use KFD_GC_VERSION as
the common function for all IP version checks in KFD.
Signed-off-by: Mukul Joshi
Reviewed-by:
Hi Alex, Heiko,
On 12/4/23 20:12, Alex Bee wrote:
> Hi Johan,
> Am 04.12.23 um 18:40 schrieb Johan Jonker:
>> Add hdmi-connector node to comply with the inno_hdmi binding.
>>
>> Signed-off-by: Johan Jonker
>> ---
>> arch/arm/boot/dts/rockchip/rk3036-kylin.dts | 17 +
>> 1 file
On 12/4/2023 9:13 AM, Harshit Mogalapalli wrote:
When pm_runtime_resume_and_get() fails, unlock before returning.
Fixes: 5814b8bf086a ("drm/msm/dp: incorporate pm_runtime framework into DP
driver")
Signed-off-by: Harshit Mogalapalli
---
This is based on static analysis with Smatch. Only
Hi,
On 2023/12/4 17:27, Thomas Zimmermann wrote:
Get the global screen_info's address once and access the data via
this pointer. Limits the use of global state.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
Reviewed-by: Sui Jingfeng
I have applied the whole
Hi Nirmoy,
On Fri, Dec 01, 2023 at 04:44:43PM +0100, Nirmoy Das wrote:
> gen8_engine_reset_prepare() can fail when HW fails to set
> RESET_CTL_READY_TO_RESET bit. In some cases this is not fatal
> error as driver will retry.
>
> Let the caller of gen8_engine_reset_prepare() decide if a
> failure
On Mon, 04 Dec 2023 09:13:14 -0800, Harshit Mogalapalli wrote:
> When pm_runtime_resume_and_get() fails, unlock before returning.
>
>
Applied, thanks!
[1/1] drm/msm/dp: add a missing unlock in dp_hpd_plug_handle()
https://gitlab.freedesktop.org/lumag/msm/-/commit/801207c18834
Best
Add SGX GPU device entry to base OMAP5 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm/boot/dts/ti/omap/omap5.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/omap5.dtsi
b/arch/arm/boot/dts/ti/omap/omap5.dtsi
index
Add SGX GPU device entry to base AM654 dtsi file.
Signed-off-by: Andrew Davis
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index
On Mon, 4 Dec 2023 at 19:13, Harshit Mogalapalli
wrote:
>
> When pm_runtime_resume_and_get() fails, unlock before returning.
>
> Fixes: 5814b8bf086a ("drm/msm/dp: incorporate pm_runtime framework into DP
> driver")
> Signed-off-by: Harshit Mogalapalli
> ---
> This is based on static analysis
On Mon, 04 Dec 2023 15:13:47 +0200, Dmitry Baryshkov wrote:
> Altough the Solid Fill planes patchset got all reviews and
> acknowledgements, it doesn't fulfill requirements for the new uABI.
> Merging it was a fault of mine.
>
> It has neither corresponding open-source userspace implementation
On Mon, 04 Dec 2023 18:33:06 +0100, Boris Brezillon wrote:
> From: Liviu Dudau
>
> Arm has introduced a new v10 GPU architecture that replaces the Job Manager
> interface with a new Command Stream Frontend. It adds firmware driven
> command stream queues that can be used by kernel and user
On Mon, 4 Dec 2023 at 20:07, Abhinav Kumar wrote:
> On 10/3/2023 8:19 PM, Dmitry Baryshkov wrote:
> > There are no in-kernel users of MSM_ENC_VBLANK wait type. Drop it
> > together with the corresponding wait_for_vblank callback.
> >
> > Signed-off-by: Dmitry Baryshkov
> > ---
> >
On 12/3/2023 7:31 PM, Bjorn Andersson wrote:
On Fri, Dec 01, 2023 at 11:43:36AM -0800, Abhinav Kumar wrote:
On 12/1/2023 8:22 AM, Bjorn Andersson wrote:
On Fri, Dec 01, 2023 at 10:34:50AM +0200, Dmitry Baryshkov wrote:
On Fri, 1 Dec 2023 at 05:47, Bjorn Andersson wrote:
On Thu, Nov 30,
Hi Johan,
Am 04.12.23 um 18:40 schrieb Johan Jonker:
Add hdmi-connector node to comply with the inno_hdmi binding.
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rockchip/rk3036-kylin.dts | 17 +
1 file changed, 17 insertions(+)
diff --git
On 12/4/2023 5:23 AM, Jacek Lawrynowicz wrote:
From: Andrzej Kacprowski
Using PCI Device ID/Revision to initialize the interrupt_clear_with_0
workaround is problematic - there are many pre-production
steppings with different behavior, even with the same PCI ID/Revision
Instead of checking for
Recently, commit 636b927eba5b ("workqueue: Make unbound workqueues to use
per-cpu pool_workqueues") changed WQ_UNBOUND workqueue's behavior. It
changed the meaning of alloc_workqueue()'s max_active from an upper limit
imposed per NUMA node to a limit per CPU. As a result, massive number of
workers
From: Chris Morgan
In the reference manual under "2.8.6 NIU Clock gating reliance"
it is stated that pclk_usb_niu has a dependency on hclk_usb_niu.
While the manual does not state that this is a bi-directional
relationship it was noted that the sdmmc2 failed to operate for me in
mmc mode if the
From: Chris Morgan
Add support for the Powkiddy X55. The Powkiddy RK2023 is a handheld
gaming device with a 720p 5.5 inch screen powered by the Rockchip
RK3566 SoC. It includes a Realtek 8821cs WiFi/BT module, 2 ADC
joysticks powered by 4 dedicated ADC channels, and several GPIO
face buttons.
From: Chris Morgan
The Powkiddy RK2023 is a handheld gaming device made by Powkiddy and
powered by the Rockchip RK3566 SoC. This device is somewhat similar
to the existing Powkiddy RK3566 devices, which have been grouped
together with a previous commit[1].
[1]
From: Chris Morgan
Add compatible string for the Powkiddy X55 panel.
Signed-off-by: Chris Morgan
Acked-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/panel/himax,hx8394.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Chris Morgan
Add support for setting the rotation property for the Himax HX8394
panel.
Signed-off-by: Chris Morgan
---
drivers/gpu/drm/panel/panel-himax-hx8394.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-himax-hx8394.c
From: Chris Morgan
The driver shutdown is duplicate as it calls drm_unprepare and
drm_disable which are called anyway when associated drivers are
shutdown/removed.
Signed-off-by: Chris Morgan
---
drivers/gpu/drm/panel/panel-himax-hx8394.c | 17 -
1 file changed, 17
From: Chris Morgan
Add support for the Powkiddy X55 panel as used on the Powkiddy X55
handheld gaming console. This panel uses a Himax HX8394 display
controller and requires a vendor provided init sequence. The display
resolution is 720x1280 and is 67mm by 121mm as measured with calipers.
From: Chris Morgan
Add support for a PLL rate of 126.4MHz so that the Powkiddy X55 panel
can run at a requested 60hz.
I have confirmed this rate fits with all the constraints
listed in the TRM for the VPLL (as an integer PLL) in Part 1 "Chapter
2 Clock & Reset Unit (CRU)."
Signed-off-by: Chris
From: Chris Morgan
Document panel rotation for Himax HX8394 display panel.
Signed-off-by: Chris Morgan
Acked-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/panel/himax,hx8394.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Chris Morgan
Drop the panel specific prepare/unprepare logic. This is now tracked
by the DRM stack [1].
[1] commit d2aacaf07395 ("drm/panel: Check for already prepared/enabled in
drm_panel")
Signed-off-by: Chris Morgan
---
drivers/gpu/drm/panel/panel-himax-hx8394.c | 11 ---
1
From: Chris Morgan
Add support for the Rockchip RK3566 based Powkiddy X55 handheld gaming
console.
Changes since V1:
- Corrected a bug with the DRM mode flags for the video driver.
- Adjusted panel front and back porch and pixel clock to fix
issues with display that occurred after
Hi Johan,
Am 04.12.23 um 18:39 schrieb Johan Jonker:
Convert inno_hdmi-rockchip.txt to yaml.
Nice - I'm having something very similar on my queue :)
Signed-off-by: Johan Jonker
---
Note for rob+dt:
Used enum to "soon" be able to add "rockchip,rk3128-inno-hdmi"
Yeah, actually I'm
Applied. Thanks!
On Mon, Dec 4, 2023 at 5:39 AM Zhipeng Lu wrote:
>
> The rdev->pm.dpm.ps allocated by kcalloc should be freed in every
> following error-handling path. However, in the error-handling of
> rdev->pm.power_state[i].clock_info the rdev->pm.dpm.ps is not freed,
> resulting in a
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