Re: [PATCH v2 1/2] drm_fourcc: Add new P010, P016 video format
On 01/04/2017 06:00 PM, Ayaka wrote: 從我的 iPad 傳送 Daniel Stone於 2017年1月5日 上午1:02 寫道: Hi Randy, On 4 January 2017 at 16:29, Randy Li wrote: index 90d2cc8..23c8e99 100644 --- a/drivers/gpu/drm/drm_fourcc.c +++ b/drivers/gpu/drm/drm_fourcc.c @@ -165,6 +165,9 @@ const struct drm_format_info *__drm_format_info(u32 format) { .format = DRM_FORMAT_UYVY,.depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, { .format = DRM_FORMAT_VYUY,.depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, { .format = DRM_FORMAT_AYUV,.depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, + /* FIXME a pixel in Y for P010 is 10 bits */ + { .format = DRM_FORMAT_P010,.depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 2 }, It seems like P010 stores each Y component in a 16-bit value, with the bottom 6 bits ignored. So I think cpp here should be 2. No, the rest bits are used to store the next pixel. The P010 is just a 10 bits color depth pixel format. The reviewer is correct. In P010 and P016 the memory layout is identical as the luma and each Chroma channel are stored as words. .cpp = { 2, 4, 0 } for both P010 and P016. -Clint Cheers, Daniel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 1/2] drm_fourcc: Add new P010, P016 video format
å¾æç iPad å³é > Daniel Stone æ¼ 2017å¹´1æ5æ¥ ä¸å1:02 > 寫éï¼ > > Hi Randy, > >> On 4 January 2017 at 16:29, Randy Li wrote: >> index 90d2cc8..23c8e99 100644 >> --- a/drivers/gpu/drm/drm_fourcc.c >> +++ b/drivers/gpu/drm/drm_fourcc.c >> @@ -165,6 +165,9 @@ const struct drm_format_info *__drm_format_info(u32 >> format) >>{ .format = DRM_FORMAT_UYVY,.depth = 0, >> .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, >>{ .format = DRM_FORMAT_VYUY,.depth = 0, >> .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, >>{ .format = DRM_FORMAT_AYUV,.depth = 0, >> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, >> + /* FIXME a pixel in Y for P010 is 10 bits */ >> + { .format = DRM_FORMAT_P010,.depth = 0, >> .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 2 }, > > It seems like P010 stores each Y component in a 16-bit value, with the > bottom 6 bits ignored. So I think cpp here should be 2. No, the rest bits are used to store the next pixel. The P010 is just a 10 bits color depth pixel format. > > Cheers, > Daniel
[PATCH v2 1/2] drm_fourcc: Add new P010, P016 video format
P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per channel video format. Rockchip's vop support this video format(little endian only) as the input video format. P016 is a planar 4:2:0 YUV with interleaved UV plane, 16 bits per channel video format. Signed-off-by: Randy Li drm --- drivers/gpu/drm/drm_fourcc.c | 3 +++ include/uapi/drm/drm_fourcc.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c index 90d2cc8..23c8e99 100644 --- a/drivers/gpu/drm/drm_fourcc.c +++ b/drivers/gpu/drm/drm_fourcc.c @@ -165,6 +165,9 @@ const struct drm_format_info *__drm_format_info(u32 format) { .format = DRM_FORMAT_UYVY,.depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, { .format = DRM_FORMAT_VYUY,.depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, { .format = DRM_FORMAT_AYUV,.depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, + /* FIXME a pixel in Y for P010 is 10 bits */ + { .format = DRM_FORMAT_P010,.depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 2 }, + { .format = DRM_FORMAT_P016,.depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2 }, }; unsigned int i; diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 9e1bb7f..ecc2e05e5 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -119,6 +119,8 @@ extern "C" { #define DRM_FORMAT_NV61fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */ #define DRM_FORMAT_NV24fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */ #define DRM_FORMAT_NV42fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ +#define DRM_FORMAT_P010fourcc_code('P', '0', '1', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel */ +#define DRM_FORMAT_P016fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ /* * 3 plane YCbCr -- 2.7.4
[PATCH v2 1/2] drm_fourcc: Add new P010, P016 video format
Hi Randy, On 4 January 2017 at 16:29, Randy Li wrote: > index 90d2cc8..23c8e99 100644 > --- a/drivers/gpu/drm/drm_fourcc.c > +++ b/drivers/gpu/drm/drm_fourcc.c > @@ -165,6 +165,9 @@ const struct drm_format_info *__drm_format_info(u32 > format) > { .format = DRM_FORMAT_UYVY,.depth = 0, > .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, > { .format = DRM_FORMAT_VYUY,.depth = 0, > .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, > { .format = DRM_FORMAT_AYUV,.depth = 0, > .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, > + /* FIXME a pixel in Y for P010 is 10 bits */ > + { .format = DRM_FORMAT_P010,.depth = 0, > .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 2 }, It seems like P010 stores each Y component in a 16-bit value, with the bottom 6 bits ignored. So I think cpp here should be 2. Cheers, Daniel