Re: [PATCH v2 7/9] drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650

On Tue, Apr 21, 2020 at 07:41:25PM -0400, Jonathan Marek wrote: > Update the gmu_pdc registers for A640 and A650. > > Some of the RSCC registers on A650 are in a separate region. > > Note this also changes the address of these registers: > > RSCC_TCS1_DRV0_STATUS > RSCC_TCS2_DRV0_STATUS > RSCC_T

[PATCH v2 7/9] drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650

Update the gmu_pdc registers for A640 and A650. Some of the RSCC registers on A650 are in a separate region. Note this also changes the address of these registers: RSCC_TCS1_DRV0_STATUS RSCC_TCS2_DRV0_STATUS RSCC_TCS3_DRV0_STATUS Based on the values in msm-4.14 and msm-4.19 kernels. Signed-off