Re: [PATCH v3 05/10] drm/i915: Prepare for multiple gts

2021-11-10 Thread Stimson, Dale B
[Redundant sending of this email due to some mail issues] On 2021-10-28 20:28:12, Matt Roper wrote: > From: Tvrtko Ursulin > > Add some basic plumbing to support more than one dynamically allocated > struct intel_gt. Up to four gts are supported in i915->gts[], with slot > zero shadowing the

Re: [PATCH v3 05/10] drm/i915: Prepare for multiple gts

2021-11-10 Thread Andi Shyti
Hi, > > +#define for_each_gt(i915__, id__, gt__) \ > > + for ((id__) = 0; \ > > +(id__) < I915_MAX_TILES; \ > > +(id__)++) \ > > + for_each_if(((gt__) = (i915__)->gts[(id__)])) > > In this patch set, symbol I915_MAX_TILES is introduced. > In a later patch set of this

Re: [Intel-gfx] [PATCH v3 05/10] drm/i915: Prepare for multiple gts

2021-11-02 Thread Andi Shyti
Hi Tvrtko, > > > > [...] > > > > > > > > >static int > > > > >intel_gt_tile_setup(struct intel_gt *gt, unsigned int id, > > > > > phys_addr_t phys_addr) > > > > > > > > we don't actually need 'id', it's gt->info.id. It's introduced in > > > > patch 3 with the value '0' but it's not

Re: [Intel-gfx] [PATCH v3 05/10] drm/i915: Prepare for multiple gts

2021-11-02 Thread Tvrtko Ursulin
On 02/11/2021 11:26, Andi Shyti wrote: Hi Tvrtko, [...] static int intel_gt_tile_setup(struct intel_gt *gt, unsigned int id, phys_addr_t phys_addr) we don't actually need 'id', it's gt->info.id. It's introduced in patch 3 with the value '0' but it's not needed. I have a

Re: [Intel-gfx] [PATCH v3 05/10] drm/i915: Prepare for multiple gts

2021-11-02 Thread Andi Shyti
Hi Tvrtko, > > [...] > > > > > static int > > > intel_gt_tile_setup(struct intel_gt *gt, unsigned int id, phys_addr_t > > > phys_addr) > > > > we don't actually need 'id', it's gt->info.id. It's introduced in > > patch 3 with the value '0' but it's not needed. > > I have a suspicion code

Re: [Intel-gfx] [PATCH v3 05/10] drm/i915: Prepare for multiple gts

2021-11-02 Thread Tvrtko Ursulin
On 01/11/2021 23:11, Andi Shyti wrote: Hi Matt and Tvrtko, [...] static int intel_gt_tile_setup(struct intel_gt *gt, unsigned int id, phys_addr_t phys_addr) we don't actually need 'id', it's gt->info.id. It's introduced in patch 3 with the value '0' but it's not needed. I have a

Re: [PATCH v3 05/10] drm/i915: Prepare for multiple gts

2021-11-01 Thread Andi Shyti
Hi Matt and Tvrtko, [...] > static int > intel_gt_tile_setup(struct intel_gt *gt, unsigned int id, phys_addr_t > phys_addr) we don't actually need 'id', it's gt->info.id. It's introduced in patch 3 with the value '0' but it's not needed. > { > + struct drm_i915_private *i915 =

[PATCH v3 05/10] drm/i915: Prepare for multiple gts

2021-10-28 Thread Matt Roper
From: Tvrtko Ursulin Add some basic plumbing to support more than one dynamically allocated struct intel_gt. Up to four gts are supported in i915->gts[], with slot zero shadowing the existing i915->gt to enable source compatibility with legacy driver paths. A for_each_gt macro is added to