Re: [RESEND PATCHv2 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-02-27 Thread Jani Nikula
On Tue, 14 Feb 2023, Arun R Murthy wrote: > Enable SDP error detection configuration, this will set CRC16 in > 128b/132b link layer. > For Display version 13 a hardware bit31 in register VIDEO_DIP_CTL is > added to enable/disable SDP CRC applicable for DP2.0 only, but the > default value of this

[RESEND PATCHv2 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-02-14 Thread Arun R Murthy
Enable SDP error detection configuration, this will set CRC16 in 128b/132b link layer. For Display version 13 a hardware bit31 in register VIDEO_DIP_CTL is added to enable/disable SDP CRC applicable for DP2.0 only, but the default value of this bit will enable CRC16 in 128b/132b hence skipping

Re: [RESEND PATCHv2 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-01-26 Thread Jani Nikula
On Fri, 20 Jan 2023, Arun R Murthy wrote: > Enable SDP error detection configuration, this will set CRC16 in > 128b/132b link layer. > For Display version 13 a hardware bit31 in register VIDEO_DIP_CTL is > added to enable/disable SDP CRC applicable for DP2.0 only, but the > default value of this

[RESEND PATCHv2 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-01-19 Thread Arun R Murthy
Enable SDP error detection configuration, this will set CRC16 in 128b/132b link layer. For Display version 13 a hardware bit31 in register VIDEO_DIP_CTL is added to enable/disable SDP CRC applicable for DP2.0 only, but the default value of this bit will enable CRC16 in 128b/132b hence skipping

[RESEND PATCHv2 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-01-19 Thread Arun R Murthy
Enable SDP error detection configuration, this will set CRC16 in 128b/132b link layer. For Display version 13 a hardware bit31 in register VIDEO_DIP_CTL is added to enable/disable SDP CRC applicable for DP2.0 only, but the default value of this bit will enable CRC16 in 128b/132b hence skipping