Re: [PATCH] drm/gem: add mutex lock when using drm_gem_mmap_obj

Op 26-06-13 04:14, Seung-Woo Kim schreef: From: YoungJun Cho yj44@samsung.com The drm_gem_mmap_obj() has to be protected with dev-struct_mutex, but some caller functions do not. So it adds mutex lock to missing callers and adds WARN_ON assertion whether drm_gem_mmap_obj() is called with

Re: [PATCH] drm/gem: add mutex lock when using drm_gem_mmap_obj

On Jun 26, 2013 4:13 PM, Maarten Lankhorst maarten.lankho...@canonical.com wrote: Op 26-06-13 04:14, Seung-Woo Kim schreef: From: YoungJun Cho yj44@samsung.com The drm_gem_mmap_obj() has to be protected with dev-struct_mutex, but some caller functions do not. So it adds mutex lock

Re: [PATCH] drm/gem: fix not to assign error value to gem name

On Wed, Jun 26, 2013 at 10:42:39AM +0900, Seung-Woo Kim wrote: From: YoungJun Cho yj44@samsung.com If idr_alloc() is failed, obj-name can be error value. Also it cleans up duplicated flink processing code. You should mention that it is a regression from commit 2e928815c (drm: convert to

Re: [PATCH] drm/gem: fix not to assign error value to gem name

On Jun 26, 2013 5:56 PM, Chris Wilson ch...@chris-wilson.co.uk wrote: On Wed, Jun 26, 2013 at 10:42:39AM +0900, Seung-Woo Kim wrote: From: YoungJun Cho yj44@samsung.com If idr_alloc() is failed, obj-name can be error value. Also it cleans up duplicated flink processing code. You

[PATCH 000/165] radeon drm-next patches

From: Alex Deucher alexander.deuc...@amd.com These are the radeon patches for 3.11. Some of these patches are huge so, it might be easier to review things here: http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.11-wip I'll send a formal pull in request in the next day or two.

[PATCH 001/165] drm/radeon: fix AVI infoframe generation

From: Alex Deucher alexander.deuc...@amd.com - remove adding 2 to checksum, this is incorrect. This was incorrectly introduced in: 92db7f6c860b8190571a9dc1fcbc16d003422fe8 http://lists.freedesktop.org/archives/dri-devel/2011-December/017717.html However, the off by 2 was due to adding the

[PATCH 003/165] drm/radeon: add a reset work handler

From: Alex Deucher alexander.deuc...@amd.com New asics support non-privileged IBs. This allows us to skip IB checking in the driver since the hardware will check the command buffers for us. When using non-privileged IBs, if the CP encounters an illegal register in the command stream, it will

[PATCH 002/165] drm/radeon: add backlight quirk for hybrid mac

From: Alex Deucher alexander.deuc...@amd.com Mac laptops with multiple GPUs apparently use the gmux driver for backlight control. Don't register a radeon backlight interface. We may need to add other pci ids for other hybrid mac laptops. Fixes:

[PATCH 008/165] drm/radeon: Add support for CIK GPU reset (v2)

From: Alex Deucher alexander.deuc...@amd.com v2: split soft reset into compute and gfx. Still need to make reset more fine grained, but this should be a start. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 197

[PATCH 006/165] drm/radeon: adapt to PCI BAR changes on CIK

From: Alex Deucher alexander.deuc...@amd.com register BAR is now at PCI BAR 5. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon_device.c |9 +++-- 1 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_device.c

[PATCH 007/165] drm/radeon: add gpu init support for CIK (v9)

From: Alex Deucher alexander.deuc...@amd.com v2: tiling fixes v3: more tiling fixes v4: more tiling fixes v5: additional register init v6: rebase v7: fix gb_addr_config for KV/KB v8: drop wip KV bits for now, add missing config reg v9: fix cu count on Bonaire Signed-off-by: Alex Deucher

[PATCH 010/165] drm/radeon/cik: stop page faults from hanging the system (v2)

From: Alex Deucher alexander.deuc...@amd.com Redirect invalid memory accesses to the default page instead of locking up the memory controller. v2: rebase on top of 2 level PTs Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 15 +--

[PATCH 011/165] drm/radeon: add initial ucode loading for CIK (v5)

From: Alex Deucher alexander.deuc...@amd.com Currently the driver required 6 sets of ucode: 1. pfp - pre-fetch parser, part of the GFX CP 2. me - micro engine, part of the GFX CP 3. ce - constant engine, part of the GFX CP 4. rlc - interrupt, etc. controller 5. mc - memory controller (discrete

[PATCH 005/165] drm/radeon: add DCE8 macro for CIK

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index f5fccbb..b50a786

[PATCH 016/165] drm/radeon: implement async vm_flush for the CP (v7)

From: Alex Deucher alexander.deuc...@amd.com Update the page table base address and flush the VM TLB using the CP. v2: update for 2 level PTs v3: use new packet for invalidate v4: update SH_MEM* regs when flushing the VM v5: add pfp sync, go back to old style vm TLB invalidate v6: fix hdp flush

[PATCH 004/165] drm/radeon: add CIK chip families

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon_device.c |3 +++ drivers/gpu/drm/radeon/radeon_family.h |3 +++ 2 files changed, 6 insertions(+), 0 deletions(-) diff --git

[PATCH 019/165] drm/radeon/cik: log and handle VM page fault interrupts

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 10 ++ drivers/gpu/drm/radeon/cikd.h |4 2 files changed, 14 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/cik.c

[PATCH 020/165] drm/radeon/cik: add support for sDMA dma engines (v8)

From: Alex Deucher alexander.deuc...@amd.com CIK has new asynchronous DMA engines called sDMA (system DMA). Each engine supports 1 ring buffer for kernel and gfx and 2 userspace queues for compute. TODO: fill in the compute setup. v2: update to the latest reset code v3: remove ib_parse v4: fix

[PATCH 009/165] drm/radeon: add support for MC/VM setup on CIK (v6)

From: Alex Deucher alexander.deuc...@amd.com The vm callbacks are the same as the SI ones right now (same regs and bits). We could share the SI variants, and I may yet do that, but I figured I would add CIK specific ones for now in case we need to change anything. V2: add documentation, minor

[PATCH 023/165] drm/radeon/cik: fill in startup/shutdown callbacks (v4)

From: Alex Deucher alexander.deuc...@amd.com v2: update to latest driver changes v3: properly tear down vm on suspend v4: fix up irq init ordering Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 340 ++ 1 files

[PATCH 014/165] drm/radeon: add IB and fence dispatch functions for CIK gfx (v7)

From: Alex Deucher alexander.deuc...@amd.com For gfx ring only. Compute is still todo. v2: add documentation v3: update to latest reset changes, integrate emit update patch. v4: fix count on wait_reg_mem for HDP flush v5: use old hdp flush method for fence v6: set valid bit for IB v7: cleanup

[PATCH 012/165] drm/radeon: add support mc ucode loading on CIK (v2)

From: Alex Deucher alexander.deuc...@amd.com Load the GDDR5 ucode and train the links. v2: update ucode Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 116 + drivers/gpu/drm/radeon/cikd.h | 16 ++ 2 files

[PATCH 027/165] drm/radeon: handle the integrated thermal controller on CI

From: Alex Deucher alexander.deuc...@amd.com No support for reading the temperature yet. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon.h |1 + drivers/gpu/drm/radeon/radeon_atombios.c |6 ++ 2 files changed, 7 insertions(+), 0

[PATCH 013/165] drm/radeon: Add CP init for CIK (v7)

From: Alex Deucher alexander.deuc...@amd.com Sets up the GFX ring and loads ucode for GFX and Compute. Todo: - handle compute queue setup. v2: add documentation v3: integrate with latest reset changes v4: additional init fixes v5: scratch reg write back no longer supported on CIK v6: properly

[PATCH 018/165] drm/radeon: add support for interrupts on CIK (v5)

From: Alex Deucher alexander.deuc...@amd.com Todo: - handle interrupts for compute queues v2: add documentation v3: update to latest reset code v4: update to latest illegal CP handling v5: fix missing break in interrupt handler switch statement Signed-off-by: Alex Deucher

[PATCH 015/165] drm/radeon: add ring and IB tests for CIK (v3)

From: Alex Deucher alexander.deuc...@amd.com v2: add documenation v3: update the latest ib changes Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 114 ++ 1 files changed, 114 insertions(+), 0 deletions(-) diff

[PATCH 031/165] drm/radeon/dce8: properly handle interlaced timing

From: Alex Deucher alexander.deuc...@amd.com The register bits changed on DCE8 compared to previous families. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/atombios_encoders.c |8 +++- drivers/gpu/drm/radeon/cik_reg.h |3 +++ 2 files

[PATCH 021/165] drm/radeon: implement async vm_flush for the sDMA (v6)

From: Alex Deucher alexander.deuc...@amd.com Update the page table base address and flush the VM TLB using the sDMA. V2: update for 2 level PTs V3: update vm flush V4: update SH_MEM* regs V5: switch back to old style VM TLB invalidate V6: fix packet formatting Signed-off-by: Alex Deucher

[PATCH 022/165] drm/radeon/cik: add support for doing async VM pt updates (v5)

From: Alex Deucher alexander.deuc...@amd.com Async page table updates using the sDMA engine. sDMA has a special packet for updating entries for contiguous pages that reduces overhead. v2: add support for and use the CP for now. v3: update for 2 level PTs v4: rebase, fix DMA packet v5: switch to

[PATCH 017/165] drm/radeon: Add support for RLC init on CIK (v4)

From: Alex Deucher alexander.deuc...@amd.com RLC handles the interrupt controller and other tasks on the GPU. v2: add documentation v3: update programming sequence v4: additional setup Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 142

[PATCH 036/165] drm/radeon: add support pll selection for DCE8 (v4)

From: Alex Deucher alexander.deuc...@amd.com v2: make PPLL0 is available for non-DP on CI v3: rebase changes, update documentation v4: fix kabini Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/atombios_crtc.c | 48 +++- 1 files

[PATCH 026/165] drm/radeon: atombios power table updates (v2)

From: Alex Deucher alexander.deuc...@amd.com v2: further updates Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/atombios.h | 58 ++-- 1 files changed, 54 insertions(+), 4 deletions(-) diff --git

[PATCH 038/165] drm/radeon: use frac fb div on DCE8

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/atombios_crtc.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c

[PATCH 039/165] drm/radeon: add SS override support for KB/KV

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon_atombios.c | 17 + 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c

[PATCH 024/165] drm/radeon: upstream ObjectID.h updates (v2)

From: Alex Deucher alexander.deuc...@amd.com v2: further updates Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/ObjectID.h | 40 + 1 files changed, 40 insertions(+), 0 deletions(-) diff --git

[PATCH 040/165] drm/radeon: Update radeon_info_ioctl for CIK (v2)

From: Alex Deucher alexander.deuc...@amd.com v2: rebase changes, fix a couple missed cases Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon_kms.c | 33 ++--- 1 files changed, 26 insertions(+), 7 deletions(-) diff --git

[PATCH 029/165] drm/radeon/dce8: add support for display watermark setup

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 537 + drivers/gpu/drm/radeon/cikd.h | 11 + 2 files changed, 548 insertions(+), 0 deletions(-) diff --git

[PATCH 041/165] drm/radeon: add get_gpu_clock_counter() callback for cik

From: Alex Deucher alexander.deuc...@amd.com Used for GPU clock counter snapshots. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 21 + drivers/gpu/drm/radeon/cikd.h|4 +++- drivers/gpu/drm/radeon/radeon_asic.h

[PATCH 042/165] drm/radeon: update CIK soft reset

From: Alex Deucher alexander.deuc...@amd.com Update to the newer programming model. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 387 + drivers/gpu/drm/radeon/cikd.h | 12 ++ 2 files changed, 253

[PATCH 028/165] drm/radeon: update power state parsing for CI

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon_atombios.c | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c

[PATCH 030/165] drm/radeon/cik: add hw cursor support (v2)

From: Alex Deucher alexander.deuc...@amd.com CIK (DCE8) hw cursors are programmed the same as evergreen (DCE4) with the following caveats: - cursors are now 128x128 pixels - new alpha blend enable bit v2: rebase Signed-off-by: Alex Deucher alexander.deuc...@amd.com ---

[PATCH 043/165] drm/radeon: add indirect register accessors for SMC registers

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/evergreen_reg.h |4 drivers/gpu/drm/radeon/radeon.h| 17 + 2 files changed, 21 insertions(+), 0 deletions(-) diff --git

[PATCH 035/165] drm/radeon: update DISPCLK programming for DCE8

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/atombios_crtc.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c

[PATCH 033/165] drm/radeon/atom: add DCE8 encoder support

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/atombios_encoders.c | 27 --- drivers/gpu/drm/radeon/radeon_display.c|5 +++-- 2 files changed, 27 insertions(+), 5 deletions(-) diff

[PATCH 044/165] drm/radeon: add get_xclk() callback for CIK

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 22 ++ drivers/gpu/drm/radeon/cikd.h|7 +++ drivers/gpu/drm/radeon/radeon_asic.h |1 + 3 files changed, 30

[PATCH 046/165] drm/radeon: update radeon_atom_get_clock_dividers() for SI

From: Alex Deucher alexander.deuc...@amd.com SI uses v5 of the command table and uses a different table for memory PLLs. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon_atombios.c |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git

[PATCH 034/165] drm/radeon/atom: add support for new DVO tables

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/atombios_encoders.c |9 - 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c

[PATCH 032/165] drm/radeon/dce8: crtc_set_base updates

From: Alex Deucher alexander.deuc...@amd.com Some new fields and DESKTOP_HEIGHT register moved. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/atombios_crtc.c | 34 -- drivers/gpu/drm/radeon/cik_reg.h | 79

[PATCH 048/165] drm/radeon: add UVD support for CIK (v3)

From: Christian König christian.koe...@amd.com v2: agd5f: fix clock dividers setup for bonaire v3: agd5f: rebase Signed-off-by: Christian König christian.koe...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 111

[PATCH 049/165] drm/radeon/cik: add srbm_select function

From: Alex Deucher alexander.deuc...@amd.com Allows us to select instanced registers based on: - ME (micro engine - Pipe - Queue - VMID Switch MC setup to use this new function. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 27

[PATCH 037/165] drm/radeon: Handle PPLL0 powerdown on DCE8

From: Alex Deucher alexander.deuc...@amd.com Only Bonaire has PPLL0. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/atombios_crtc.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c

[PATCH 050/165] drm/radeon: use callbacks for ring pointer handling

From: Alex Deucher alexander.deuc...@amd.com Add callbacks to the radeon_ring struct to handle rptr/wptr fetchs and wptr updates. We currently use one version for all rings, but this allows us to override with a ring specific versions. Needed for compute rings on CIK. Signed-off-by: Alex

[PATCH 052/165] drm/radeon/cik: Add support for compute queues (v2)

From: Alex Deucher alexander.deuc...@amd.com On CIK, the compute rings work slightly differently than on previous asics, however the basic concepts are the same. The main differences: - New MEC engines for compute queues - Multiple queues per MEC: - CI/KB: 1 MEC, 4 pipes per MEC, 8 queues per

[PATCH 045/165] drm/radeon/cik: add pcie_port indirect register accessors

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 21 + drivers/gpu/drm/radeon/cikd.h|3 +++ drivers/gpu/drm/radeon/radeon_asic.c |6 +-

[PATCH 051/165] drm/radeon: implement simple doorbell page allocator

From: Alex Deucher alexander.deuc...@amd.com The doorbell aperture is a PCI BAR whose pages can be mapped to compute resources for things like wptrs for userspace queues. This patch maps the BAR and sets up a simple allocator to allocate pages from the BAR. Signed-off-by: Alex Deucher

[PATCH 053/165] drm/radeon/cik: switch to type3 nop packet for compute rings

From: Alex Deucher alexander.deuc...@amd.com Type 2 packets are deprecated on CIK MEC and we should use type 3 nop packets. Setting the count field to the max value (0x3fff) indicates that only one dword should be skipped like a type 2 packet. Signed-off-by: Alex Deucher

[PATCH 047/165] drm/radeon: update radeon_atom_get_clock_dividers for CIK

From: Alex Deucher alexander.deuc...@amd.com CIK uses a slightly different variant of the table structs and params. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon_atombios.c | 20 +++- drivers/gpu/drm/radeon/radeon_mode.h |3 +++

[PATCH 054/165] drm/radeon: fix up ring functions for compute rings

From: Alex Deucher alexander.deuc...@amd.com The compute rings use RELEASE_MEM rather then EOP packets for writing fences and there is no SYNC_PFP_ME packet on the compute rings. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 53

[PATCH 055/165] drm/radeon/cik: add support for compute interrupts

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 121 -- 1 files changed, 116 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/radeon/cik.c

[PATCH 056/165] drm/radeon/cik: add support for golden register init

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c | 438 ++ 1 files changed, 438 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/cik.c

[PATCH 057/165] drm/radeon: add radeon_asic struct for CIK (v11)

From: Alex Deucher alexander.deuc...@amd.com v2: fix up for latest reset changes v3: use CP for pt updates for now v4: update for 2 level PTs v5: update for ib_parse removal v6: vm_flush api change v7: rebase v8: fix gfx ring function pointers v9: fix vm_set_page function params v10: update for

[PATCH 059/165] drm/radeon: add current Bonaire PCI ids

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- include/drm/drm_pciids.h |8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h index bb1bc48..23f89df 100644 ---

[PATCH 058/165] drm/radeon: add cik tile mode array query

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/cik.c|4 drivers/gpu/drm/radeon/radeon.h |1 + drivers/gpu/drm/radeon/radeon_drv.c |3 ++- drivers/gpu/drm/radeon/radeon_kms.c | 14

[PATCH 061/165] drm/radeon/kms: add accessors for RCU indirect space

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/evergreen.c |6 ++ drivers/gpu/drm/radeon/r600_reg.h |3 +++ drivers/gpu/drm/radeon/radeon.h| 17 + 3 files changed, 22 insertions(+),

[PATCH 060/165] drm/radeon: add current KB pci ids

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- include/drm/drm_pciids.h | 16 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h index 23f89df..34efaf6

[PATCH 062/165] drm/radeon/evergreen: add indirect register accessors for CG registers

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/evergreen_reg.h |3 +++ drivers/gpu/drm/radeon/radeon.h| 17 + 2 files changed, 20 insertions(+), 0 deletions(-) diff --git

[PATCH 063/165] drm/radeon: make get_temperature functions a callback

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon.h |7 ++- drivers/gpu/drm/radeon/radeon_asic.c |8 drivers/gpu/drm/radeon/radeon_asic.h |5 + drivers/gpu/drm/radeon/radeon_pm.c

[PATCH 064/165] drm/radeon: add support for thermal sensor on tn

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/ni.c |8 drivers/gpu/drm/radeon/nid.h |3 +++ drivers/gpu/drm/radeon/radeon_asic.c |1 + drivers/gpu/drm/radeon/radeon_asic.h |1

[PATCH 065/165] drm/radeon/kms: move ucode defines to a separate header

From: Alex Deucher alexander.deuc...@amd.com Avoids confusion and duplication. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/evergreen.c|4 +-- drivers/gpu/drm/radeon/ni.c | 13 + drivers/gpu/drm/radeon/r600.c | 25

Re: [PATCH 0/3] Fix backlight issues on some Windows 8 systems

On mar., 2013-06-25 at 17:08 +0100, Matthew Garrett wrote: On Sat, Jun 22, 2013 at 11:46:39PM +0200, Yves-Alexis Perez wrote: Before Linux support for acpi_osi(Windows 2012) (and when booting with acpi_osi=!Windows 2012), brightness keys were handled by the kernel just fine, whether in

Armada DRM driver on OLPC XO

Hi Russell, Thanks a lot for writing the Armada DRM driver. I have tested it on OLPC XO-1.75 (MMP2 aka Armada610) and OLPC XO-4 (MMP3 aka PXA2128). After a bit of fighting, I have it running. Could you share your X driver, or your methodology for testing hardware cursors? I'd like to test your

Re: [PATCH 0/3] Fix backlight issues on some Windows 8 systems

On mar., 2013-06-25 at 21:54 +0100, Matthew Garrett wrote: On Tue, Jun 25, 2013 at 10:43:57PM +0200, Yves-Alexis Perez wrote: On mar., 2013-06-25 at 17:08 +0100, Matthew Garrett wrote: Right, the kernel has special-casing to hook the backlight keys up to the ACPI backlight control. This

Re: [PATCH 0/3] Fix backlight issues on some Windows 8 systems

On mar., 2013-06-25 at 22:14 +0100, Matthew Garrett wrote: On Tue, Jun 25, 2013 at 11:10:11PM +0200, Yves-Alexis Perez wrote: On mar., 2013-06-25 at 21:54 +0100, Matthew Garrett wrote: I agree, we should standardise the behaviour. And the only way we can standardise the behaviour is to

Re: [PATCH 0/3] Fix backlight issues on some Windows 8 systems

On mar., 2013-06-25 at 22:33 +0100, Matthew Garrett wrote: I was referring to “standardize the behaviour by leaving up to userspace”. A lot of thinkpads (for example) (all the pre-windows 8 ones) have a perfectly working ACPI backlight interface. And this patchset won't alter their

Re: Packard Bell EasyNote LV need i915.invert_brightness=1

[Daniel Vetter] Nah, silence just means that your patch fell through the crack while I've travelled around a bit. Thanks for poking, it's merged now for 3.11 (with cc: stable) to my drm-intel-next-queued branch. I've slightly bikeshedded the patch though for formatting. Right. Thank you.

[PATCH 068/165] drm/radeon/kms: add new asic struct for rv6xx (v3)

From: Alex Deucher alexander.deuc...@amd.com Has a different dpm controller than r600. v2: rebase on gpu reset changes v3: rebase on get_xclk changes Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon_asic.c | 96 -- 1

[PATCH 070/165] drm/radeon/kms: fix up rs780/rs880 display watermark calc for dpm

From: Alex Deucher alexander.deuc...@amd.com calculate the low and high watermarks based on the low and high clocks for the current power state. The dynamic pm hw will select the appropriate watermark based on the internal dpm state. Signed-off-by: Alex Deucher alexander.deuc...@amd.com ---

[PATCH 069/165] drm/radeon/kms: add common dpm infrastructure

From: Alex Deucher alexander.deuc...@amd.com This adds the common dpm (dynamic power management) infrastructure: - dpm callbacks - dpm init/fini/suspend/resume - dpm power state selection No device specific code is enabled yet. Signed-off-by: Alex Deucher alexander.deuc...@amd.com ---

[PATCH 071/165] drm/radeon/kms: fix up 6xx/7xx display watermark calc for dpm

From: Alex Deucher alexander.deuc...@amd.com Calculate the low and high watermarks based on the low and high clocks for the current power state. The dynamic pm hw will select the appropriate watermark based on the internal dpm state. Signed-off-by: Alex Deucher alexander.deuc...@amd.com ---

[PATCH 072/165] drm/radeon/kms: fix up dce4/5 display watermark calc for dpm

From: Alex Deucher alexander.deuc...@amd.com Calculate the low and high watermarks based on the low and high clocks for the current power state. The dynamic pm hw will select the appropriate watermark based on the internal dpm state. Signed-off-by: Alex Deucher alexander.deuc...@amd.com ---

[PATCH 073/165] drm/radeon/kms: fix up dce6 display watermark calc for dpm

From: Alex Deucher alexander.deuc...@amd.com Calculate the low and high watermarks based on the low and high clocks for the current power state. The dynamic pm hw will select the appropriate watermark based on the internal dpm state. Signed-off-by: Alex Deucher alexander.deuc...@amd.com ---

[PATCH 074/165] drm/radeon/kms: add common r600 dpm functions

From: Alex Deucher alexander.deuc...@amd.com These are shared by rs780/rs880, rv6xx, and newer chips. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/Makefile |3 +- drivers/gpu/drm/radeon/r600_dpm.c | 678 +

[PATCH 075/165] drm/radeon/kms: add dpm support for rs780/rs880

From: Alex Deucher alexander.deuc...@amd.com This adds dpm support for rs780/rs880 asics. This includes: - clockgating - dynamic engine clock scaling - dynamic voltage scaling set radeon.dpm=1 to enable it. Signed-off-by: Alex Deucher alexander.deuc...@amd.com ---

[PATCH 067/165] drm/radeon/kms: add atom helper functions for dpm (v3)

From: Alex Deucher alexander.deuc...@amd.com dpm needs access to atombios data and command tables for setup and calculation of a number of parameters. v2: endian fix v3: fix mc reg table bug Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon.h |

[PATCH 082/165] drm/radeon/dpm: let atom control display phy powergating

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/sumo_dpm.c |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c b/drivers/gpu/drm/radeon/sumo_dpm.c index

[PATCH 085/165] drm/radeon: add dpm UVD handling for sumo asics

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/sumo_dpm.c | 55 + drivers/gpu/drm/radeon/sumod.h| 10 +++ 2 files changed, 65 insertions(+), 0 deletions(-) diff --git

[PATCH 083/165] drm/radeon: add dpm UVD handling for r7xx asics

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/rv770_dpm.c | 34 ++ drivers/gpu/drm/radeon/rv770_dpm.h |2 ++ 2 files changed, 36 insertions(+), 0 deletions(-) diff --git

[PATCH 086/165] drm/radeon: add dpm UVD handling for TN asics (v2)

From: Alex Deucher alexander.deuc...@amd.com v2: fix typo noticed by Dan Carpenter Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/ppsmc.h |1 + drivers/gpu/drm/radeon/trinity_dpm.c | 220 ++

[PATCH 084/165] drm/radeon: add dpm UVD handling for evergreen/btc asics

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/btc_dpm.c | 62 ++ drivers/gpu/drm/radeon/btc_dpm.h |4 ++ drivers/gpu/drm/radeon/cypress_dpm.c | 10 +-

[PATCH 087/165] drm/radeon/kms: enable UVD as needed (v9)

From: Alex Deucher alexander.deuc...@amd.com When using UVD, the driver must switch to a special UVD power state. In the CS ioctl, switch to the power state and schedule work to change the power state back, when the work comes up, check if uvd is still busy and if not, switch back to the user

[PATCH 088/165] drm/radeon/dpm: add helpers for extended power tables (v2)

From: Alex Deucher alexander.deuc...@amd.com This data will be needed for dpm on newer asics. v2: fix typo in rebase Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/r600_dpm.c | 179 + drivers/gpu/drm/radeon/r600_dpm.h |

[PATCH 089/165] drm/radeon/dpm: track whether we are on AC or battery

From: Alex Deucher alexander.deuc...@amd.com Driver needs this information to validate power states. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon.h|1 + drivers/gpu/drm/radeon/radeon_pm.c |7 +++ 2 files changed, 8 insertions(+), 0

[PATCH 090/165] drm/radeon/dpm: fixup dynamic state adjust for sumo

From: Alex Deucher alexander.deuc...@amd.com Use a dedicated copy of the current power state since we may have to adjust it on the fly. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/radeon.h|1 + drivers/gpu/drm/radeon/radeon_pm.c | 13 -

[PATCH 091/165] drm/radeon/dpm: fixup dynamic state adjust for TN

From: Alex Deucher alexander.deuc...@amd.com Use a dedicated copy of the current power state since we may have to adjust it on the fly. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/trinity_dpm.c |5 + drivers/gpu/drm/radeon/trinity_dpm.h |1 + 2

[PATCH 092/165] drm/radeon/dpm: fixup dynamic state adjust for btc (v2)

From: Alex Deucher alexander.deuc...@amd.com Use a dedicated copy of the current power state since we may have to adjust it on the fly. v2: fix up redundant state sets Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/btc_dpm.c | 340

[PATCH 094/165] drm/radeon/cayman: update tdp limits in set_power_state

From: Alex Deucher alexander.deuc...@amd.com Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/ni_dpm.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index 635bf04..44016f2

[PATCH 095/165] drm/radeon/dpm/rs780: restructure code

From: Alex Deucher alexander.deuc...@amd.com Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/rs780_dpm.c | 52 ++-- 1 files changed, 32 insertions(+), 20 deletions(-) diff

[PATCH 096/165] drm/radeon/dpm/rv6xx: restructure code

From: Alex Deucher alexander.deuc...@amd.com Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/rv6xx_dpm.c | 115 +-- 1 files changed, 69 insertions(+), 46 deletions(-) diff

[PATCH 098/165] drm/radeon/dpm/evergreen: restructure code

From: Alex Deucher alexander.deuc...@amd.com Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/btc_dpm.c | 13 --- drivers/gpu/drm/radeon/cypress_dpm.c | 62 +

[PATCH 097/165] drm/radeon/dpm/rv7xx: restructure code

From: Alex Deucher alexander.deuc...@amd.com Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher alexander.deuc...@amd.com --- drivers/gpu/drm/radeon/btc_dpm.c |6 ++- drivers/gpu/drm/radeon/cypress_dpm.c |6 ++- drivers/gpu/drm/radeon/rv740_dpm.c |

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