[PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed. Enable bit 12 for programmable header packet. Enable bit 15 for Y cordinate support. v2: (Rodrigo) - move CHICKEN_TRANS_EDP bit set logic right after setup_vsc v3:(Rodrigo) - initialize chicken_trans to CHICKEN_TRANS_BIT12 instead of

[PATCH 07/10] drm/i915/psr: set PSR_MASK bits for deep sleep

Program EDP_PSR_DEBUG_CTL (PSR_MASK) to enable system to go to deep sleep while in psr2.PSR2_STATUS bit 31:28 should report value 8 , if system enters deep sleep state. Also, EDP_FRAMES_BEFORE_SU_ENTRY is set 1 , if not set, flickering is observed on psr2 panel. v2: (Ilia Mirkin) - Remove

[PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed. Enable bit 12 for programmable header packet. Enable bit 15 for Y cordinate support. v2: (Rodrigo) - move CHICKEN_TRANS_EDP bit set logic right after setup_vsc v3:(Rodrigo) - initialize chicken_trans to CHICKEN_TRANS_BIT12 instead of

Re: [PATCH V7 1/4] Documentation/devicetree/bindings: b850v3_lvds_dp

On 04 January, 2017 21:39 CET, Rob Herring wrote: > On Tue, Jan 3, 2017 at 5:34 PM, Peter Senna Tschudin > wrote: > > Hi Rob, > > > > Thank you for the review. > > > > On 03 January, 2017 23:51 CET, Rob Herring wrote: > > > >> On Sun, Jan 01, 2017 at 09:24:29PM +0100, Peter Senna Tschudin

[drm-tip:drm-tip 476/492] include/video/vga.h:22:21: fatal error: asm/vga.h: No such file or directory

: .config.gz Type: application/gzip Size: 42636 bytes Desc: not available URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/48af448f/attachment-0001.gz>

[Bug 99236] System (seems to) completely freeze when interacting with java swing applications.

receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/b271c38e/attachment.html>

[Bug 99195] Random GPU lockup on Fedora 25 Wayland & X sessions with Mobility Radeon HD 5650/5750 Opensource drivers

tps://lists.freedesktop.org/archives/dri-devel/attachments/20170107/20f7ce5c/attachment.html>

[PATCH] drm: add more document for drm_crtc_from_index()

From: Shawn Guo Add a bit more document for function drm_crtc_from_index() to cross link it with drm_crtc_from_index(), and explain that the function is useful in vblank code. While at it, add cross link comment for drm_plane_from_index() as well. Signed-off-by: Shawn Guo

[PATCH v6] drm: allow to use mmuless SoC

Some SoC without MMU have display driver where a drm/kms driver could be implemented. Before doing such kind of thing drm/kms must allow to use mmuless devices. This patch propose to remove MMU configuration flag. For all drivers selecting DRM_TTM add a dependency on MMU. For blackfin

[PATCH v6] drm: allow to use mmuless SoC

On Sat, Jan 7, 2017 at 9:57 AM, Benjamin Gaignard wrote: > Some SoC without MMU have display driver where a drm/kms driver > could be implemented. > > Before doing such kind of thing drm/kms must allow to use mmuless devices. > This patch propose to remove MMU configuration flag. > > For all

[PATCH] rnndb: dsi: Add DSI PHY 14nm domains

Add DSI PHY 14nm domains for DSI PHY common, DSI PHY lane and DSI PLL registers. Used in MSM8996. Signed-off-by: Archit Taneja --- rnndb/dsi/dsi.xml | 128 ++ 1 file changed, 128 insertions(+) diff --git a/rnndb/dsi/dsi.xml

[Bug 99236] System (seems to) completely freeze when interacting with java swing applications.

back to working mesa commit and reproduce the problem with Xephyr now. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/2

[PATCH] drm: fix compilations issues introduced by "drm: allow to use mmuless SoC"

Removing MMU configuration flag from DRM make few automatic build failed when they answer yes to all flags. Add asm/vga.h file on Blackfin architecture to not broke compilation. Signed-off-by: Benjamin Gaignard --- arch/blackfin/include/asm/vga.h | 1 + drivers/gpu/drm/Kconfig

[Bug 99236] System (seems to) completely freeze when interacting with java swing applications.

-devel/attachments/20170107/0bc9f4ba/attachment.html>

[Bug 99236] System (seems to) completely freeze when interacting with java swing applications.

as on moment of freeze). -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/39718364/attachment.html>

[Bug 97116] mpv needs VAAPI_DISABLE_INTERLACE=1 for swdecode -vo vaapi since st/va: add conversion for yv12 to nv12in putimage v2

vel/attachments/20170107/ef410c2d/attachment.html>

[PATCH 00/10] drm/msm/dsi: Dual DSI and 8x96 PHY/PLL support

This set adds 8x96 PHY/PLL with Dual DSI mode supported too. Dual DSI on 8x96 requires the DSI host/manager drivers to propagate some usecase info to the PHY/PLL drivers. Hai Li had worked on some patches in the past to implement this. Tested on 8996 MTP Dual DSI panel, and with a LeMaker panel

[PATCH 01/10] drm/msm/dsi: Don't error if a DSI host doesn't have a device connected

The driver returns an error if a DSI DT node is populated, but no device is connected to it or if the data-lane map isn't present. Ideally, such a DSI node shouldn't be probed at all (i.e, its status should be set to "disabled in DT"), but there isn't any harm in registering the DSI device even if

[PATCH 02/10] drm/msm/dsi: Add 8x96 info in dsi_cfg

Add 8x96 DSI data in dsi_cfg. The downstream kernel's dsi_host driver enables core_mmss_clk. We're seeing some branch clock warnings on 8x96 when enabling this. There doesn't seem to be any negative effect with not enabling this clock, so use it once we figure out why we get the warnings.

[PATCH 03/10] drm/msm/dsi: Add a PHY op that initializes version specific stuff

Create an init() op for dsi_phy which sets up things specific to a given DSI PHY. The dsi_phy driver probe expects every DSI version to get a "dsi_phy_regulator" mmio base. This isn't the case for 8x96. Creating an init() op will allow us to accommodate such differences. Signed-off-by: Archit

[PATCH 05/10] drm/msm/dsi: Pass down use case to PHY

From: Hai Li For some new types of DSI PHY, more settings depend on use cases controlled by DSI manager. This change allows DSI manager to setup PHY with a use case. Signed-off-by: Hai Li Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/dsi/dsi.h | 8 +++

[PATCH 04/10] drm/msm/dsi: Return more timings from PHY to host

From: Hai Li The DSI host is required to configure more timings calculated in PHY. By introducing a shared structure, this change allows more timing information passed from PHY to host. Signed-off-by: Hai Li Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/dsi/dsi.h

[PATCH 07/10] drm/msm/dsi: Move PHY operations out of host

From: Hai Li Since DSI PHY has been a separate platform device, it should not depend on the resources in host to be functional. This change is to trigger PHY operations in manager, instead of host, so that host and PHY can be completely separated. Signed-off-by: Hai Li

[PATCH 09/10] drm/msm/dsi: Add new method to calculate 14nm PHY timings

From: Hai Li The 14nm DSI PHY on 8x96 (called PHY v2 downstream) requires a different set of calculations for computing D-PHY timing params. Create a timing_calc_v2 func for the newer v2 PHYs. Signed-off-by: Hai Li Signed-off-by: Archit Taneja ---

[PATCH 08/10] drm/msm/dsi: Udpate generated headers for 14nm PHY and PLL

Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/dsi/dsi.xml.h | 252 ++ 1 file changed, 252 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h index 4958594..234b3b3 100644 ---

[PATCH 06/10] drm/msm/dsi: Reset both PHYs before clock operation for dual DSI

In case of dual DSI, some registers in PHY1 have been programmed during PLL0 clock's set_rate. The PHY1 reset called by host1 later will silently reset those PHY1 registers. This change is to reset and enable both PHYs before any PLL clock operation. [Originally worked on by Hai Li . Fixed up by

[PATCH 10/10] drm/msm/dsi: Add PHY/PLL for 8x96

Extend the DSI PHY/PLL drivers to support the DSI 14nm PHY/PLL found on 8x96. These are picked up from the downstream driver. The PHY part is similar to the other DSI PHYs. The PLL driver requires some trickery so that one DSI PLL can drive both the DSIs (i.e, dual DSI mode). In the case of dual

[Bug 191281] [drm:amdgpu_ib_ring_tests] *ERROR* amdgpu: failed testing IB on ring 12 (-110)

https://bugzilla.kernel.org/show_bug.cgi?id=191281 --- Comment #2 from fin4478 at hotmail.com --- Created attachment 250711 --> https://bugzilla.kernel.org/attachment.cgi?id=250711=edit dmesg output with RX460 I have same errors with Gigabyte RX460 and

[Bug 99309] [radeonsi]glsl: Override the # of varying slots for ClipDistance and TessLevel*. broke chromium browser

-- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/f79360f8/attachment.html>

[Bug 99310] Ubuntu 16.04/16.10 AMD Radeonsi - wrong colors (oibaf ppa) in XFCE and eog.

- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/b9e1846d/attachment.html>

[Bug 99309] [radeonsi]glsl: Override the # of varying slots for ClipDistance and TessLevel*. broke chromium browser

art -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/990ae63d/attachment.html>

[Bug 99310] Ubuntu 16.04/16.10 AMD Radeonsi - wrong colors (oibaf ppa) in XFCE and eog.

-- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/bd340945/attachment.html>

[Bug 99311] [regression, radeonsi] Updating to 1edc53a66b breaks SDDM (white screen on launch)

eiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/125656f2/attachment-0001.html>

[Bug 99312] Long-running OpenCL kernels cause ring stalls and GPU lockups on Kabini

: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/e535d42f/attachment.html>

[Bug 99312] Long-running OpenCL kernels cause ring stalls and GPU lockups on Kabini

: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/0d663827/attachment.html>

[Bug 99312] Long-running OpenCL kernels cause ring stalls and GPU lockups on Kabini

-- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/ee8e21a6/attachment.html>

[Bug 99261] Kernel 4.10-rc2 on APU with Kaveri + Topaz : boot hangs on switch to amdgpudrmfb

because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/0fcb1660/attachment.html>

[Bug 99313] A few amdgpu errors with kernel 4.10-rc2 (Kaveri + Topaz)

You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/a1e53754/attachment-0001.html>

[Bug 99313] A few amdgpu errors with kernel 4.10-rc2 (Kaveri + Topaz)

part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/0f94d139/attachment.html>

[Intel-gfx] [PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

On Sat, Jan 07, 2017 at 11:42:04PM +0530, vathsala nagaraju wrote: > As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 > must be programmed. > Enable bit 12 for programmable header packet. > Enable bit 15 for Y cordinate support. > > v2: (Rodrigo) > - move CHICKEN_TRANS_EDP bit set logic right after

[Bug 80419] XCOM: Enemy Unknown Causes lockup

was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/ce3d8e41/attachment.html>

[Bug 80419] XCOM: Enemy Unknown Causes lockup

tps://lists.freedesktop.org/archives/dri-devel/attachments/20170107/f97b3a68/attachment.html>

[Bug 99316] Radeon crash when laptop on AC power

bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/4cbd851b/attachment.html>

[Bug 99316] Radeon crash when laptop on AC power

URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/748a54eb/attachment-0001.html>

[Bug 99309] [radeonsi]glsl: Override the # of varying slots for ClipDistance and TessLevel*. broke chromium browser

are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/e8d29755/attachment.html>

[Bug 99316] Radeon crash when laptop on AC power

;https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/aae8f6e2/attachment.html>

[Bug 99316] Radeon crash when laptop on AC power

was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/aff701b7/attachment.html>

[Bug 99261] Kernel 4.10-rc2 on APU with Kaveri + Topaz : boot hangs on switch to amdgpudrmfb

|RESOLVED -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/5642cd1d/attachment.html>

[Bug 99311] [regression, bisected, core] Updating to 1edc53a66b breaks SDDM (white screen on launch)

ain. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/a1fcc2d2/attachment.html>

[Bug 99309] [radeonsi]glsl: Override the # of varying slots for ClipDistance and TessLevel*. broke chromium browser

next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/db9f3870/attachment-0001.html>

[Bug 99309] [radeonsi]glsl: Override the # of varying slots for ClipDistance and TessLevel*. broke chromium browser

|RESOLVED -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20170107/6cf28b6f/attachment.html>

[PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed. Enable bit 12 for programmable header packet. Enable bit 15 for Y cordinate support. v2: (Rodrigo) - move CHICKEN_TRANS_EDP bit set logic right after setup_vsc v3:(Rodrigo) - initialize chicken_trans to CHICKEN_TRANS_BIT12 instead of

[PATCH] drm/vc4: Fix memory leak of the CRTC state.

Hi Eric, could you please resend this patch [1], because it's still not applied in Linux 4.10-rc2. Thanks Stefan [1] - https://patchwork.kernel.org/patch/9369793/