On Thu, Aug 26, 2021 at 03:51:29PM -0400, Alex Deucher wrote:
> On Wed, Aug 25, 2021 at 12:20 PM Kees Cook wrote:
> >
> > In preparation for FORTIFY_SOURCE performing compile-time and run-time
> > field bounds checking for memcpy(), memmove(), and memset(), avoid
> > intentionally writing across
On Tue, Aug 24, 2021 at 10:26 PM Guenter Roeck wrote:
>
> Hi Claire,
>
> On Thu, Jun 24, 2021 at 11:55:24PM +0800, Claire Chang wrote:
> > Add the initialization function to create restricted DMA pools from
> > matching reserved-memory nodes.
> >
> > Regardless of swiotlb setting, the restricted
Hi, Bjorn,
On Thu, Aug 26, 2021 at 4:17 AM Bjorn Helgaas wrote:
>
> On Fri, Aug 20, 2021 at 06:08:23PM +0800, Huacai Chen wrote:
> > My original work is at [1].
> >
> > Bjorn do some rework and extension in V2. It moves the VGA arbiter to
> > the PCI subsystem, fixes a few nits, and breaks a few
On 8/25/2021 8:23 PM, Matthew Brost wrote:
A small race that could result in incorrect accounting of the number
of outstanding G2H. Basically prior to this patch we did not increment
the number of outstanding G2H if we encoutered a GT reset while sending
a H2G. This was incorrect as the
Quoting Bjorn Andersson (2021-08-25 16:42:31)
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index 2c7de43f655a..4a6132c18e57 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -78,6 +78,8 @@ struct
In preparation for FORTIFY_SOURCE performing compile-time and run-time
field bounds checking for memcpy(), memmove(), and memset(), avoid
intentionally writing across neighboring fields.
The "Board Parameters" members of the structs:
struct atom_smc_dpm_info_v4_5
struct
On Wed, Aug 25, 2021 at 12:20 PM Kees Cook wrote:
>
> In preparation for FORTIFY_SOURCE performing compile-time and run-time
> field bounds checking for memcpy(), memmove(), and memset(), avoid
> intentionally writing across neighboring fields.
>
> The "Board Parameters" members of the structs:
>
On 8/25/2021 8:23 PM, Matthew Brost wrote:
When the GuC does a media reset, it copies a golden context state back
into the corrupted context's state. The address of the golden context
and the size of the engine state restore are passed in via the GuC ADS.
The i915 had a bug where it passed in
On 8/25/2021 8:23 PM, Matthew Brost wrote:
If the context is reset as a result of the request cancellation the
context reset G2H is received after schedule disable done G2H which is
the wrong order. The schedule disable done G2H release the waiting
request cancellation code which resubmits
On 8/25/2021 8:23 PM, Matthew Brost wrote:
Move GuC management fields in context under guc_active struct as this is
where the lock that protects theses fields lives. Also only set guc_prio
field once during context init.
v2:
(Daniele)
- set CONTEXT_SET_INIT
Signed-off-by: Matthew Brost
Hi Amanoel
Am 25.08.21 um 21:12 schrieb Amanoel Dawod:
No problem, managed to boot directly into a text terminal and grabbed DRM
related dmesg log.
Hopefully it's what you're looking for :)
Find it attached please.
Thanks, this was helpful. The failure is shown at
[3.263394]
On Thu, Aug 26, 2021 at 12:56:26PM +0200, Greg Kroah-Hartman wrote:
> On Thu, Aug 26, 2021 at 11:13:43AM +0200, Daniel Vetter wrote:
> > dri-devel is the main user, and somehow there's been the assumption
> > that component stuff is unmaintained.
> >
> > References:
> >
Hi,
On Tue, Aug 24, 2021 at 6:12 PM Philip Chen wrote:
>
> Reorg the macros as follows:
> (1) Group the registers on the same page together.
> (2) Group the register and its bit operation together while indenting
> the macros of the bit operation with one space.
>
> Also fix a misnomer for the
Hi,
On Mon, Jul 26, 2021 at 4:15 PM Bjorn Andersson
wrote:
>
> +static int dp_parser_find_panel(struct dp_parser *parser)
> +{
> + struct device_node *np = parser->pdev->dev.of_node;
> + int rc;
> +
> + rc = drm_of_find_panel_or_bridge(np, 2, 0, >drm_panel, NULL);
> + if
Hi Ville,
> > > ef79d62b5ce5 ("drm/i915: Encapsulate dbuf state handling harder")
> > >
> > > With that commit the display is not detected anymore, one commit
> > > before that it still works. So this one seems to be broken.
> > >
> > > Ville, Stanislav, any idea how to fix this?
> > >
> > >
On 2021-08-26 16:17, Lucas Stach wrote:
Am Donnerstag, dem 26.08.2021 um 16:00 +0100 schrieb Robin Murphy:
On 2021-08-26 13:10, Michael Walle wrote:
The DMA configuration of the virtual device is inherited from the first
actual etnaviv device. Unfortunately, this doesn't work with an IOMMU:
[
Applied. Thanks!
Alex
On Tue, Aug 24, 2021 at 1:52 AM CGEL wrote:
>
> From: Jing Yangyang
>
> ./drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c:112:9-10:WARNING:
> return of 0/1 in function 'dcn31_is_panel_backlight_on'
> with return type bool
>
>
Hi Jing,
> -Original Message-
> From: Chrisanthus, Anitha
> Sent: Monday, August 23, 2021 4:25 PM
> To: jing yangyang
> Cc: Dea, Edmund J ; David Airlie ;
> Daniel Vetter ; dri-devel@lists.freedesktop.org; linux-
> ker...@vger.kernel.org; jing yangyang ; Zeal
> Robot
> Subject: RE:
Attached quick patch for per job TTL calculation to make more precises
next timer expiration. It's on top of the patch in this thread. Let me
know if this makes sense.
Andrey
On 2021-08-26 10:03 a.m., Andrey Grodzovsky wrote:
On 2021-08-26 12:55 a.m., Monk Liu wrote:
issue:
in cleanup_job
Hi Linus,
Last set of fixes for 5.14, nothing major a couple of i915, couple of
imx and a few amdgpu. All pretty small.
Dave.
drm-fixes-2021-08-27:
drm fixes for 5.14-rc8/final
i915:
- Fix syncmap memory leak
- Drop redundant display port debug print
amdgpu:
- Fix for pinning display buffers
The pull request you sent on Fri, 27 Aug 2021 11:33:10 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2021-08-27
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/77dd11439b86e3f7990e4c0c9e0b67dca82750ba
Thank you!
--
Deet-doot-dot, I am a bot.
On Thu, 2021-08-26 at 14:11 +0300, Jani Nikula wrote:
> On Wed, 25 Aug 2021, Jani Nikula wrote:
> > On Thu, 19 Aug 2021, Ville Syrjälä wrote:
> > > On Fri, Aug 13, 2021 at 01:43:20PM +0300, Jani Nikula wrote:
> > > > Extend the use of extended receiver cap at 0x2200 to cover
> > > >
Hi,
On Wed, Aug 25, 2021 at 6:31 PM Stephen Boyd wrote:
>
> Quoting Bjorn Andersson (2021-07-26 16:13:51)
> > eDP panels might need some power sequencing and backlight management,
> > so make it possible to associate a drm_panel with a DP instance and
> > prepare and enable the panel
Am 2021-08-25 um 2:24 p.m. schrieb Sierra Guiza, Alejandro (Alex):
>
> On 8/25/2021 2:46 AM, Christoph Hellwig wrote:
>> On Tue, Aug 24, 2021 at 10:48:17PM -0500, Alex Sierra wrote:
>>> } else {
>>> - if (!(migrate->flags & MIGRATE_VMA_SELECT_SYSTEM))
>>> + if
On 8/25/2021 20:23, Matthew Brost wrote:
When the GuC does a media reset, it copies a golden context state back
into the corrupted context's state. The address of the golden context
and the size of the engine state restore are passed in via the GuC ADS.
The i915 had a bug where it passed in the
On Thu, Aug 26, 2021 at 04:09:59PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 8/25/2021 8:23 PM, Matthew Brost wrote:
> > A small race that could result in incorrect accounting of the number
> > of outstanding G2H. Basically prior to this patch we did not increment
> > the number of
Quoting Bjorn Andersson (2021-08-25 16:42:31)
> Based on the removal of the g_dp_display and the movement of the
> priv->dp lookup into the DP code it's now possible to have multiple
> DP instances.
>
> In line with the other controllers in the MSM driver, introduce a
> per-compatible list of base
Quoting Bjorn Andersson (2021-08-25 16:42:33)
> The sc8180x has 2 DP and 1 eDP controllers, add support for these to the
> DP driver.
>
> Signed-off-by: Bjorn Andersson
> ---
Reviewed-by: Stephen Boyd
On Mon, 26 Jul 2021, Matthew Brost wrote:
> From: John Harrison
>
> Changing the reset module parameter has no effect on a running GuC.
> The corresponding entry in the ADS must be updated and then the GuC
> informed via a Host2GuC message.
>
> The new debugfs interface to module parameters
On 8/22/21 6:19 PM, Jim Cromie wrote:
> This patchset does 3 main things.
>
> Adds DEFINE_DYNAMIC_DEBUG_CATEGORIES to define bitmap => category
> control of pr_debugs, and to create their sysfs entries.
>
> Uses it in amdgpu, i915 to control existing pr_debugs according to
> their ad-hoc
On 8/22/21 6:19 PM, Jim Cromie wrote:
> Add a const void* data member to the struct, to allow attaching
> private data that will be used soon by a setter method (via kp->data)
> to perform more elaborate actions.
>
> To attach the data at compile time, add new macros:
>
>
On 8/22/21 6:20 PM, Jim Cromie wrote:
> DEFINE_DYNAMIC_DEBUG_CATEGORIES(name, var, bitmap_desc, @bit_descs)
> allows users to define a drm.debug style (bitmap) sysfs interface, and
> to specify the desired mapping from bits[0-N] to the format-prefix'd
> pr_debug()s to be controlled.
>
>
Using the I915_MMAP_TYPE_FIXED mmap type requires the TTM backend, so
for that mmap type, use __i915_gem_object_create_user() instead of
i915_gem_object_create_internal(), as we really want to tests objects
mmap-able by user-space.
This also means that the out-of-space error happens at object
On Fri, Aug 20, 2021 at 09:20:42AM +0200, Christian König wrote:
> No, that perfectly works for me.
>
> The problem we used to have with this approach was that we potentially have
> multiple timeouts at the same time.
>
> But when we serialize the timeout handling by using a single workqueue as
From: Guangming Cao
When mapping the memory represented by a dma-buf into a device's
address space, it might be desireable to map the memory with
certain DMA attributes. Thus, introduce the dma_mapping_attrs
field in the dma_buf_attachment structure so that when
the memory is mapped with
On 2021.08.19 17:43:43 +0300, Joonas Lahtinen wrote:
> Quoting Zhenyu Wang (2021-08-19 11:29:29)
> > On 2021.08.17 13:22:03 +0800, Zhenyu Wang wrote:
> > > > On 2021.08.16 19:34:58 +0200, Christoph Hellwig wrote:
> > > > > Any updates on this? I'd really hate to miss this merge window.
> > > >
>
Pinned contexts, like the migrate contexts need reset after resume
since their context image may have been lost. Also the GuC needs to
register pinned contexts.
Add a list to struct intel_engine_cs where we add all pinned contexts on
creation, and traverse that list at __engine_unpark() time to
Quoting Bjorn Andersson (2021-08-25 16:42:29)
> As the Qualcomm DisplayPort driver only supports a single instance of
> the driver the commonly used struct dp_display is kept in a global
> variable. As we introduce additional instances this obviously doesn't
> work.
>
> Replace this with a
On Thu, Aug 19, 2021 at 11:25:09AM -0400, Andrey Grodzovsky wrote:
>
> On 2021-08-19 5:30 a.m., Daniel Vetter wrote:
> > On Wed, Aug 18, 2021 at 10:51:00AM -0400, Andrey Grodzovsky wrote:
> > > On 2021-08-18 10:42 a.m., Daniel Vetter wrote:
> > > > On Wed, Aug 18, 2021 at 10:36:32AM -0400, Andrey
On 2021.08.20 12:56:34 -0700, Luis Chamberlain wrote:
> On Fri, Aug 20, 2021 at 04:17:24PM +0200, Christoph Hellwig wrote:
> > On Thu, Aug 19, 2021 at 04:29:29PM +0800, Zhenyu Wang wrote:
> > > I'm working on below patch to resolve this. But I met a weird issue in
> > > case when building i915 as
Quoting Bjorn Andersson (2021-08-25 16:42:30)
> Functions in the DisplayPort code that relates to individual instances
> (encoders) are passed both the struct msm_dp and the struct drm_encoder. But
> in a situation where multiple DP instances would exist this means that
> the caller need to
On Wed, Aug 25, 2021 at 04:03:43PM +, Vivi, Rodrigo wrote:
> On Tue, 2021-08-24 at 18:48 +0200, Hans de Goede wrote:
> > Hi,
> >
> > On 8/24/21 10:45 AM, Jani Nikula wrote:
> > > On Fri, 20 Aug 2021, Hans de Goede wrote:
> > > > Hello drm-misc and drm-intel maintainers,
> > > >
> > > > My
On 25/08/2021 16:33, Alyssa Rosenzweig wrote:
> Use upper_32_bits/lower_32_bits helpers instead of open-coding them.
> This is easier to scan quickly compared to bitwise manipulation, and it
> is pleasingly symmetric. I noticed this when debugging lock_region,
> which had a particularly "creative"
On Tue, Aug 24, 2021 at 10:12:24AM +0200, Christian König wrote:
> Just a gentle ping. Daniel any more comments on this?
Still haven't seen a patch set to nuke the sw_sync igt tests. Otherwise
this is just going to cause fails and reboots in our ci (we reboot on
taints).
> I'm not sure if the
Hi Dave & Daniel -
Some pretty straightforward fixes for the merge window.
drm-intel-next-fixes-2021-08-26:
drm/i915 fixes for v5.15-rc1:
- Disable underrun recovery with eDP MSO panels on ADL-P
- Use designated initializers for init/exit table
- Fix some error pointer usages
BR,
Jani.
The
On 2021.08.20 16:17:24 +0200, Christoph Hellwig wrote:
> On Thu, Aug 19, 2021 at 04:29:29PM +0800, Zhenyu Wang wrote:
> > I'm working on below patch to resolve this. But I met a weird issue in
> > case when building i915 as module and also kvmgt module, it caused
> > busy wait on
On Mon, Aug 23, 2021 at 01:15:20PM +0200, Thomas Hellström wrote:
> On Mon, 2021-08-23 at 13:05 +0200, Christian König wrote:
> > Adding Thomas on CC as well.
> >
> > Just a gentle ping. I think the patch set makes sense now.
> >
> > Regards,
> > Christian.
> >
> > Am 28.07.21 um 15:05 schrieb
Hi Andrzej,
On Mon, Aug 23, 2021 at 06:32:11PM +0200, Andrzej Hajda wrote:
> Hi Maxime,
>
> On 23.08.2021 10:47, Maxime Ripard wrote:
>
> > Interactions between bridges, panels, MIPI-DSI host and the component
> > framework are not trivial and can lead to probing issues when
> > implementing a
dri-devel is the main user, and somehow there's been the assumption
that component stuff is unmaintained.
References:
https://lore.kernel.org/dri-devel/CAAEAJfDWOzCJxZFNtxeT7Cvr2pWbYrfz-YnA81sVNs-rM=8...@mail.gmail.com/
Cc: Ezequiel Garcia
Cc: Greg Kroah-Hartman
Cc: "Rafael J. Wysocki"
On Thu, Aug 19, 2021 at 03:44:53PM +0200, Maxime Ripard wrote:
> The drm_helper_hpd_irq_event() function is iterating over all the
> connectors when an hotplug event is detected.
>
> During that iteration, it will call each connector detect function and
> figure out if its status changed.
>
>
On Thu, Aug 26, 2021 at 10:01:16AM +0800, Desmond Cheong Zhi Xi wrote:
> drm_master_release can be called on a drm_file without a master, which
> results in a null ptr dereference of file_priv->master->magic_map. The
> three cases are:
>
> 1. Error path in drm_open_helper
> drm_open():
>
On Thu, Aug 26, 2021 at 10:01:18AM +0800, Desmond Cheong Zhi Xi wrote:
> In a future patch, a read lock on drm_device.master_rwsem is
> held in the ioctl handler before the check for ioctl
> permissions. However, this inverts the lock hierarchy of
> drm_global_mutex --> master_rwsem.
>
> To avoid
From: Tvrtko Ursulin
When a non-persistent context exits we currently mark it as banned in
order to trigger fast termination of any outstanding GPU jobs it may have
left running.
In doing so we apply a very strict 1ms limit in which the left over job
has to preempt before we issues an engine
On 26/08/2021 04:49, Matthew Brost wrote:
On Wed, Aug 25, 2021 at 11:39:10AM +0100, Tvrtko Ursulin wrote:
On 27/07/2021 01:23, Matthew Brost wrote:
When using GuC submission, if a context gets banned disable scheduling
and mark all inflight requests as complete.
Cc: John Harrison
Am Fr., 20. Aug. 2021 um 22:18 Uhr schrieb Lucas Stach :
>
> When we forcefully evict a mapping from the the address space and thus the
> MMU context, the MMU context is leaked, as the mapping no longer points to
> it, so it doesn't get freed when the GEM object is destroyed. Add the
> mssing
On 26/08/2021 04:23, Matthew Brost wrote:
Add a cancel request selftest that results in an engine reset to cancel
the request as it is non-preemptable. Also insert a NOP request after
the cancelled request and confirm that it completely successfully.
Which patch fixes a problem this exposes
Originally drm_sched_job_init was the point of no return, after which
drivers really should submit a job. I've split that up, which allows
us to fix this issue pretty easily.
Only thing we have to take care of is to not skip to error paths after
that. Other drivers do this the same for out-fence
On Thu, Aug 26, 2021 at 10:01:17AM +0800, Desmond Cheong Zhi Xi wrote:
> drm_device.master_mutex currently protects the following:
> - drm_device.master
> - drm_file.master
> - drm_file.was_master
> - drm_file.is_master
> - drm_master.unique
> - drm_master.unique_len
> - drm_master.magic_map
>
>
Am 26.08.21 um 10:49 schrieb Daniel Vetter:
On Mon, Aug 23, 2021 at 01:15:20PM +0200, Thomas Hellström wrote:
On Mon, 2021-08-23 at 13:05 +0200, Christian König wrote:
Adding Thomas on CC as well.
Just a gentle ping. I think the patch set makes sense now.
Regards,
Christian.
Am 28.07.21
On Sun, Aug 22, 2021 at 02:57:15PM -0300, Ezequiel Garcia wrote:
> On Sun, 22 Aug 2021 at 13:50, Daniel Vetter wrote:
> >
> > On Wed, Aug 18, 2021 at 4:12 PM Ezequiel Garcia
> > wrote:
> > >
> > > +danvet
> > >
> > > Hi,
> > >
> > > On Tue, 10 Aug 2021 at 23:58, Yunfei Dong
> > > wrote:
> > >
On Thu, Aug 19, 2021 at 01:22:53PM +0200, Lukas Bulwahn wrote:
> Commit 55b68fb856b5 ("drm/omap: squash omapdrm sub-modules into one")
> removes the config OMAP2_DSS in ./drivers/gpu/drm/omapdrm/dss/Kconfig,
> while moving the other configs into./drivers/gpu/drm/omapdrm/Kconfig, but
> misses to
On Thu, 2021-08-26 at 11:51 +0200, Thomas Hellström wrote:
> On Thu, 2021-08-26 at 11:16 +0200, Daniel Vetter wrote:
> > On Thu, Aug 19, 2021 at 09:32:20AM +0200, Thomas Hellström wrote:
> > > On Wed, 2021-08-18 at 15:58 +0100, Matthew Auld wrote:
> > > > This should give a more complete view of
On Thu, Aug 19, 2021 at 09:32:20AM +0200, Thomas Hellström wrote:
> On Wed, 2021-08-18 at 15:58 +0100, Matthew Auld wrote:
> > This should give a more complete view of the various bits of internal
> > resource manager state, for device local-memory.
> >
> > Signed-off-by: Matthew Auld
> > Cc:
On Mon, Aug 23, 2021 at 01:51:30PM -0500, Rob Herring wrote:
> On Sat, 21 Aug 2021 11:13:57 +0800, Zenghui Yu wrote:
> > The zte zx platform had been removed in commit 89d4f98ae90d ("ARM: remove
> > zte zx platform"), so this driver is no longer needed.
> >
> > Cc: Arnd Bergmann
> > Cc: Jun Nie
On Thu, 2021-08-26 at 11:16 +0200, Daniel Vetter wrote:
> On Thu, Aug 19, 2021 at 09:32:20AM +0200, Thomas Hellström wrote:
> > On Wed, 2021-08-18 at 15:58 +0100, Matthew Auld wrote:
> > > This should give a more complete view of the various bits of
> > > internal
> > > resource manager state, for
On Thu, Aug 26, 2021 at 11:51:44AM +0200, Thomas Hellström wrote:
> On Thu, 2021-08-26 at 11:16 +0200, Daniel Vetter wrote:
> > On Thu, Aug 19, 2021 at 09:32:20AM +0200, Thomas Hellström wrote:
> > > On Wed, 2021-08-18 at 15:58 +0100, Matthew Auld wrote:
> > > > This should give a more complete
On Thu, Aug 26, 2021 at 11:13:43AM +0200, Daniel Vetter wrote:
> dri-devel is the main user, and somehow there's been the assumption
> that component stuff is unmaintained.
>
> References:
> https://lore.kernel.org/dri-devel/CAAEAJfDWOzCJxZFNtxeT7Cvr2pWbYrfz-YnA81sVNs-rM=8...@mail.gmail.com/
>
On Wed, 25 Aug 2021, Jani Nikula wrote:
> On Thu, 19 Aug 2021, Ville Syrjälä wrote:
>> On Fri, Aug 13, 2021 at 01:43:20PM +0300, Jani Nikula wrote:
>>> Extend the use of extended receiver cap at 0x2200 to cover
>>> MAIN_LINK_CHANNEL_CODING_CAP in 0x2206, in case an implementation hides
>>> the
On Thu, 2021-08-26 at 10:23 +0200, Maxime Ripard wrote:
> On Wed, Aug 25, 2021 at 04:03:43PM +, Vivi, Rodrigo wrote:
> > On Tue, 2021-08-24 at 18:48 +0200, Hans de Goede wrote:
> > > Hi,
> > >
> > > On 8/24/21 10:45 AM, Jani Nikula wrote:
> > > > On Fri, 20 Aug 2021, Hans de Goede wrote:
> >
Am 26.08.21 um 06:55 schrieb Monk Liu:
issue:
in cleanup_job the cancle_delayed_work will cancel a TO timer
even the its corresponding job is still running.
Yeah, that makes a lot more sense.
fix:
do not cancel the timer in cleanup_job, instead do the cancelling
only when the heading job is
On Thu, Aug 26, 2021 at 12:03:29PM +0200, Daniel Vetter wrote:
> On Thu, Aug 26, 2021 at 11:51:44AM +0200, Thomas Hellström wrote:
> > On Thu, 2021-08-26 at 11:16 +0200, Daniel Vetter wrote:
> > > On Thu, Aug 19, 2021 at 09:32:20AM +0200, Thomas Hellström wrote:
> > > > On Wed, 2021-08-18 at 15:58
Pinned contexts, like the migrate contexts need reset after resume
since their context image may have been lost. Also the GuC needs to
register pinned contexts.
Add a list to struct intel_engine_cs where we add all pinned contexts on
creation, and traverse that list at resume time to reset the
On 26/8/21 5:53 pm, Daniel Vetter wrote:
On Thu, Aug 26, 2021 at 10:01:16AM +0800, Desmond Cheong Zhi Xi wrote:
drm_master_release can be called on a drm_file without a master, which
results in a null ptr dereference of file_priv->master->magic_map. The
three cases are:
1. Error path in
Am 2021-08-26 14:14, schrieb Russell King (Oracle):
On Thu, Aug 26, 2021 at 02:10:05PM +0200, Michael Walle wrote:
+ pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
+ pdev->dev.dma_mask = >dev.coherent_dma_mask;
Please use dma_coerce_mask_and_coherent() here instead.
It will be
The STLB and the first command buffer (which is used to set up the TLBs)
has a 32 bit size restriction in hardware. There seems to be no way to
specify addresses larger than 32 bit. Keep it simple and restict the
addresses to the lower 4 GiB range for all coherent DMA memory
allocations.
On Thu, Aug 26, 2021 at 02:10:05PM +0200, Michael Walle wrote:
> + pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
> + pdev->dev.dma_mask = >dev.coherent_dma_mask;
Please use dma_coerce_mask_and_coherent() here instead.
--
RMK's Patch system:
On Thu, Aug 26, 2021 at 02:10:06PM +0200, Michael Walle wrote:
> - pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
> - pdev->dev.dma_mask = >dev.coherent_dma_mask;
> + /*
> + * PTA and MTLB can have 40 bit base addresses, but
> + * unfortunately, an entry in the MTLB can only
Am 2021-08-26 14:19, schrieb Russell King (Oracle):
On Thu, Aug 26, 2021 at 02:10:06PM +0200, Michael Walle wrote:
- pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
- pdev->dev.dma_mask = >dev.coherent_dma_mask;
+ /*
+* PTA and MTLB can have 40 bit base addresses, but
On Thu, Aug 26, 2021 at 12:45:14PM +0200, Thomas Hellström wrote:
> Pinned contexts, like the migrate contexts need reset after resume
> since their context image may have been lost. Also the GuC needs to
> register pinned contexts.
>
> Add a list to struct intel_engine_cs where we add all pinned
Am 2021-08-26 14:10, schrieb Michael Walle:
The STLB and the first command buffer (which is used to set up the
TLBs)
has a 32 bit size restriction in hardware. There seems to be no way to
specify addresses larger than 32 bit. Keep it simple and restict the
addresses to the lower 4 GiB range for
Am Do., 26. Aug. 2021 um 14:10 Uhr schrieb Michael Walle :
>
> There is already a macro for the magic value. Use it.
>
> Signed-off-by: Michael Walle
Reviewed-by: Christian Gmeiner
I will wait for v2 for the rest of the changes to review.
> ---
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 2 +-
On Thu, 26 Aug 2021 19:03:11 +0800, yangcong wrote:
> Add documentation for boe tv110c9m-ll3 panel.
>
> Signed-off-by: yangcong
> ---
> .../display/panel/boe,tv110c9m-ll3.yaml | 81 +++
> 1 file changed, 81 insertions(+)
> create mode 100644
>
On Thu, Aug 26, 2021 at 03:27:30PM +0200, Daniel Vetter wrote:
> On Fri, Aug 20, 2021 at 02:05:27PM +0200, Christian König wrote:
> > From: Christian König
> >
> > While unplugging a device the TTM shrinker implementation
> > needs a barrier to make sure that all concurrent shrink
> > operations
Ping
Andrey
On 2021-08-25 11:36 a.m., Andrey Grodzovsky wrote:
On 2021-08-25 2:43 a.m., Christian König wrote:
Am 24.08.21 um 23:01 schrieb Andrey Grodzovsky:
Handle all DMA IOMMU group related dependencies before the
group is removed and we try to access it after free.
Signed-off-by:
On Thu, 2021-08-26 at 14:44 +0200, Daniel Vetter wrote:
> On Thu, Aug 26, 2021 at 12:45:14PM +0200, Thomas Hellström wrote:
> > Pinned contexts, like the migrate contexts need reset after resume
> > since their context image may have been lost. Also the GuC needs to
> > register pinned contexts.
>
On Thu, Aug 26, 2021 at 12:27:31PM +0100, Tvrtko Ursulin wrote:
>
> On 26/08/2021 04:49, Matthew Brost wrote:
> > On Wed, Aug 25, 2021 at 11:39:10AM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 27/07/2021 01:23, Matthew Brost wrote:
> > > > When using GuC submission, if a context gets banned
Am 26.08.21 um 15:43 schrieb Andrey Grodzovsky:
Ping
Andrey
On 2021-08-25 11:36 a.m., Andrey Grodzovsky wrote:
On 2021-08-25 2:43 a.m., Christian König wrote:
Am 24.08.21 um 23:01 schrieb Andrey Grodzovsky:
Handle all DMA IOMMU group related dependencies before the
group is removed and
Am 26.08.21 um 15:28 schrieb Daniel Vetter:
On Thu, Aug 26, 2021 at 03:27:30PM +0200, Daniel Vetter wrote:
On Fri, Aug 20, 2021 at 02:05:27PM +0200, Christian König wrote:
From: Christian König
While unplugging a device the TTM shrinker implementation
needs a barrier to make sure that all
Am Donnerstag, dem 26.08.2021 um 16:00 +0100 schrieb Robin Murphy:
> On 2021-08-26 13:10, Michael Walle wrote:
> > The DMA configuration of the virtual device is inherited from the first
> > actual etnaviv device. Unfortunately, this doesn't work with an IOMMU:
> >
> > [5.191008] Failed to
On Thu, Aug 26, 2021 at 03:59:30PM +0200, Thomas Hellström wrote:
> On Thu, 2021-08-26 at 14:44 +0200, Daniel Vetter wrote:
> > On Thu, Aug 26, 2021 at 12:45:14PM +0200, Thomas Hellström wrote:
> > > Pinned contexts, like the migrate contexts need reset after resume
> > > since their context image
On 2021-08-26 13:10, Michael Walle wrote:
The DMA configuration of the virtual device is inherited from the first
actual etnaviv device. Unfortunately, this doesn't work with an IOMMU:
[5.191008] Failed to set up IOMMU for device (null); retaining platform DMA
ops
This is because there is
On Thu, Aug 26, 2021 at 04:58:06PM +0200, Christian König wrote:
> Am 26.08.21 um 15:28 schrieb Daniel Vetter:
> > On Thu, Aug 26, 2021 at 03:27:30PM +0200, Daniel Vetter wrote:
> > > On Fri, Aug 20, 2021 at 02:05:27PM +0200, Christian König wrote:
> > > > From: Christian König
> > > >
> > > >
On Thu, Aug 26, 2021 at 2:33 AM Daniel Vetter wrote:
>
> Originally drm_sched_job_init was the point of no return, after which
> drivers really should submit a job. I've split that up, which allows
> us to fix this issue pretty easily.
>
> Only thing we have to take care of is to not skip to
There is already a macro for the magic value. Use it.
Signed-off-by: Michael Walle
---
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
index
This patch series fixes usage of the etnaviv driver with GPUs behind a
IOMMU. It was tested on a NXP LS1028A SoC. Together with Lucas' MMU patches
[1] there are not more (GPU internal) MMU nor (system) IOMMU faults on the
LS1028A.
[1]
The DMA configuration of the virtual device is inherited from the first
actual etnaviv device. Unfortunately, this doesn't work with an IOMMU:
[5.191008] Failed to set up IOMMU for device (null); retaining platform DMA
ops
This is because there is no associated iommu_group with the device.
On Thu, Aug 26, 2021 at 12:11:04PM +0200, Christian König wrote:
>
>
> Am 26.08.21 um 10:49 schrieb Daniel Vetter:
> > On Mon, Aug 23, 2021 at 01:15:20PM +0200, Thomas Hellström wrote:
> > > On Mon, 2021-08-23 at 13:05 +0200, Christian König wrote:
> > > > Adding Thomas on CC as well.
> > > >
>
On Thu, Aug 26, 2021 at 10:01:22AM +0800, Desmond Cheong Zhi Xi wrote:
> Previously, master_lookup_lock was introduced in
> commit 0b0860a3cf5e ("drm: serialize drm_file.master with a new
> spinlock") to serialize accesses to drm_file.master. This then allowed
> us to write drm_file_get_master in
[AMD Official Use Only]
>>I'm not sure if the work_tdr is initialized when a maximum timeout is
>>specified. Please double check.
Ok, will do
>>BTW: Can we please drop the "tdr" naming from the scheduler? That is just a
>>timeout functionality and not related to recovery in any way.
We even
Am 26.08.21 um 13:55 schrieb Liu, Monk:
[AMD Official Use Only]
I'm not sure if the work_tdr is initialized when a maximum timeout is
specified. Please double check.
Ok, will do
BTW: Can we please drop the "tdr" naming from the scheduler? That is just a
timeout functionality and not
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