Re: [Intel-gfx] [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

2017-10-30 Thread Jani Nikula
On Fri, 27 Oct 2017, Ville Syrjälä wrote: > On Fri, Oct 27, 2017 at 01:25:01PM +0300, Jani Nikula wrote: >> On Mon, 14 Aug 2017, Harry Wentland wrote: >> > On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote: >> >> DPCD 600h - SET_POWER &

Re: [Intel-gfx] [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

2017-10-27 Thread Ville Syrjälä
On Fri, Oct 27, 2017 at 01:25:01PM +0300, Jani Nikula wrote: > On Mon, 14 Aug 2017, Harry Wentland wrote: > > On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote: > >> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state > >> > >> 101 = Set Main-Link for local

Re: [Intel-gfx] [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

2017-10-27 Thread Jani Nikula
On Mon, 14 Aug 2017, Harry Wentland wrote: > On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote: >> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state >> >> 101 = Set Main-Link for local Sink device and all downstream Sink >> devices to D3 (power-down mode),

Re: [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

2017-08-14 Thread Harry Wentland
On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote: > DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state > > 101 = Set Main-Link for local Sink device and all downstream Sink > devices to D3 (power-down mode), keep AUX block fully powered, ready to > reply within a Response Timeout

[PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

2017-08-12 Thread Dhinakaran Pandiyan
DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state 101 = Set Main-Link for local Sink device and all downstream Sink devices to D3 (power-down mode), keep AUX block fully powered, ready to reply within a Response Timeout period of 300us. This state is useful in a MST dock + MST