[edk2] [Patch] BaseTools: Update tools_def.template to remove old XCLANG and XCODE32

Per Andrew Fish recommendation, XCLANG and XCODE32 are not used anymore. https://bugzilla.tianocore.org/show_bug.cgi?id=562 https://bugzilla.tianocore.org/show_bug.cgi?id=563 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao Cc: Andrew Fish

Re: [edk2] [Patch] BaseTools: Update GenFw to clear unused debug entry generated by VS tool chain

Reviewed-by: Yonghong Zhu Best Regards, Zhu Yonghong -Original Message- From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming Gao Sent: Monday, July 03, 2017 1:21 PM To: edk2-devel@lists.01.org Subject: [edk2] [Patch] BaseTools: Update

[edk2] [Patch] BaseTools: Update GenFw to clear unused debug entry generated by VS tool chain

https://bugzilla.tianocore.org/show_bug.cgi?id=600 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao --- BaseTools/Source/C/GenFw/GenFw.c | 27 ++- 1 file changed, 22 insertions(+), 5 deletions(-) diff --git

[edk2] [PATCH] EmbeddedPkg/DwEmmcDxe: limit max clock for platform

Some boards may have max clock limitation. Add a Pcd to notify driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie --- EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c | 4 EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf | 1 +

[edk2] [PATCH 2/2] EmbeddedPkg/DwEmmc: Adjust FIFO threshold

Adjust FIFO threshold according to FIFO depth. Skip the adjustment if we do not have FIFO depth info. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie --- EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h | 6

Re: [edk2] [PATCH] BaseTools: Add COREBOOT tools definition

Hi, Do you include your patch? I don't see it in the mail. Thanks Liming >-Original Message- >From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of >Patrick Georgi >Sent: Saturday, July 01, 2017 6:39 AM >To: edk2-devel@lists.01.org >Subject: [edk2] [PATCH] BaseTools:

[edk2] [PATCH] ArmPlatformPkg: Support different reg offset to PL011

ZTE SoC has different offset for some registers and bits. Add a macro flag to undef/redef those value. The macro flag can be enabled in BuildOptions section of platform.dsc. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie ---

Re: [edk2] How to add support to different reg offset definition to share the same driver code?

2017-06-30 19:01 GMT+08:00 Leif Lindholm : > Hi Jun, > > I think there is more than one benefit in mimicing the Linux driver, > so I would lean towards the Pcd option. But as Ard points out to me, > it needs to use a FixedPcd (using FixedPcdGet()) - this can only ever >

Re: [edk2] How to add support to different reg offset definition to share the same driver code?

2017-06-30 21:29 GMT+08:00 Gao, Liming : > Jun: > You can add C MACRO in [BuildOptions] of Platform.dsc, then use DSC flag to > control it. > > For example: Platform.dsc > [Defines] > DEFINE ZX_PL011_FLAG = FALSE > > [BuildOptions] > !if $(ZX_PL011_FLAG) == TRUE >