在 8/2/2018 10:42 PM, Leif Lindholm 写道:
> On Tue, Jul 24, 2018 at 03:08:45PM +0800, Ming Huang wrote:
>> This patch is to unify D0x. Add pGBL_INTERFACE struct define
>> and remove useless interfece. Replace DMRC pGblData with pGblInterface;
>>
>> Contributed-under: TianoCore Contribution
This is a copy-pasted issue. D03 should use D03's PlatformPciLib,
otherwise D03 can not enumerate all pci host bridges.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
---
Platform/Hisilicon/D03/D03.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
The major features of this patchset include:
1. Remove D02 platform;
2. Fix a D03 issue about switch generic PciHostBridge;
Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: rm-D02
Ming Huang (2):
Hisilicon/D02: Remove D02 platform
D02 is no need to maintain now. it is time to retire that
platform and remove D02-related macro also.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
---
Platform/Hisilicon/D02/Pv660D02.dec | 44
--
On Tue, Jul 24, 2018 at 03:09:19PM +0800, Ming Huang wrote:
> If install SPCR table, KVM will not output while install or boot
> some OS, like ubuntu,
Will not output?
Do you mean it disables the graphical output of the OS?
/
Leif
> so add SPCR switch setup item and set it
> disable by
On Tue, Jul 24, 2018 at 03:09:18PM +0800, Ming Huang wrote:
> From: shaochangliang
>
> During the period of I2c accessing, if the board is reset
> unexpectedly, and because the I2c client can not reset,
> the SDA will be always pull down, then it cause I2C bus
> Exception.
>
> Follow the Hi1620
On Tue, Jul 24, 2018 at 03:09:17PM +0800, Ming Huang wrote:
> From: ZhenYao
>
> When BIOS booting, the power consumption is too high, so need close
> some clusters clock that don't work to reduce power consumption.
On the one hand: should this not be handled in ARM-TF?
What if (during
Ard: a sanity check?
For my part:
Reviewed-by: Leif Lindholm
On Tue, Jul 24, 2018 at 03:09:16PM +0800, Ming Huang wrote:
> From: xulinwei
>
> This module support updating the boot CPU firmware only.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
>
On Tue, Jul 24, 2018 at 03:09:15PM +0800, Ming Huang wrote:
> Add soem Lpc macro to LpcLib.h for D06.
soem -> some
I have no issue with this patch, but can you explain when these macros
are intended to be used? And if in this set, move this patch
immediately before the patch than needs it?
/
On Tue, Jul 24, 2018 at 03:09:14PM +0800, Ming Huang wrote:
> From: Luqi Jiang
>
> This driver provide a means for the platform to
> convey error information to OSPM.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Luqi Jiang
> Signed-off-by: Ming Huang
>
在 8/2/2018 6:12 PM, Leif Lindholm 写道:
> On Thu, Aug 02, 2018 at 09:46:13AM +0800, Ming wrote:
>> I am sorry for the first issue, the modify FIRMWARE_VER patch is add
>> alone just befor send out the patchset.
>>
>> For generating acpi table, I use acpica-tools 20180508 version and it works.
>> I
Ard: could you give this one an additional sanity check?
Some (mostly style) comments inline below.
On Tue, Jul 24, 2018 at 03:09:13PM +0800, Ming Huang wrote:
> PciHostBridgeLib which is need by PciHostBridgeDxe,provide
> root bridges and deal with resource conflict.
>
> Contributed-under:
Hi Dandan,
This is also valuable input from your side, let me check this also.
Thanks for kind support
> On 04-Aug-2018, at 3:41 PM, Bi, Dandan wrote:
>
> Hi Prabin,
>
> Here is a simple introduction of current performance infrastructure in latest
> Edk2 code base.
> Hope it can have some
Hi Prabin,
Here is a simple introduction of current performance infrastructure in latest
Edk2 code base.
Hope it can have some help when you enable it.
https://github.com/dandanbi/edk2/wiki/Performance-Infrastructure
Thanks,
Dandan
-Original Message-
From: edk2-devel
On Tue, Jul 24, 2018 at 03:09:12PM +0800, Ming Huang wrote:
> From: shaochangliang
>
> Add PcdSFCMEM0BaseAddress to D06 and switch three 32-bit macro
> PcdFlashNvStorage to 64-bit for D05/D03.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: shaochangliang
>
On Tue, Jul 24, 2018 at 03:09:11PM +0800, Ming Huang wrote:
> This peim configuare SMMU,AP,MN.
configuare -> configure
I know SMMU and AP, but I don't know MN.
Hmm, also, 'AP' is a bit unfortunate to use in EDK2 context.
PI specifies 'BSP' for Boot-strap Processor, as the one executing all
of
Hello Jiaxin,
We have tried both the methods and both failed. Do you have any other
recommendation?
-Siva
-Original Message-
From: Wu, Jiaxin [mailto:jiaxin...@intel.com]
Sent: Tuesday, July 31, 2018 7:14 AM
To: Sivaraman Nainar; Ye, Ting; Laszlo Ersek; edk2-devel@lists.01.org
Subject:
On Tue, Jul 24, 2018 at 03:09:10PM +0800, Ming Huang wrote:
> From: Sun Yuanchen
>
> Move some RAS macros definition to PlatformArch.h for
> unifying D0x
Minor comments below.
However, I would still prefer for this to be split up into a
refactoring patch for d03/d05, and then simpley introduced
On Tue, Jul 24, 2018 at 03:09:09PM +0800, Ming Huang wrote:
> From: Sun Yuanchen
>
> Move board level code to OemMiscLibD0x for unifying D0x.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sun Yuanchen
> Signed-off-by: Ming Huang
> Signed-off-by: Heyi Guo
> ---
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