Just drew a picture to show the current library APIs, V1 and V2 APIs, to help
you understand my point.
[cid:image001.png@01D0D37C.E78C2030]
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ni, Ruiyu
Sent: Monday, August 10, 2015 11:10 AM
To: Jus
when i used ovmf.fd in qemu manager,
then occurcs this tips:
Boot Failed. EFI DVD/CDROM
Boot Failed. EFI Floopy
i don't know what does this mean?
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When adding section VERSION in FDF file, for example:
FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
SECTION RAW = MdeModulePkg/Logo/Logo.bmp
SECTION UI = "Logo"
SECTION VERSION = "0001"
}
GenFds will report the following error:
Traceback (most recent ca
Reviewed-by: Liming Gao
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard
Biesheuvel
Sent: Friday, August 7, 2015 11:05 PM
To: edk2-devel@lists.01.org; Justen, Jordan L; Liu, Yingke D
Cc: Ard Biesheuvel
Subject: [edk2] [RFC PATCH 2/4] BaseTools
Ard:
I am not familiar with ARM arch. Those changes are only for AArch64. I have
no comments for them. You can add review-by me.
Thanks
Liming
-Original Message-
From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
Sent: Friday, August 7, 2015 10:23 PM
To: edk2-devel@lists.01.org;
Shumin:
Please highlight what problem resolved by this fix.
Thanks
Liming
-Original Message-
From: Qiu, Shumin
Sent: Monday, August 10, 2015 1:43 PM
To: edk2-devel@lists.01.org
Cc: Qiu, Shumin; Gao, Liming; winggundu...@163.com
Subject: [PATCH] BaseTools/GenFds: Fix 'NoneType' object i
In GenFdsGlobalVariable.py line 401 'list' requires a iteralbe object as
parameter while the 'Input' is None.
Cc: Liming Gao
Cc: winggundu...@163.com
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin
Reviewed-by: Yingke Liu
---
BaseTools/Source/Python/GenFds/Ve
Jordan and Laszlo,
I reviewed the OptionRomPkg/BltLib again and would like to discuss with you
about the potential API refinement.
I attached two versions of the refined BltLib.h.
The common part of the two versions is:
1. BltLibGetSizes() is removed.
Because the size information is actual
The patch looks good.
Reviewed-by: Jiaxin Wu
-Original Message-
From: Zhang, Lubo
Sent: Monday, August 10, 2015 9:20 AM
To: edk2-devel@lists.01.org
Cc: Ye, Ting; Wu, Jiaxin
Subject: [patch] MdeModulePkg: HttpLib BodyParseComplete Event should indicate
the end of message body
In HttpLi
In HttpLib, the Event BodyParseComplete should return to the
callback function when the whole message body has been parsed
Cc: Ye Ting
CC: Wu Jiaxin
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo
---
MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.c | 44 ++
HttpBootDxe need to stop and release the DHCP4 child when it's
not used so the NBP could create new DHCP4 child and use it.
Cc: Ye Ting
Cc: Zhang Lubo
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu
---
NetworkPkg/HttpBootDxe/HttpBootImpl.c | 12
1
On Sun, 2015-08-09 at 15:54 -0500, Scott Duplichan wrote:
> 6) TimerInterruptHandler calls RestoreTPL. RestoreTPL executes a loop for
>"Dispatch any pending events". Interrupts are re-enabled if all pending
>event have TPL < HIGH. CoreDispatchEventNotifies calls CoreAcquireEventLock
>wh
Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org] wrote:
]Sent: Sunday, August 09, 2015 06:28 AM
]To: edk2-de...@ml01.01.org
]Subject: [edk2] Core TPL and interrupt state
]
]Hi !
]
]Yet another somewhat newbie question, I apologize if I missed the right
]piece of doc...
]
]I found some kind
Hello,
Starting with SVN revision 18146, CorebootPayload will no longer boot
on my board. The reason is that the code rearrangement of rev 18146
(MdeModulePkg DxeCore: Move ProcessLibraryConstructorList) causes low
memory to be cleared before a call to FindCbTag scans low memory.
Prior to 18146, l
Hi !
Yet another somewhat newbie question, I apologize if I missed the right
piece of doc...
I found some kind of disconnect between the core idea of TPL and the
interrupt enable state of the processor.
The core will enable or disable processor interrupts based on TPL state
changes.
However the
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