[edk2] [PATCH v4 06/19] UefiCpuPkg: Add SMM Communication PPI and Handler Modules

[Michael Kinney]

Add modules that produce the SMM Communications PPI and
install a SW SMI handler for SMM Communication requests

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
---
 .../PiSmmCommunication/PiSmmCommunicationPei.c | 425 +
 .../PiSmmCommunication/PiSmmCommunicationPei.inf   |  70 
 .../PiSmmCommunication/PiSmmCommunicationPei.uni   | Bin 0 -> 2066 bytes
 .../PiSmmCommunicationPeiExtra.uni | Bin 0 -> 1370 bytes
 .../PiSmmCommunication/PiSmmCommunicationPrivate.h |  30 ++
 .../PiSmmCommunication/PiSmmCommunicationSmm.c | 269 +
 .../PiSmmCommunication/PiSmmCommunicationSmm.inf   |  82 
 .../PiSmmCommunication/PiSmmCommunicationSmm.uni   | Bin 0 -> 3004 bytes
 .../PiSmmCommunicationSmmExtra.uni | Bin 0 -> 1392 bytes
 UefiCpuPkg/UefiCpuPkg.dsc  |   5 +
 10 files changed, 881 insertions(+)
 create mode 100644 UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.c
 create mode 100644 UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
 create mode 100644 UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.uni
 create mode 100644 UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPeiExtra.uni
 create mode 100644 UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPrivate.h
 create mode 100644 UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.c
 create mode 100644 UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
 create mode 100644 UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.uni
 create mode 100644 UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmmExtra.uni

diff --git a/UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.c 
b/UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.c
new file mode 100644
index 000..aaeaa06
--- /dev/null
+++ b/UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.c
@@ -0,0 +1,425 @@
+/** @file
+PiSmmCommunication PEI Driver.
+
+Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "PiSmmCommunicationPrivate.h"
+
+/**
+  the whole picture is below:
+
+  +--+
+  | ACPI_VARIABLE_HOB|
+  |   SmramDescriptor| <- DRAM
+  | CpuStart |---
+  +--+   |
+ |
+  +--+<--
+  | SMM_S3_RESUME_STATE  |
+  |   Signature  | <- SMRAM
+  |   Smst   |---
+  +--+   |
+ |
+  +--+<--
+  | EFI_SMM_SYSTEM_TABLE2|
+  |   NumberOfTableEntries   | <- SMRAM
+  |   SmmConfigurationTable  |---
+  +--+   |
+ |
+  +--+<--
+  | EFI_SMM_COMMUNICATION_CONTEXT|
+  |   SwSmiNumber| <- SMRAM
+  |   BufferPtrAddress   |
+  +--+|
+  |
+  +--+|
+  | EFI_SMM_COMMUNICATION_ACPI_TABLE ||
+  |   SwSmiNumber| <- AcpiTable   |
+  |   BufferPtrAddress   |--- |
+  +--+   ||
+ ||
+  +--+<---
+  | Communication Buffer Pointer | <- AcpiNvs
+  +--+---
+ |
+  +--+<--
+  | EFI_SMM_COMMUNICATE_HEADER   |
+  |   HeaderGuid | <- DRAM
+  |   MessageLength  |
+  +--+
+
+**/
+
+#if defined (MDE_CPU_IA32)
+typedef struct {
+  EFI_TABLE_HEADERHdr;
+  UINT64  SmmFirmwareVendor;
+  UINT64  SmmFirmwareRevision;
+  UINT64  SmmInstallConfigurationTable;
+  UINT64  SmmIoMemRead;
+  UINT64  SmmIoMemWrite;
+  UINT64  SmmIoIoRead;
+  UINT64  SmmIoIoWrite;
+  UINT64  SmmAllocatePool;
+  UINT64  SmmFreePool;
+  UINT64  

[edk2] [PATCH v4 19/19] UefiCpuPkg: Add PiSmmCpuDxeSmm module X64 files

[Michael Kinney]

Add module that initializes a CPU for the SMM environment and
installs the first level SMI handler.  This module along with the
SMM IPL and SMM Core provide the services required for
DXE_SMM_DRIVERS to register hardware and software SMI handlers.

CPU specific features are abstracted through the SmmCpuFeaturesLib

Platform specific features are abstracted through the
SmmCpuPlatformHookLib

Several PCDs are added to enable/disable features and configure
settings for the PiSmmCpuDxeSmm module

[jeff@intel.com: Fix code style issues reported by ECC]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.S| 204 
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.asm  | 206 
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c| 692 +
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/Semaphore.c  |  67 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S   | 217 
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm | 221 
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S   | 610 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm | 413 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.S| 141 +
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.asm  | 132 +
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c | 316 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.h | 105 
 12 files changed, 3324 insertions(+)
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.S
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.asm
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/Semaphore.c
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.S
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.asm
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.h

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.S 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.S
new file mode 100644
index 000..d7cbc8c
--- /dev/null
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.S
@@ -0,0 +1,204 @@
+#--
+#
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD 
License
+# which accompanies this distribution.  The full text of the license may be 
found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+#   MpFuncs.S
+#
+# Abstract:
+#
+#   This is the assembly code for Multi-processor S3 support
+#
+#--
+
+.equ   VacantFlag,   0x0
+.equ   NotVacantFlag,0xff
+
+.equ   LockLocation,  RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart
+.equ   StackStartAddressLocation, RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x08
+.equ   StackSizeLocation, RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x10
+.equ   CProcedureLocation,RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x18
+.equ   GdtrLocation,  RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x20
+.equ   IdtrLocation,  RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x2A
+.equ   BufferStartLocation,   RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x34
+.equ   Cr3OffsetLocation, RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x38
+
+#-
+#RendezvousFunnelProc  procedure follows. All APs execute their procedure. This
+#procedure serializes all the AP processors through an Init sequence. It must 
be
+#noted that APs arrive here very raw...ie: real mode, no stack.
+#ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
+#IS IN MACHINE CODE.
+#-
+#RendezvousFunnelProc (,MemAddress);
+
+.code:
+
+ASM_GLOBAL ASM_PFX(RendezvousFunnelProc)
+ASM_PFX(RendezvousFunnelProc):
+RendezvousFunnelProcStart:
+
+# At this point CS = 0x(vv00) and ip= 0x0.
+
+.byte 0x8c,0xc8   # movax,  

[edk2] [PATCH v4 13/19] UefiCpuPkg: Add SMRAM Save State include file

[Michael Kinney]

Add SmramSaveStateMap.h file that defines the 32-bit and 64-bit CPU
SMRAM Save State Map.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
---
 UefiCpuPkg/Include/Register/SmramSaveStateMap.h | 190 
 1 file changed, 190 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Register/SmramSaveStateMap.h

diff --git a/UefiCpuPkg/Include/Register/SmramSaveStateMap.h 
b/UefiCpuPkg/Include/Register/SmramSaveStateMap.h
new file mode 100644
index 000..a7c7562
--- /dev/null
+++ b/UefiCpuPkg/Include/Register/SmramSaveStateMap.h
@@ -0,0 +1,190 @@
+/** @file
+SMRAM Save State Map Definitions.
+
+SMRAM Save State Map definitions based on contents of the
+Intel(R) 64 and IA-32 Architectures Software Developer's Manual
+  Volume 3C, Section 34.4 SMRAM
+  Volume 3C, Section 34.5 SMI Handler Execution Environment
+  Volume 3C, Section 34.7 Managing Synchronous and Asynchronous SMIs
+
+Copyright (c) 2015, Intel Corporation. All rights reserved.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __SMRAM_SAVE_STATE_MAP_H__
+#define __SMRAM_SAVE_STATE_MAP_H__
+
+///
+/// Default SMBASE address
+///
+#define SMM_DEFAULT_SMBASE   0x3
+
+///
+/// Offset of SMM handler from SMBASE
+///
+#define SMM_HANDLER_OFFSET   0x8000
+
+///
+/// Offset of SMRAM Save State Map from SMBASE
+///
+#define SMRAM_SAVE_STATE_MAP_OFFSET  0xfc00
+
+#pragma pack (1)
+
+///
+/// 32-bit SMRAM Save State Map
+///
+typedef struct {
+  UINT8   Reserved[0x200];  // 7c00h
+// Padded an extra 0x200 bytes so 32-bit and 64-bit
+// SMRAM Save State Maps are the same size
+  UINT8   Reserved1[0xf8];  // 7e00h
+  UINT32  SMBASE;   // 7ef8h
+  UINT32  SMMRevId; // 7efch
+  UINT16  IORestart;// 7f00h
+  UINT16  AutoHALTRestart;  // 7f02h
+  UINT8   Reserved2[0x9C];  // 7f08h
+  UINT32  IOMemAddr;// 7fa0h
+  UINT32  IOMisc;   // 7fa4h
+  UINT32  _ES;  // 7fa8h
+  UINT32  _CS;  // 7fach
+  UINT32  _SS;  // 7fb0h
+  UINT32  _DS;  // 7fb4h
+  UINT32  _FS;  // 7fb8h
+  UINT32  _GS;  // 7fbch
+  UINT32  Reserved3;// 7fc0h
+  UINT32  _TR;  // 7fc4h
+  UINT32  _DR7; // 7fc8h
+  UINT32  _DR6; // 7fcch
+  UINT32  _EAX; // 7fd0h
+  UINT32  _ECX; // 7fd4h
+  UINT32  _EDX; // 7fd8h
+  UINT32  _EBX; // 7fdch
+  UINT32  _ESP; // 7fe0h
+  UINT32  _EBP; // 7fe4h
+  UINT32  _ESI; // 7fe8h
+  UINT32  _EDI; // 7fech
+  UINT32  _EIP; // 7ff0h
+  UINT32  _EFLAGS;  // 7ff4h
+  UINT32  _CR3; // 7ff8h
+  UINT32  _CR0; // 7ffch
+} SMRAM_SAVE_STATE_MAP32;
+
+///
+/// 64-bit SMRAM Save State Map
+///
+typedef struct {
+  UINT8   Reserved1[0x1d0];  // 7c00h
+  UINT32  GdtBaseHiDword;// 7dd0h
+  UINT32  LdtBaseHiDword;// 7dd4h
+  UINT32  IdtBaseHiDword;// 7dd8h
+  UINT8   Reserved2[0xc];// 7ddch
+  UINT64  IO_EIP;// 7de8h
+  UINT8   Reserved3[0x50];   // 7df0h
+  UINT32  _CR4;  // 7e40h
+  UINT8   Reserved4[0x48];   // 7e44h
+  UINT32  GdtBaseLoDword;// 7e8ch
+  UINT32  Reserved5; // 7e90h
+  UINT32  IdtBaseLoDword;// 7e94h
+  UINT32  Reserved6; // 7e98h
+  UINT32  LdtBaseLoDword;// 7e9ch
+  UINT8   Reserved7[0x38];   // 7ea0h
+  UINT64  EptVmxControl; // 7ed8h
+  UINT32  EnEptVmxControl;   // 7ee0h
+  UINT8   Reserved8[0x14];   // 7ee4h
+  UINT32  SMBASE;// 7ef8h
+  UINT32  SMMRevId;  // 7efch
+  UINT16  IORestart; // 7f00h
+  UINT16  AutoHALTRestart;   // 7f02h
+  UINT8   Reserved9[0x18];   // 7f04h
+  UINT64  _R15;  // 7f1ch
+  UINT64  _R14;
+  UINT64  _R13;
+  UINT64  _R12;
+  UINT64  _R11;
+  UINT64  _R10;
+  UINT64  _R9;
+  UINT64  _R8;
+  UINT64  _RAX;  // 7f5ch
+  UINT64  _RCX;
+  UINT64  _RDX;
+  UINT64  _RBX;
+  UINT64  _RSP;
+  UINT64  _RBP;
+  UINT64  _RSI;
+  UINT64  _RDI;
+  UINT64  IOMemAddr; // 7f9ch
+  UINT32  IOMisc;// 7fa4h
+  UINT32  _ES;   // 7fa8h
+  UINT32  _CS;
+  UINT32  _SS;
+  UINT32  _DS;
+  UINT32  _FS;
+  UINT32  _GS;
+  UINT32  _LDTR; // 7fc0h
+  UINT32  _TR;
+  UINT64  _DR7;  // 7fc8h
+  UINT64  _DR6;
+  UINT64  _RIP;  // 7fd8h
+  UINT64  IA32_EFER; // 7fe0h
+  UINT64  _RFLAGS;   // 7fe8h
+  UINT64  _CR3;  // 7ff0h
+  

[edk2] [PATCH v4 14/19] UefiCpuPkg: Add ACPI CPU Data include file

[Michael Kinney]

Add AcpuCpuData.h that defines a data structure that is shared between
modules and is required for ACPI S3 support.
APState field removed between V1 and V2 patch.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
Cc: Laszlo Ersek 
---
 UefiCpuPkg/Include/AcpiCpuData.h | 71 
 1 file changed, 71 insertions(+)
 create mode 100644 UefiCpuPkg/Include/AcpiCpuData.h

diff --git a/UefiCpuPkg/Include/AcpiCpuData.h b/UefiCpuPkg/Include/AcpiCpuData.h
new file mode 100644
index 000..a367257
--- /dev/null
+++ b/UefiCpuPkg/Include/AcpiCpuData.h
@@ -0,0 +1,71 @@
+/** @file
+Definitions for CPU S3 data.
+
+Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _ACPI_CPU_DATA_H_
+#define _ACPI_CPU_DATA_H_
+
+//
+// Register types in register table
+//
+typedef enum _REGISTER_TYPE {
+  Msr,
+  ControlRegister,
+  MemoryMapped,
+  CacheControl
+} REGISTER_TYPE;
+
+//
+// Element of register table entry
+//
+typedef struct {
+  REGISTER_TYPE RegisterType;
+  UINT32Index;
+  UINT8 ValidBitStart;
+  UINT8 ValidBitLength;
+  UINT64Value;
+} CPU_REGISTER_TABLE_ENTRY;
+
+//
+// Register table definition, including current table length,
+// allocated size of this table, and pointer to the list of table entries.
+//
+typedef struct {
+  UINT32   TableLength;
+  UINT32   NumberBeforeReset;
+  UINT32   AllocatedSize;
+  UINT32   InitialApicId;
+  CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry;
+} CPU_REGISTER_TABLE;
+
+typedef struct {
+  EFI_PHYSICAL_ADDRESS  StartupVector;
+  EFI_PHYSICAL_ADDRESS  GdtrProfile;
+  EFI_PHYSICAL_ADDRESS  IdtrProfile;
+  EFI_PHYSICAL_ADDRESS  StackAddress;
+  UINT32StackSize;
+  UINT32NumberOfCpus;
+  EFI_PHYSICAL_ADDRESS  MtrrTable;
+  //
+  // Physical address of a CPU_REGISTER_TABLE structure
+  //
+  EFI_PHYSICAL_ADDRESS  PreSmmInitRegisterTable;
+  //
+  // Physical address of a CPU_REGISTER_TABLE structure
+  //
+  EFI_PHYSICAL_ADDRESS  RegisterTable;
+  EFI_PHYSICAL_ADDRESS  ApMachineCheckHandlerBase;
+  UINT32ApMachineCheckHandlerSize;
+} ACPI_CPU_DATA;
+
+#endif
-- 
1.9.5.msysgit.1

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[edk2] [PATCH v4 07/19] UefiCpuPkg: Add PlatformSecLib

[Michael Kinney]

Add PlatformSecLib class and PlatformSecLibNull instance
that is used by the SecCore.  PlatformSecLibNull should
not be used in a platform build.  Instead, it should be
used as a template for implementing a platform specific
instance of the PlatformSecLib library class.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
---
 UefiCpuPkg/Include/Library/PlatformSecLib.h|  70 
 .../PlatformSecLibNull/PlatformSecLibNull.c|  90 +
 .../PlatformSecLibNull/PlatformSecLibNull.inf  |  37 +
 .../PlatformSecLibNull/PlatformSecLibNull.uni  | Bin 0 -> 1644 bytes
 4 files changed, 197 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Library/PlatformSecLib.h
 create mode 100644 UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.c
 create mode 100644 UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
 create mode 100644 UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.uni

diff --git a/UefiCpuPkg/Include/Library/PlatformSecLib.h 
b/UefiCpuPkg/Include/Library/PlatformSecLib.h
new file mode 100644
index 000..0af7781
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/PlatformSecLib.h
@@ -0,0 +1,70 @@
+/** @file
+This library class defines interface for platform to perform platform
+specific initialization in SEC phase.
+
+Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PLATFORM_SEC_LIB_H__
+#define __PLATFORM_SEC_LIB_H__
+
+/**
+  A developer supplied function to perform platform specific operations.
+
+  It's a developer supplied function to perform any operations appropriate to a
+  given platform. It's invoked just before passing control to PEI core by SEC
+  core. Platform developer may modify the SecCoreData passed to PEI Core.
+  It returns a platform specific PPI list that platform wishes to pass to PEI 
core.
+  The Generic SEC core module will merge this list to join the final list 
passed to
+  PEI core.
+
+  @param  SecCoreData   The same parameter as passing to PEI core. It
+could be overridden by this function.
+
+  @return The platform specific PPI list to be passed to PEI core or
+  NULL if there is no need of such platform specific PPI list.
+
+**/
+EFI_PEI_PPI_DESCRIPTOR *
+EFIAPI
+SecPlatformMain (
+  IN OUT   EFI_SEC_PEI_HAND_OFF*SecCoreData
+  );
+
+/**
+  This interface conveys state information out of the Security (SEC) phase 
into PEI.
+
+  @param  PeiServices   Pointer to the PEI Services Table.
+  @param  StructureSize Pointer to the variable describing size of 
the input buffer.
+  @param  PlatformInformationRecord Pointer to the 
EFI_SEC_PLATFORM_INFORMATION_RECORD.
+
+  @retval EFI_SUCCESS   The data was successfully returned.
+  @retval EFI_BUFFER_TOO_SMALL  The buffer was too small.
+
+**/
+EFI_STATUS
+EFIAPI
+SecPlatformInformation (
+  IN CONST EFI_PEI_SERVICES **PeiServices,
+  IN OUT   UINT64   *StructureSize,
+ OUT   EFI_SEC_PLATFORM_INFORMATION_RECORD  *PlatformInformationRecord
+  );
+
+/**
+  This interface disables temporary memory in SEC Phase.
+**/
+VOID
+EFIAPI
+SecPlatformDisableTemporaryMemory (
+  VOID
+  );
+
+#endif
diff --git a/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.c 
b/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.c
new file mode 100644
index 000..ad3e909
--- /dev/null
+++ b/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.c
@@ -0,0 +1,90 @@
+/** @file
+Null instance of Platform Sec Lib.
+
+Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include 
+
+#include 
+
+/**
+  A developer supplied function to perform platform specific operations.
+
+  It's a developer supplied function to perform any operations appropriate to a
+  given platform. It's invoked just before passing control to PEI core by SEC
+  core. Platform developer may modify the SecCoreData passed to PEI Core.
+  It returns a platform specific PPI list that platform wishes to pass to PEI 
core.
+  

[edk2] [PATCH v4 02/19] UefiCpuPkg: CpuDxe: Use PCD for AP detection timeout

[Michael Kinney]

Use PcdCpuApInitTimeOutInMicroSeconds instead of hardcoded 100ms for
the time to wait for all APs to respond to first INIT SIPI SIPI
wake request.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
Cc: Jeff Fan 
Cc: Laszlo Ersek 
---
 UefiCpuPkg/CpuDxe/ApStartup.c | 4 ++--
 UefiCpuPkg/CpuDxe/CpuDxe.inf  | 5 +++--
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/ApStartup.c b/UefiCpuPkg/CpuDxe/ApStartup.c
index 38a9c0e..78fb26f 100644
--- a/UefiCpuPkg/CpuDxe/ApStartup.c
+++ b/UefiCpuPkg/CpuDxe/ApStartup.c
@@ -452,9 +452,9 @@ StartApsStackless (
 {
   SendInitSipiSipiAllExcludingSelf ((UINT32)(UINTN)(VOID*) StartupCode);
   //
-  // Wait 100 milliseconds for APs to arrive at the ApEntryPoint routine
+  // Wait for APs to arrive at the ApEntryPoint routine
   //
-  MicroSecondDelay (100 * 1000);
+  MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
 
   return EFI_SUCCESS;
 }
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index a251922..9db5303 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -84,8 +84,9 @@
   gEfiSecPlatformInformationPpiGuid ## UNDEFINED # HOB
 
 [Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber   ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize  ## CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds  ## CONSUMES
 
 [Depex]
   TRUE
-- 
1.9.5.msysgit.1

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[edk2] [PATCH v4 04/19] UefiCpuPkg: CpuDxe: Wait for APs to enter idle loop

[Michael Kinney]

Address a race condition in first call to StartupAllAPs() with
SingleThread set to TRUE in the MP initialization.  If the APs
have not entered their idle loop before StartupAllAPs() is called,
then some of the APs will be in an unexpected state, and
StartupAllAPs() will hang.  This is the hang condition that is
only seen when SingleThread parameter is set to TRUE and
StartupAllAPs() is called very shortly after mAPsAlreadyInitFinished
is set to TRUE that releases the APs to complete their initialization.

An internal function has been added to check if all APs are in the
sleeping state in their idle loop.  On the first call to
StartupAllAPs(), this internal function is used to make sure the
APs are in a state that is compatible with StartupAllAPs() being
called.

The PcdCpuApInitTimeOutInMicroSeconds is used as the maximum wait
time for the APs to enter their idle loop.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
Cc: Jeff Fan 
Cc: Laszlo Ersek 
---
 UefiCpuPkg/CpuDxe/CpuMp.c | 62 +--
 1 file changed, 60 insertions(+), 2 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
index fbe43f5..7e7736c 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.c
+++ b/UefiCpuPkg/CpuDxe/CpuMp.c
@@ -313,6 +313,47 @@ CheckAndUpdateAllAPsToIdleState (
 }
 
 /**
+  Check if all APs are in state CpuStateSleeping.
+
+  Return TRUE if all APs are in the CpuStateSleeping state.  Do not
+  check the state of the BSP or any disabled APs.
+
+  @retval TRUE   All APs are in CpuStateSleeping state.
+  @retval FALSE  One or more APs are not in CpuStateSleeping state.
+
+**/
+BOOLEAN
+CheckAllAPsSleeping (
+  VOID
+  )
+{
+  UINTN   ProcessorNumber;
+  CPU_DATA_BLOCK  *CpuData;
+
+  for (ProcessorNumber = 0; ProcessorNumber < 
mMpSystemData.NumberOfProcessors; ProcessorNumber++) {
+CpuData = [ProcessorNumber];
+if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT)) {
+  //
+  // Skip BSP
+  //
+  continue;
+}
+
+if (!TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT)) {
+  //
+  // Skip Disabled processors
+  //
+  continue;
+}
+
+if (GetApState (CpuData) != CpuStateSleeping) {
+  return FALSE;
+}
+  }
+  return TRUE;
+}
+
+/**
   If the timeout expires before all APs returns from Procedure,
   we should forcibly terminate the executing AP and fill FailedList back
   by StartupAllAPs().
@@ -1650,8 +1691,9 @@ InitializeMpSupport (
   VOID
   )
 {
-  EFI_STATUSStatus;
-  MTRR_SETTINGS MtrrSettings;
+  EFI_STATUS Status;
+  MTRR_SETTINGS  MtrrSettings;
+  UINTN  Timeout;
 
   gMaxLogicalProcessorNumber = (UINTN) PcdGet32 
(PcdCpuMaxLogicalProcessorNumber);
   if (gMaxLogicalProcessorNumber < 1) {
@@ -1700,9 +1742,25 @@ InitializeMpSupport (
  sizeof (CPU_DATA_BLOCK) * 
mMpSystemData.NumberOfProcessors,
  mMpSystemData.CpuDatas);
 
+  //
+  // Release all APs to complete initialization and enter idle loop
+  //
   mAPsAlreadyInitFinished = TRUE;
 
   //
+  // Wait for all APs to enter idle loop.
+  //
+  Timeout = 0;
+  do {
+if (CheckAllAPsSleeping ()) {
+  break;
+}
+MicroSecondDelay (gPollInterval);
+Timeout += gPollInterval;
+  } while (Timeout <= PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
+  ASSERT (Timeout <= PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
+
+  //
   // Update CPU healthy information from Guided HOB
   //
   CollectBistDataFromHob ();
-- 
1.9.5.msysgit.1

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[edk2] [PATCH v4 18/19] UefiCpuPkg: Add PiSmmCpuDxeSmm module IA32 files

[Michael Kinney]

Add module that initializes a CPU for the SMM environment and
installs the first level SMI handler.  This module along with the
SMM IPL and SMM Core provide the services required for
DXE_SMM_DRIVERS to register hardware and software SMI handlers.

CPU specific features are abstracted through the SmmCpuFeaturesLib

Platform specific features are abstracted through the
SmmCpuPlatformHookLib

Several PCDs are added to enable/disable features and configure
settings for the PiSmmCpuDxeSmm module

[jeff@intel.com: Fix code style issues reported by ECC]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.S| 165 +
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.asm  | 168 +
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c| 132 
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c  |  48 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S   | 191 +
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | 193 +
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S   | 911 
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm | 738 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.S|  84 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.asm  |  94 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c |  80 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h |  97 +++
 12 files changed, 2901 insertions(+)
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.S
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.asm
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.S
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.asm
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.S 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.S
new file mode 100644
index 000..75aa312
--- /dev/null
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.S
@@ -0,0 +1,165 @@
+#--
+#
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD 
License
+# which accompanies this distribution.  The full text of the license may be 
found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+#   MpFuncs.S
+#
+# Abstract:
+#
+#   This is the assembly code for Multi-processor S3 support
+#
+#--
+
+.equ   VacantFlag,   0x0
+.equ   NotVacantFlag,0xff
+
+.equ   LockLocation, RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart
+.equ   StackStart,   RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x04
+.equ   StackSize,RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x08
+.equ   RendezvousProc,   RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x0C
+.equ   GdtrProfile,  RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x10
+.equ   IdtrProfile,  RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x16
+.equ   BufferStart,  RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart + 0x1C
+
+#-
+#RendezvousFunnelProc  procedure follows. All APs execute their procedure. This
+#procedure serializes all the AP processors through an Init sequence. It must 
be
+#noted that APs arrive here very raw...ie: real mode, no stack.
+#ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
+#IS IN MACHINE CODE.
+#-
+#RendezvousFunnelProc (,MemAddress);
+
+ASM_GLOBAL ASM_PFX(RendezvousFunnelProc)
+ASM_PFX(RendezvousFunnelProc):
+RendezvousFunnelProcStart:
+
+# At this point CS = 0x(vv00) and ip= 0x0.
+
+.byte 0x8c,0xc8   # movax,  cs
+.byte 0x8e,0xd8   # movds,  ax
+.byte 0x8e,0xc0   # moves,  ax
+.byte 0x8e,0xd0   # movss,  ax
+.byte 

Re: [edk2] [PATCH v2] MdeModulePkg: Make the BmFindLoadOption function public

[Wang, Sunny (HPS SW)]

Hi Ray, 
Could you help to review the updated patch? 

Regards,
Sunny Wang

-Original Message-
From: Wang, Sunny (HPS SW) 
Sent: Tuesday, October 13, 2015 6:10 PM
To: edk2-devel@lists.01.org
Cc: El-Haj-Mahmoud, Samer; Wang, Sunny (HPS SW)
Subject: [PATCH v2] MdeModulePkg: Make the BmFindLoadOption function public

Make the BmFindLoadOption function public

Contributed-under: TianoCore Contribution Agreement 1.0

Signed-off-by: Sunny Wang 
Reviewed-by: Samer El-Haj-Mahmoud 
---
 MdeModulePkg/Include/Library/UefiBootManagerLib.h  | 22 ++
 MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c   | 10 +-
 .../Library/UefiBootManagerLib/BmLoadOption.c  |  4 +++-
 .../Library/UefiBootManagerLib/InternalBm.h| 22 +-
 4 files changed, 31 insertions(+), 27 deletions(-)

diff --git a/MdeModulePkg/Include/Library/UefiBootManagerLib.h 
b/MdeModulePkg/Include/Library/UefiBootManagerLib.h
index 5538d90..54a6713 100644
--- a/MdeModulePkg/Include/Library/UefiBootManagerLib.h
+++ b/MdeModulePkg/Include/Library/UefiBootManagerLib.h
@@ -2,6 +2,7 @@
   Provide Boot Manager related library APIs.
 
 Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.
+(C) Copyright 2015 Hewlett Packard Enterprise Development LP
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License  which accompanies this 
distribution.  The full text of the license may be found at @@ -222,6 +223,27 
@@ EfiBootManagerSortLoadOptionVariable (
   IN SORT_COMPARE  CompareFunction
   );
 
+/**
+  Return the index of the load option in the load option array.
+
+  The function consider two load options are equal when the  
+ OptionType, Attributes, Description, FilePath and OptionalData are equal.
+
+  @param KeyPointer to the load option to be found.
+  @param Array  Pointer to the array of load options to be found.
+  @param Count  Number of entries in the Array.
+
+  @retval -1  Key wasn't found in the Array.
+  @retval 0 ~ Count-1 The index of the Key in the Array.
+**/
+INTN
+EFIAPI
+EfiBootManagerFindLoadOption (
+  IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Key,
+  IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Array,
+  IN UINTN  Count
+  );
+
 //
 // Boot Manager hot key library functions.
 //
diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index 8f14cf6..aef2e7b 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1,8 +1,8 @@
 /** @file
   Library functions which relates with booting.
 
-(C) Copyright 2015 Hewlett-Packard Development Company, L.P.  Copyright 
(c) 2011 - 2015, Intel Corporation. All rights reserved.
+(C) Copyright 2015 Hewlett Packard Enterprise Development LP
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License  which accompanies this 
distribution.  The full text of the license may be found at @@ -206,7 +206,7 @@ 
BmFindBootOptionInVariable (
   if (OptionNumber == LoadOptionNumberUnassigned) {
 BootOptions = EfiBootManagerGetLoadOptions (, 
LoadOptionTypeBoot);
 
-Index = BmFindLoadOption (OptionToFind, BootOptions, BootOptionCount);
+Index = EfiBootManagerFindLoadOption (OptionToFind, BootOptions, 
+ BootOptionCount);
 if (Index != -1) {
   OptionNumber = BootOptions[Index].OptionNumber;
 }
@@ -2165,7 +2165,7 @@ EfiBootManagerRefreshAllBootOption (
   // Only check those added by BDS
   // so that the boot options added by end-user or OS installer won't be 
deleted
   //
-  if (BmFindLoadOption ([Index], BootOptions, 
BootOptionCount) == (UINTN) -1) {
+  if (EfiBootManagerFindLoadOption ([Index], 
+ BootOptions, BootOptionCount) == (UINTN) -1) {
 Status = EfiBootManagerDeleteLoadOptionVariable 
(NvBootOptions[Index].OptionNumber, LoadOptionTypeBoot);
 //
 // Deleting variable with current variable implementation shouldn't 
fail.
@@ -2179,7 +2179,7 @@ EfiBootManagerRefreshAllBootOption (
   // Add new EFI boot options to NV
   //
   for (Index = 0; Index < BootOptionCount; Index++) {
-if (BmFindLoadOption ([Index], NvBootOptions, 
NvBootOptionCount) == (UINTN) -1) {
+if (EfiBootManagerFindLoadOption ([Index], 
+ NvBootOptions, NvBootOptionCount) == (UINTN) -1) {
   EfiBootManagerAddLoadOptionVariable ([Index], (UINTN) -1);
   //
   // Try best to add the boot options so continue upon failure.
@@ -2260,7 +2260,7 @@ BmRegisterBootManagerMenu (
 UINTN   BootOptionCount;
 
 BootOptions = EfiBootManagerGetLoadOptions (, 
LoadOptionTypeBoot);
-ASSERT (BmFindLoadOption (BootOption, BootOptions, BootOptionCount) == -1);
+ASSERT (EfiBootManagerFindLoadOption (BootOption, 

[edk2] [PATCH v4 03/19] UefiCpuPkg: CpuDxe: broadcast MTRR changes to APs

[Michael Kinney]

From: edk2-devel 

The Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuArchDxe
driver applies any MTRR changes to APs, if the
EFI_MP_SERVICES_PROTOCOL is available. We should do the same.

Additionally, the broadcast should occur at MP startup as well,
not only when MTRR settings are changed. The inspiration is
taken from

  Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuMpDxe/

(see the EarlyMpInit() function and its call sites in
"ProcessorConfig.c").

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek 
Reviewed-by: Jeff Fan 
Reviewed-by: Michael Kinney 
---
 UefiCpuPkg/CpuDxe/CpuDxe.c | 26 ++
 UefiCpuPkg/CpuDxe/CpuMp.c  | 34 +-
 UefiCpuPkg/CpuDxe/CpuMp.h  | 13 +
 3 files changed, 72 insertions(+), 1 deletion(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index c9df4e1..daf97bd 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -350,6 +350,9 @@ CpuSetMemoryAttributes (
 {
   RETURN_STATUS Status;
   MTRR_MEMORY_CACHE_TYPECacheType;
+  EFI_STATUSMpStatus;
+  EFI_MP_SERVICES_PROTOCOL  *MpService;
+  MTRR_SETTINGS MtrrSettings;
 
   if (!IsMtrrSupported ()) {
 return EFI_UNSUPPORTED;
@@ -405,6 +408,29 @@ CpuSetMemoryAttributes (
  CacheType
  );
 
+  if (!RETURN_ERROR (Status)) {
+MpStatus = gBS->LocateProtocol (
+  ,
+  NULL,
+  (VOID **)
+  );
+//
+// Synchronize the update with all APs
+//
+if (!EFI_ERROR (MpStatus)) {
+  MtrrGetAllMtrrs ();
+  MpStatus = MpService->StartupAllAPs (
+  MpService,  // This
+  SetMtrrsFromBuffer, // Procedure
+  TRUE,   // SingleThread
+  NULL,   // WaitEvent
+  0,  // TimeoutInMicrosecsond
+  ,  // ProcedureArgument
+  NULL// FailedCpuList
+  );
+  ASSERT (MpStatus == EFI_SUCCESS || MpStatus == EFI_NOT_STARTED);
+}
+  }
   return (EFI_STATUS) Status;
 }
 
diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
index da3686e..fbe43f5 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.c
+++ b/UefiCpuPkg/CpuDxe/CpuMp.c
@@ -1626,6 +1626,22 @@ ExitBootServicesCallback (
 }
 
 /**
+  A minimal wrapper function that allows MtrrSetAllMtrrs() to be passed to
+  EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() as Procedure.
+
+  @param[in] Buffer  Pointer to an MTRR_SETTINGS object, to be passed to
+ MtrrSetAllMtrrs().
+**/
+VOID
+EFIAPI
+SetMtrrsFromBuffer (
+  IN VOID *Buffer
+  )
+{
+  MtrrSetAllMtrrs (Buffer);
+}
+
+/**
   Initialize Multi-processor support.
 
 **/
@@ -1634,7 +1650,8 @@ InitializeMpSupport (
   VOID
   )
 {
-  EFI_STATUS Status;
+  EFI_STATUSStatus;
+  MTRR_SETTINGS MtrrSettings;
 
   gMaxLogicalProcessorNumber = (UINTN) PcdGet32 
(PcdCpuMaxLogicalProcessorNumber);
   if (gMaxLogicalProcessorNumber < 1) {
@@ -1690,6 +1707,21 @@ InitializeMpSupport (
   //
   CollectBistDataFromHob ();
 
+  //
+  // Synchronize MTRR settings to APs.
+  //
+  MtrrGetAllMtrrs ();
+  Status = mMpServicesTemplate.StartupAllAPs (
+ , // This
+ SetMtrrsFromBuffer,   // Procedure
+ TRUE, // SingleThread
+ NULL, // WaitEvent
+ 0,// TimeoutInMicrosecsond
+ ,// ProcedureArgument
+ NULL  // FailedCpuList
+ );
+  ASSERT (Status == EFI_SUCCESS || Status == EFI_NOT_STARTED);
+
   Status = gBS->InstallMultipleProtocolInterfaces (
   ,
   ,  ,
diff --git a/UefiCpuPkg/CpuDxe/CpuMp.h b/UefiCpuPkg/CpuDxe/CpuMp.h
index d2866e4..503f3ae 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.h
+++ b/UefiCpuPkg/CpuDxe/CpuMp.h
@@ -643,5 +643,18 @@ ResetApStackless (
   IN UINT32 ProcessorId
   );
 
+/**
+  A minimal wrapper function that allows MtrrSetAllMtrrs() to be passed to
+  EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() as Procedure.
+
+  @param[in] Buffer  Pointer to an MTRR_SETTINGS object, to be passed to
+ MtrrSetAllMtrrs().
+**/
+VOID
+EFIAPI
+SetMtrrsFromBuffer (
+  IN VOID *Buffer
+  );
+
 #endif // _CPU_MP_H_
 
-- 
1.9.5.msysgit.1

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[edk2] [PATCH v4 01/19] UefiCpuPkg: Update CPU MP drivers to support single CPU configuration

[Michael Kinney]

Only perform AP detection if PcdCpuMaxLogicalProcessorNumber > 1
Only free AP related structures of they were allocated

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
---
 UefiCpuPkg/CpuDxe/CpuMp.c  | 49 --
 UefiCpuPkg/CpuMpPei/CpuMpPei.c | 34 +
 2 files changed, 48 insertions(+), 35 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
index 4ddcca2..da3686e 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.c
+++ b/UefiCpuPkg/CpuDxe/CpuMp.c
@@ -1642,35 +1642,40 @@ InitializeMpSupport (
 return;
   }
 
-  if (gMaxLogicalProcessorNumber == 1) {
-return;
-  }
 
-  gApStackSize = (UINTN) PcdGet32 (PcdCpuApStackSize);
-  ASSERT ((gApStackSize & (SIZE_4KB - 1)) == 0);
 
-  mApStackStart = AllocatePages (EFI_SIZE_TO_PAGES (gMaxLogicalProcessorNumber 
* gApStackSize));
-  ASSERT (mApStackStart != NULL);
+  InitMpSystemData ();
 
   //
-  // the first buffer of stack size used for common stack, when the amount of 
AP
-  // more than 1, we should never free the common stack which maybe used for 
AP reset.
+  // Only perform AP detection if PcdCpuMaxLogicalProcessorNumber is greater 
than 1
   //
-  mCommonStack = mApStackStart;
-  mTopOfApCommonStack = (UINT8*) mApStackStart + gApStackSize;
-  mApStackStart = mTopOfApCommonStack;
+  if (gMaxLogicalProcessorNumber > 1) {
 
-  InitMpSystemData ();
+gApStackSize = (UINTN) PcdGet32 (PcdCpuApStackSize);
+ASSERT ((gApStackSize & (SIZE_4KB - 1)) == 0);
+
+mApStackStart = AllocatePages (EFI_SIZE_TO_PAGES 
(gMaxLogicalProcessorNumber * gApStackSize));
+ASSERT (mApStackStart != NULL);
+
+//
+// the first buffer of stack size used for common stack, when the amount 
of AP
+// more than 1, we should never free the common stack which maybe used for 
AP reset.
+//
+mCommonStack = mApStackStart;
+mTopOfApCommonStack = (UINT8*) mApStackStart + gApStackSize;
+mApStackStart = mTopOfApCommonStack;
 
-  PrepareAPStartupCode ();
+PrepareAPStartupCode ();
 
-  StartApsStackless ();
+StartApsStackless ();
+  }
 
   DEBUG ((DEBUG_INFO, "Detect CPU count: %d\n", 
mMpSystemData.NumberOfProcessors));
   if (mMpSystemData.NumberOfProcessors == 1) {
 FreeApStartupCode ();
-FreePages (mCommonStack, EFI_SIZE_TO_PAGES (gMaxLogicalProcessorNumber * 
gApStackSize));
-return;
+if (mCommonStack != NULL) {
+  FreePages (mCommonStack, EFI_SIZE_TO_PAGES (gMaxLogicalProcessorNumber * 
gApStackSize));
+}
   }
 
   mMpSystemData.CpuDatas = ReallocatePool (
@@ -1692,10 +1697,12 @@ InitializeMpSupport (
   );
   ASSERT_EFI_ERROR (Status);
 
-  if (mMpSystemData.NumberOfProcessors < gMaxLogicalProcessorNumber) {
-FreePages (mApStackStart, EFI_SIZE_TO_PAGES (
-(gMaxLogicalProcessorNumber - 
mMpSystemData.NumberOfProcessors) *
-gApStackSize));
+  if (mMpSystemData.NumberOfProcessors > 1 && mMpSystemData.NumberOfProcessors 
< gMaxLogicalProcessorNumber) {
+if (mApStackStart != NULL) {
+  FreePages (mApStackStart, EFI_SIZE_TO_PAGES (
+  (gMaxLogicalProcessorNumber - 
mMpSystemData.NumberOfProcessors) *
+  gApStackSize));
+}
   }
 
   Status = gBS->CreateEvent (
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.c b/UefiCpuPkg/CpuMpPei/CpuMpPei.c
index d5bc0c9..8e35f28 100644
--- a/UefiCpuPkg/CpuMpPei/CpuMpPei.c
+++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.c
@@ -357,22 +357,28 @@ CountProcessorNumber (
   // Store BSP's MTRR setting
   //
   MtrrGetAllMtrrs (>MtrrTable);
+
   //
-  // Send broadcast IPI to APs to wakeup APs
-  //
-  PeiCpuMpData->InitFlag = 1;
-  WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);
-  //
-  // Wait for AP task to complete and then exit.
-  //
-  MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
-  PeiCpuMpData->InitFlag  = 0;
-  PeiCpuMpData->CpuCount += (UINT32) 
PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;
-  ASSERT (PeiCpuMpData->CpuCount <= PcdGet32(PcdCpuMaxLogicalProcessorNumber));
-  //
-  // Sort BSP/Aps by CPU APIC ID in ascending order
+  // Only perform AP detection if PcdCpuMaxLogicalProcessorNumber is greater 
than 1
   //
-  SortApicId (PeiCpuMpData);
+  if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) {
+//
+// Send broadcast IPI to APs to wakeup APs
+//
+PeiCpuMpData->InitFlag = 1;
+WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);
+//
+// Wait for AP task to complete and then exit.
+//
+MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
+PeiCpuMpData->InitFlag = 0;
+PeiCpuMpData->CpuCount += 
(UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;
+ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 
(PcdCpuMaxLogicalProcessorNumber));
+//
+// Sort BSP/Aps by CPU APIC ID in ascending order
+//
+SortApicId 

[edk2] [PATCH v4 12/19] UefiCpuPkg: Add SMM CPU Service Protocol

[Michael Kinney]

Add definition of the SMM CPU Service Protocol that is produced by
the PiSmmCpuDxeSmm module.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
---
 UefiCpuPkg/Include/Protocol/SmmCpuService.h | 209 
 1 file changed, 209 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Protocol/SmmCpuService.h

diff --git a/UefiCpuPkg/Include/Protocol/SmmCpuService.h 
b/UefiCpuPkg/Include/Protocol/SmmCpuService.h
new file mode 100644
index 000..9aced54
--- /dev/null
+++ b/UefiCpuPkg/Include/Protocol/SmmCpuService.h
@@ -0,0 +1,209 @@
+/** @file
+SMM CPU Service protocol definition.
+
+Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _SMM_CPU_SERVICE_PROTOCOL_H_
+#define _SMM_CPU_SERVICE_PROTOCOL_H_
+
+//
+// Share some definitions with MP Services and CPU Arch Protocol
+//
+#include 
+#include 
+
+#define EFI_SMM_CPU_SERVICE_PROTOCOL_GUID \
+  { \
+0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 
0x35 } \
+  }
+
+typedef struct _EFI_SMM_CPU_SERVICE_PROTOCOL EFI_SMM_CPU_SERVICE_PROTOCOL;
+
+//
+// Protocol functions
+//
+
+/**
+  Gets processor information on the requested processor at the
+  instant this call is made. This service may only be called from the BSP.
+
+  @param[in]  This  A pointer to the 
EFI_SMM_CPU_SERVICE_PROTOCOL
+instance.
+  @param[in]  ProcessorNumber   The handle number of processor.
+  @param[out] ProcessorInfoBuffer   A pointer to the buffer where information 
for
+the requested processor is deposited.
+
+  @retval EFI_SUCCESS Processor information was returned.
+  @retval EFI_DEVICE_ERRORThe calling processor is an AP.
+  @retval EFI_INVALID_PARAMETER   ProcessorInfoBuffer is NULL.
+  @retval EFI_NOT_FOUND   The processor with the handle specified by
+  ProcessorNumber does not exist in the 
platform.
+**/
+typedef
+EFI_STATUS
+(EFIAPI * EFI_SMM_GET_PROCESSOR_INFO) (
+  IN CONST EFI_SMM_CPU_SERVICE_PROTOCOL *This,
+  IN   UINTNProcessorNumber,
+  OUT  EFI_PROCESSOR_INFORMATION*ProcessorInfoBuffer
+  );
+
+/**
+  This service switches the requested AP to be the BSP from that point onward.
+  This service changes the BSP for all purposes.   This call can only be 
performed
+  by the current BSP.
+
+  This service switches the requested AP to be the BSP from that point onward.
+  This service changes the BSP for all purposes. The new BSP can take over the
+  execution of the old BSP and continue seamlessly from where the old one left
+  off.
+
+  If the BSP cannot be switched prior to the return from this service, then
+  EFI_UNSUPPORTED must be returned.
+
+  @param[in] This  A pointer to the EFI_SMM_CPU_SERVICE_PROTOCOL 
instance.
+  @param[in] ProcessorNumber   The handle number of AP that is to become the 
new
+   BSP. The range is from 0 to the total number of
+   logical processors minus 1.
+
+  @retval EFI_SUCCESS BSP successfully switched.
+  @retval EFI_UNSUPPORTED Switching the BSP cannot be completed prior 
to
+  this service returning.
+  @retval EFI_UNSUPPORTED Switching the BSP is not supported.
+  @retval EFI_SUCCESS The calling processor is an AP.
+  @retval EFI_NOT_FOUND   The processor with the handle specified by
+  ProcessorNumber does not exist.
+  @retval EFI_INVALID_PARAMETER   ProcessorNumber specifies the current BSP or
+  a disabled AP.
+  @retval EFI_NOT_READY   The specified AP is busy.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI * EFI_SMM_SWITCH_BSP) (
+  IN CONST EFI_SMM_CPU_SERVICE_PROTOCOL *This,
+  IN   UINTNProcessorNumber
+  );
+
+/**
+  Notify that a new processor has been added to the system.
+
+  The SMM CPU driver should add the processor to the SMM CPU list.
+
+  If the processor is disabled it won't participate any SMI handler during 
subsequent SMIs.
+
+  @param  This  A pointer to the 
EFI_SMM_CPU_SERVICE_PROTOCOL instance.
+  @param  ProcessorId   The hardware ID of the processor.
+  @param  ProcessorNumber   The handle number of processor.
+  @param  ProcessorResource A pointer to EFI_SMM_PROCESSOR_RESOURCE 
which holds 

[edk2] [PATCH v4 16/19] UefiCpuPkg: Update DEC/DSC files for new includes and libraries

[Michael Kinney]

Add SmmCpuPlatformHookLib library class declaration
Add SmmCpuFeaturesLib library class declaration
Add gEfiSmmCpuServiceProtocolGuid protocol declaration
Build SmmCpuPlatformHookLibNull library instance
Build SmmCpuFeaturesLib library instance

Changes between [PATCH v1] and [PATCH v2]:
1) Use module type specific CpuExceptionHandlerLib in DSC file
   instead of Null library instance

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
Cc: Laszlo Ersek 
---
 UefiCpuPkg/UefiCpuPkg.dec | 13 -
 UefiCpuPkg/UefiCpuPkg.dsc | 10 --
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index fe9b2a5..4f7065f 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -41,11 +41,22 @@
   ##  @libraryclass  Provides platform specific initialization functions in 
the SEC phase.
   ##
   PlatformSecLib|Include/Library/PlatformSecLib.h
-
   
+  ##  @libraryclass  Public include file for the SMM CPU Platform Hook Library.
+  ##
+  SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h
+  
+  ##  @libraryclass  Provides the CPU specific programming for PiSmmCpuDxeSmm 
module.
+  ##
+  SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h
+
 [Guids]
   gUefiCpuPkgTokenSpaceGuid  = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 
0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
 
+[Protocols]
+  ## Include/Protocol/SmmCpuService.h
+  gEfiSmmCpuServiceProtocolGuid  = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 
0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
+  
 #
 # [Error.gUefiCpuPkgTokenSpaceGuid]
 #   0x8001 | Invalid value provided.
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 68400e3..961c970 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -32,6 +32,7 @@
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
   DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf 
 
   
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
   DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
   UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
@@ -51,14 +52,16 @@
   DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
   LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
   
ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
-  
CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
   
SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
   SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf
+  
SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
+  SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
   
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
   
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
 
 [LibraryClasses.common.SEC]
   PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
+  
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
   
 [LibraryClasses.common.PEIM]
   
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
@@ -74,11 +77,13 @@
 [LibraryClasses.common.DXE_DRIVER]
   
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+  
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
 
 [LibraryClasses.common.DXE_SMM_DRIVER]
   
SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
   
MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+  
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
 
 #
 # Drivers/Libraries within this package
@@ -101,8 +106,9 @@
   UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
   UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
   UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
+  UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
+  UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
   UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
   UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
   UefiCpuPkg/SecCore/SecCore.inf
   UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
-
-- 
1.9.5.msysgit.1

___

[edk2] [PATCH v4 08/19] UefiCpuPkg: Add SecCore module

[Michael Kinney]

Add SecCore module that uses the PlatformSecLib class for platform
specific actions.  The SecCore module also uses a new PCD to
configure the size of the stack used in the SEC phase.  If the
stack size PCD is set to 0, the stack is configured to use half
of the available temporary RAM.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
---
 UefiCpuPkg/SecCore/FindPeiCore.c   | 198 ++
 UefiCpuPkg/SecCore/Ia32/ResetVec.asm16 | 106 
 UefiCpuPkg/SecCore/Ia32/ResetVec.nasmb | 103 
 UefiCpuPkg/SecCore/SecCore.inf |  72 
 UefiCpuPkg/SecCore/SecCore.uni | Bin 0 -> 2908 bytes
 UefiCpuPkg/SecCore/SecCoreExtra.uni| Bin 0 -> 1316 bytes
 UefiCpuPkg/SecCore/SecMain.c   | 295 +
 UefiCpuPkg/SecCore/SecMain.h   | 109 
 8 files changed, 883 insertions(+)
 create mode 100644 UefiCpuPkg/SecCore/FindPeiCore.c
 create mode 100644 UefiCpuPkg/SecCore/Ia32/ResetVec.asm16
 create mode 100644 UefiCpuPkg/SecCore/Ia32/ResetVec.nasmb
 create mode 100644 UefiCpuPkg/SecCore/SecCore.inf
 create mode 100644 UefiCpuPkg/SecCore/SecCore.uni
 create mode 100644 UefiCpuPkg/SecCore/SecCoreExtra.uni
 create mode 100644 UefiCpuPkg/SecCore/SecMain.c
 create mode 100644 UefiCpuPkg/SecCore/SecMain.h

diff --git a/UefiCpuPkg/SecCore/FindPeiCore.c b/UefiCpuPkg/SecCore/FindPeiCore.c
new file mode 100644
index 000..60ccaa9
--- /dev/null
+++ b/UefiCpuPkg/SecCore/FindPeiCore.c
@@ -0,0 +1,198 @@
+/** @file
+  Locate the entry point for the PEI Core
+
+  Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include 
+#include 
+#include 
+
+#include "SecMain.h"
+
+/**
+  Find core image base.
+
+  @param   BootFirmwareVolumePtrPoint to the boot firmware volume.
+  @param   SecCoreImageBase The base address of the SEC core image.
+  @param   PeiCoreImageBase The base address of the PEI core image.
+
+**/
+EFI_STATUS
+EFIAPI
+FindImageBase (
+  IN  EFI_FIRMWARE_VOLUME_HEADER   *BootFirmwareVolumePtr,
+  OUT EFI_PHYSICAL_ADDRESS *SecCoreImageBase,
+  OUT EFI_PHYSICAL_ADDRESS *PeiCoreImageBase
+  )
+{
+  EFI_PHYSICAL_ADDRESSCurrentAddress;
+  EFI_PHYSICAL_ADDRESSEndOfFirmwareVolume;
+  EFI_FFS_FILE_HEADER *File;
+  UINT32  Size;
+  EFI_PHYSICAL_ADDRESSEndOfFile;
+  EFI_COMMON_SECTION_HEADER   *Section;
+  EFI_PHYSICAL_ADDRESSEndOfSection;
+
+  *SecCoreImageBase = 0;
+  *PeiCoreImageBase = 0;
+
+  CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) BootFirmwareVolumePtr;
+  EndOfFirmwareVolume = CurrentAddress + BootFirmwareVolumePtr->FvLength;
+
+  //
+  // Loop through the FFS files in the Boot Firmware Volume
+  //
+  for (EndOfFile = CurrentAddress + BootFirmwareVolumePtr->HeaderLength; ; ) {
+
+CurrentAddress = (EndOfFile + 7) & 0xfff8ULL;
+if (CurrentAddress > EndOfFirmwareVolume) {
+  return EFI_NOT_FOUND;
+}
+
+File = (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress;
+if (IS_FFS_FILE2 (File)) {
+  Size = FFS_FILE2_SIZE (File);
+  if (Size <= 0x00FF) {
+return EFI_NOT_FOUND;
+  }
+} else {
+  Size = FFS_FILE_SIZE (File);
+  if (Size < sizeof (EFI_FFS_FILE_HEADER)) {
+return EFI_NOT_FOUND;
+  }
+}
+
+EndOfFile = CurrentAddress + Size;
+if (EndOfFile > EndOfFirmwareVolume) {
+  return EFI_NOT_FOUND;
+}
+
+//
+// Look for SEC Core / PEI Core files
+//
+if (File->Type != EFI_FV_FILETYPE_SECURITY_CORE &&
+File->Type != EFI_FV_FILETYPE_PEI_CORE) {
+  continue;
+}
+
+//
+// Loop through the FFS file sections within the FFS file
+//
+if (IS_FFS_FILE2 (File)) {
+  EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof 
(EFI_FFS_FILE_HEADER2));
+} else {
+  EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof 
(EFI_FFS_FILE_HEADER));
+}
+for (;;) {
+  CurrentAddress = (EndOfSection + 3) & 0xfffcULL;
+  Section = (EFI_COMMON_SECTION_HEADER*)(UINTN) CurrentAddress;
+
+  if (IS_SECTION2 (Section)) {
+Size = SECTION2_SIZE (Section);
+if (Size <= 0x00FF) {
+  return EFI_NOT_FOUND;
+}
+  } else {
+Size = SECTION_SIZE (Section);
+if (Size < sizeof (EFI_COMMON_SECTION_HEADER)) {
+  return EFI_NOT_FOUND;
+}
+  }
+
+  EndOfSection 

[edk2] [PATCH v4 05/19] UefiCpuPkg: Add Cpuid.h include files for CPUID related defines

[Michael Kinney]

Move CPUID related defines from LocalApic.h to Cpuid.h
Update LocalApicLib instances to include Cpuid.h
Update CpuMpPei module to include Cpuid.h

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney 
---
 UefiCpuPkg/CpuMpPei/CpuMpPei.h |  1 +
 UefiCpuPkg/Include/Register/Cpuid.h| 51 ++
 UefiCpuPkg/Include/Register/LocalApic.h| 13 --
 UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c |  1 +
 .../BaseXApicX2ApicLib/BaseXApicX2ApicLib.c|  1 +
 5 files changed, 54 insertions(+), 13 deletions(-)
 create mode 100644 UefiCpuPkg/Include/Register/Cpuid.h

diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPei.h
index 19e649e..9325a12 100644
--- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h
+++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.h
@@ -22,6 +22,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 #include 
diff --git a/UefiCpuPkg/Include/Register/Cpuid.h 
b/UefiCpuPkg/Include/Register/Cpuid.h
new file mode 100644
index 000..6730551
--- /dev/null
+++ b/UefiCpuPkg/Include/Register/Cpuid.h
@@ -0,0 +1,51 @@
+/** @file
+CPUID Definitions.
+
+CPUID definitions based on contents of the Intel(R) 64 and IA-32 Architectures
+Software Developer's Manual, Volume 2A, CPUID instruction.
+
+Copyright (c) 2015, Intel Corporation. All rights reserved.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __CPUID_H__
+#define __CPUID_H__
+
+//
+// Definitions for CPUID instruction
+//
+#define CPUID_SIGNATURE 0x0
+
+#define CPUID_VERSION_INFO  0x1
+
+#define CPUID_CACHE_INFO0x2
+
+#define CPUID_SERIAL_NUMBER 0x3
+
+#define CPUID_CACHE_PARAMS  0x4
+
+#define CPUID_EXTENDED_TOPOLOGY 0xB
+#define   CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID  0x0
+#define   CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT  0x1
+#define   CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE 0x2
+
+#define CPUID_EXTENDED_FUNCTION 0x8000
+
+#define CPUID_EXTENDED_CPU_SIG  0x8001
+
+#define CPUID_BRAND_STRING1 0x8002
+
+#define CPUID_BRAND_STRING2 0x8003
+
+#define CPUID_BRAND_STRING3 0x8004
+
+#define CPUID_VIR_PHY_ADDRESS_SIZE  0x8008
+
+#endif
diff --git a/UefiCpuPkg/Include/Register/LocalApic.h 
b/UefiCpuPkg/Include/Register/LocalApic.h
index cf335a6..346cce6 100644
--- a/UefiCpuPkg/Include/Register/LocalApic.h
+++ b/UefiCpuPkg/Include/Register/LocalApic.h
@@ -21,19 +21,6 @@
 #define MSR_IA32_APIC_BASE_ADDRESS  0x1B
 
 //
-// Definitions for CPUID instruction
-//
-#define CPUID_SIGNATURE 0x0
-#define CPUID_VERSION_INFO  0x1
-#define CPUID_CACHE_PARAMS  0x4
-#define CPUID_EXTENDED_TOPOLOGY 0xB
-#define   CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID 0x0
-#define   CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT 0x1
-#define   CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE0x2
-#define CPUID_EXTENDED_FUNCTION 0x8000
-#define CPUID_VIR_PHY_ADDRESS_SIZE  0x8008
-
-//
 // Definition for Local APIC registers and related values
 //
 #define XAPIC_ID_OFFSET 0x20
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c 
b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
index 08bcef7..6cf36cb 100644
--- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
@@ -14,6 +14,7 @@
 
 **/
 
+#include 
 #include 
 
 #include 
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c 
b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index 1a91116..0503942 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -15,6 +15,7 @@
 
 **/
 
+#include 
 #include 
 
 #include 
-- 
1.9.5.msysgit.1

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Re: [edk2] SMM core problems

[Dimitri]

> 
> UEFI spec has clear description about the configuration table for SMBIOS.
> 
> UEFI 2.5 page 103 and 104:
> "
> The following list shows the GUIDs for tables defined in some of the 
> industry standards. These
> industry standards define tables accessed as UEFI Configuration Tables 
> on UEFI-based systems. All
> the addresses reported in these table entries will be referenced as 
> physical and will not be fixed up
> when transition from preboot to runtime phase. This list is not 
> exhaustive and does not show GUIDs
> for all possible UEFI Configuration tables.
> "
> 
> It will be referenced as physical and will not be fixed up when 
> transition from preboot to runtime phase.
> 
> Thanks,
> Star

IMHO,

SMBIOS table guid about EPS only. Tables are stored in usual Runtime 
memory. This memory can be virtualized (see Andrew comment). EPS know 
nothing about it.

Thanks,
Dimitri




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Re: [edk2] [EDK II] implementing EFI_SMART_CARD_EDGE_PROTOCOL.GetData

[Nilesh]

Hi Andrew,

Thank so much for your detailed reply.

Best Regards,
Nilesh

-Original Message-
From: af...@apple.com [mailto:af...@apple.com] 
Sent: Thursday, October 15, 2015 8:42 PM
To: Nilesh 
Cc: edk2-devel@lists.01.org
Subject: Re: [edk2] [EDK II] implementing
EFI_SMART_CARD_EDGE_PROTOCOL.GetData


> On Oct 15, 2015, at 6:02 AM, Nilesh  wrote:
> 
> Hi,
> 
> 
> 
> The UEFI specification (version 2.5) describes 
> EFI_SMART_CARD_EDGE_PROTOCOL's 'GetData' function as follows -
> 
> "The function is generic for any kind of data, but driver and 
> application must share an EFI_GUID that identify the data." One of the 
> input parameters of this function is 'DataId', which is of type 
> 'EFI_GUID', and is used to define type of data to be retrieved.
> 
> 
> 
> The question is - how to share the EFI_GUID based information between 
> the driver and the application? The other functions of this protocol 
> does not provide any way to share such information. Is there any 
> standard mapping / information available for such EFI_GUIDs?
> 
> [ Note: There are couple of functions in this protocol (i.e. 
> 'SignData' and 'DecryptData'), which also accepts EFI_GUID parameters. 
> However, the expected EFI_GUID values of these parameters have been 
> defined in the UEFI specification along with the function description. 
> ]
> 
> 
> 
> I believe, the GetData function can expect Object IDs of the objects 
> present on the SmartCard to retrieve related data. Hence, it might be 
> helpful to have a mapping between these OIDs and EFI_GUIDs. 
> However,these Object IDs could be different for different type of 
> cards (i.e. PIV, openPGP etc), which makes it difficult to pre-define 
> them in Spec. But how this information can be shared between driver 
> and the app? Is it expected to have EFI_GUIDs defined per 
> SMART_CARD_EDGE _PROTOCOL implementation and shared using common header
file?
> 
> 
> 
> I am a newbie in EDK and Smart Card development. All comments and 
> suggestions are very much appreciated.
> 

Nilesh,

In general the use of EFI_GUID (UUID) as a name is like having an enumerated
type in the specification, but it has the side benefit that the enumeration
is not owned by the specification. So a vendor, OEM, BIOS Vendor, or even
other specification can define a value, and since it is a GUID/UUID that
value will never conflict with the UEFI specification, or any value used in
any other implementation. So the EFI_GUIDin the API is designed for
extensibility. Whom ever defines new GUIDs would define how it works. 

In general in the edk2 the package owner would add a GUID definition in the
packages GUID directory that included the GUID value, global C name and the
data structures associated with the GUID. The package .DEC file would also
get its [Guids] section updated for the new GUID. So you add
MyPackage/Include/Guid/NewGuid.h and update MyPackage/MyPackage.dec,
assuming MyPackage is the name of the package you own, and NewGuid is the
name of the GUID you defined. 

Thanks,

Andrew Fish

> 
> 
> Best Regards,
> 
> Nilesh
> 
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Re: [edk2] [PATCH v3 26/52] OvmfPkg: SmmCpuFeaturesLib: customize state save map format

[Paolo Bonzini]

On 18/10/2015 09:38, Jordan Justen wrote:
> > This adjusts the previously introduced state save map access functions, to
> > account for QEMU and KVM's 64-bit state save map following the AMD spec
> > rather than the Intel one.
>
> Shouldn't this layout match the processor being emulated? I think I
> recall hearing something about documentation?

Yes, exactly.  Intel doesn't document the placement of the descriptor
cache registers in the SMM state save map, so it's not possible to match
the processor anyway.

Paolo
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Re: [edk2] [PATCH v4 02/19] UefiCpuPkg: CpuDxe: Use PCD for AP detection timeout

[Laszlo Ersek]

On 10/19/15 09:44, Michael Kinney wrote:
> Use PcdCpuApInitTimeOutInMicroSeconds instead of hardcoded 100ms for
> the time to wait for all APs to respond to first INIT SIPI SIPI
> wake request.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Michael Kinney 
> Cc: Jeff Fan 
> Cc: Laszlo Ersek 
> ---
>  UefiCpuPkg/CpuDxe/ApStartup.c | 4 ++--
>  UefiCpuPkg/CpuDxe/CpuDxe.inf  | 5 +++--
>  2 files changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/UefiCpuPkg/CpuDxe/ApStartup.c b/UefiCpuPkg/CpuDxe/ApStartup.c
> index 38a9c0e..78fb26f 100644
> --- a/UefiCpuPkg/CpuDxe/ApStartup.c
> +++ b/UefiCpuPkg/CpuDxe/ApStartup.c
> @@ -452,9 +452,9 @@ StartApsStackless (
>  {
>SendInitSipiSipiAllExcludingSelf ((UINT32)(UINTN)(VOID*) StartupCode);
>//
> -  // Wait 100 milliseconds for APs to arrive at the ApEntryPoint routine
> +  // Wait for APs to arrive at the ApEntryPoint routine
>//
> -  MicroSecondDelay (100 * 1000);
> +  MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
>  
>return EFI_SUCCESS;
>  }
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
> index a251922..9db5303 100644
> --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
> +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
> @@ -84,8 +84,9 @@
>gEfiSecPlatformInformationPpiGuid ## UNDEFINED # HOB
>  
>  [Pcd]
> -  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber   ## CONSUMES
> -  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES
> +  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## CONSUMES
> +  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize  ## CONSUMES
> +  gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds  ## CONSUMES
>  
>  [Depex]
>TRUE
> 

This changes the value to 50 ms (as per DEC), but the same is used in
the corresponding PEIM, so it should be fine for hw platforms.

I'll write a patch for OVMF that sets the PCD to 1 full second (which
worked in Xiao Guangrong's testing).

Reviewed-by: Laszlo Ersek 

Thanks
Laszlo
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Re: [edk2] [PATCH v4 04/19] UefiCpuPkg: CpuDxe: Wait for APs to enter idle loop

[Laszlo Ersek]

comments below

On 10/19/15 09:44, Michael Kinney wrote:
> Address a race condition in first call to StartupAllAPs() with
> SingleThread set to TRUE in the MP initialization.  If the APs
> have not entered their idle loop before StartupAllAPs() is called,
> then some of the APs will be in an unexpected state, and
> StartupAllAPs() will hang.  This is the hang condition that is
> only seen when SingleThread parameter is set to TRUE and
> StartupAllAPs() is called very shortly after mAPsAlreadyInitFinished
> is set to TRUE that releases the APs to complete their initialization.
> 
> An internal function has been added to check if all APs are in the
> sleeping state in their idle loop.  On the first call to
> StartupAllAPs(), this internal function is used to make sure the
> APs are in a state that is compatible with StartupAllAPs() being
> called.

I think these paragraphs date back to the version of the patch where the
wait was still conditional on the StartupAllAPs() member being called.

... I think the first paragraph is precise enough (because it describes
symptoms / an actual reproducer), but the second paragraph should
reflect that the sleeping state is awaited unconditionally.

> The PcdCpuApInitTimeOutInMicroSeconds is used as the maximum wait
> time for the APs to enter their idle loop.

Makes sense I believe.

> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Michael Kinney 
> Cc: Jeff Fan 
> Cc: Laszlo Ersek 
> ---
>  UefiCpuPkg/CpuDxe/CpuMp.c | 62 
> +--
>  1 file changed, 60 insertions(+), 2 deletions(-)
> 
> diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
> index fbe43f5..7e7736c 100644
> --- a/UefiCpuPkg/CpuDxe/CpuMp.c
> +++ b/UefiCpuPkg/CpuDxe/CpuMp.c
> @@ -313,6 +313,47 @@ CheckAndUpdateAllAPsToIdleState (
>  }
>  
>  /**
> +  Check if all APs are in state CpuStateSleeping.
> +
> +  Return TRUE if all APs are in the CpuStateSleeping state.  Do not
> +  check the state of the BSP or any disabled APs.
> +
> +  @retval TRUE   All APs are in CpuStateSleeping state.
> +  @retval FALSE  One or more APs are not in CpuStateSleeping state.
> +
> +**/
> +BOOLEAN
> +CheckAllAPsSleeping (
> +  VOID
> +  )
> +{
> +  UINTN   ProcessorNumber;
> +  CPU_DATA_BLOCK  *CpuData;
> +
> +  for (ProcessorNumber = 0; ProcessorNumber < 
> mMpSystemData.NumberOfProcessors; ProcessorNumber++) {
> +CpuData = [ProcessorNumber];
> +if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT)) {
> +  //
> +  // Skip BSP
> +  //
> +  continue;
> +}
> +
> +if (!TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT)) {
> +  //
> +  // Skip Disabled processors
> +  //
> +  continue;
> +}
> +
> +if (GetApState (CpuData) != CpuStateSleeping) {
> +  return FALSE;
> +}
> +  }
> +  return TRUE;
> +}
> +
> +/**
>If the timeout expires before all APs returns from Procedure,
>we should forcibly terminate the executing AP and fill FailedList back
>by StartupAllAPs().
> @@ -1650,8 +1691,9 @@ InitializeMpSupport (
>VOID
>)
>  {
> -  EFI_STATUSStatus;
> -  MTRR_SETTINGS MtrrSettings;
> +  EFI_STATUS Status;
> +  MTRR_SETTINGS  MtrrSettings;
> +  UINTN  Timeout;
>  
>gMaxLogicalProcessorNumber = (UINTN) PcdGet32 
> (PcdCpuMaxLogicalProcessorNumber);
>if (gMaxLogicalProcessorNumber < 1) {
> @@ -1700,9 +1742,25 @@ InitializeMpSupport (
>   sizeof (CPU_DATA_BLOCK) * 
> mMpSystemData.NumberOfProcessors,
>   mMpSystemData.CpuDatas);
>  
> +  //
> +  // Release all APs to complete initialization and enter idle loop
> +  //
>mAPsAlreadyInitFinished = TRUE;
>  
>//
> +  // Wait for all APs to enter idle loop.
> +  //
> +  Timeout = 0;
> +  do {
> +if (CheckAllAPsSleeping ()) {
> +  break;
> +}
> +MicroSecondDelay (gPollInterval);

- I think gPollInterval is a good fit for this indeed, based on other
uses in the same file.

- IIRC the previous version used CpuPause(). I thought you would keep
CpuPause() in this loop, and measure the time that has passed, against a
timeout.

I think this solution is simpler however; I certainly don't "prefer"
CpuPause() over it.

But, do you agree that calling gBS->Stall() would be more consistent
with the rest of the file than a direct TimerLib API call? We already
have two

  gBS->Stall (gPollInterval);

calls. (Just a passing thought, I definitely don't "insist" on it.)

> +Timeout += gPollInterval;
> +  } while (Timeout <= PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
> +  ASSERT (Timeout <= PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
> +
> +  //
>// Update CPU healthy information from Guided HOB
>//
>CollectBistDataFromHob ();
> 

With the commit message update, and with or without the
MicroSecondDelay() ==> gBS->Stall() change:

Reviewed-by: Laszlo 

Re: [edk2] [PATCH v4 00/19] UefiCpuPkg: Add CPU SMM and SecCore

[Fan, Jeff]

This serial of patches s good to me! Thanks!

Reviewed-by: Jeff Fan 

-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Michael 
Kinney
Sent: Monday, October 19, 2015 3:45 PM
To: edk2-devel@lists.01.org
Subject: [edk2] [PATCH v4 00/19] UefiCpuPkg: Add CPU SMM and SecCore

Laszlo,

I have addressed the MP race conditions and have timeouts configurable using a 
PCD in the CpuDxe module in this revised patch series.  I picked up the patch 
from your series to sync MTRRs.  I have also removed trailing spaces from all 
new files in UefiCpuPkg and any files that were modified in UefiCpuPkg.

I have posted a V4 public branch at:

https://github.com/mdkinney/edk2/tree/AddSmmUefiCpuPkg_V4

Michael Kinney (18):
  UefiCpuPkg: Update CPU MP drivers to support single CPU configuration
  UefiCpuPkg: CpuDxe: Use PCD for AP detection timeout
  UefiCpuPkg: CpuDxe: Wait for APs to enter idle loop
  UefiCpuPkg: Add Cpuid.h include files for CPUID related defines
  UefiCpuPkg: Add SMM Communication PPI and Handler Modules
  UefiCpuPkg: Add PlatformSecLib
  UefiCpuPkg: Add SecCore module
  UefiCpuPkg: Add SecCore module and supporting library class and PCD
  UefiCpuPkg: Add SmmCpuFeaturesLib
  UefiCpuPkg: Add SmmCpuPlatformHookLib
  UefiCpuPkg: Add SMM CPU Service Protocol
  UefiCpuPkg: Add SMRAM Save State include file
  UefiCpuPkg: Add ACPI CPU Data include file
  UefiCpuPkg: Add CPU Hot Plug Data include file
  UefiCpuPkg: Update DEC/DSC files for new includes and libraries
  UefiCpuPkg: Add PiSmmCpuDxeSmm module no IA32/X64 files
  UefiCpuPkg: Add PiSmmCpuDxeSmm module IA32 files
  UefiCpuPkg: Add PiSmmCpuDxeSmm module X64 files

edk2-devel (1):
  UefiCpuPkg: CpuDxe: broadcast MTRR changes to APs

 UefiCpuPkg/CpuDxe/ApStartup.c  |4 +-
 UefiCpuPkg/CpuDxe/CpuDxe.c |   26 +
 UefiCpuPkg/CpuDxe/CpuDxe.inf   |5 +-
 UefiCpuPkg/CpuDxe/CpuMp.c  |  141 +-
 UefiCpuPkg/CpuDxe/CpuMp.h  |   13 +
 UefiCpuPkg/CpuMpPei/CpuMpPei.c |   34 +-
 UefiCpuPkg/CpuMpPei/CpuMpPei.h |1 +
 UefiCpuPkg/Include/AcpiCpuData.h   |   71 +
 UefiCpuPkg/Include/CpuHotPlugData.h|   33 +
 UefiCpuPkg/Include/Library/PlatformSecLib.h|   70 +
 UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h |  366 +
 UefiCpuPkg/Include/Library/SmmCpuPlatformHookLib.h |  109 ++
 UefiCpuPkg/Include/Protocol/SmmCpuService.h|  209 +++
 UefiCpuPkg/Include/Register/Cpuid.h|   51 +
 UefiCpuPkg/Include/Register/LocalApic.h|   13 -
 UefiCpuPkg/Include/Register/SmramSaveStateMap.h|  190 +++
 UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c |1 +
 .../BaseXApicX2ApicLib/BaseXApicX2ApicLib.c|1 +
 .../PlatformSecLibNull/PlatformSecLibNull.c|   90 ++
 .../PlatformSecLibNull/PlatformSecLibNull.inf  |   37 +
 .../PlatformSecLibNull/PlatformSecLibNull.uni  |  Bin 0 -> 1644 bytes
 .../Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c  |  562 
 .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf|   39 +
 .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.uni|  Bin 0 -> 1672 bytes
 .../SmmCpuPlatformHookLibNull.c|  108 ++
 .../SmmCpuPlatformHookLibNull.inf  |   40 +
 .../SmmCpuPlatformHookLibNull.uni  |  Bin 0 -> 1604 bytes
 .../PiSmmCommunication/PiSmmCommunicationPei.c |  425 ++
 .../PiSmmCommunication/PiSmmCommunicationPei.inf   |   70 +
 .../PiSmmCommunication/PiSmmCommunicationPei.uni   |  Bin 0 -> 2066 bytes
 .../PiSmmCommunicationPeiExtra.uni |  Bin 0 -> 1370 bytes
 .../PiSmmCommunication/PiSmmCommunicationPrivate.h |   30 +
 .../PiSmmCommunication/PiSmmCommunicationSmm.c |  269 
 .../PiSmmCommunication/PiSmmCommunicationSmm.inf   |   82 ++
 .../PiSmmCommunication/PiSmmCommunicationSmm.uni   |  Bin 0 -> 3004 bytes
 .../PiSmmCommunicationSmmExtra.uni |  Bin 0 -> 1392 bytes
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c  |  491 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c |  486 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.h |  181 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.S   |  165 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.asm |  168 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c   |  132 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c |   48 +
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S  |  191 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm|  193 +++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S  |  911 
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm|  738 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.S   |   84 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.asm |   94 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c  

Re: [edk2] [PATCH v3 04/52] UefiCpuPkg: CpuDxe: broadcast MTRR changes to APs

[Laszlo Ersek]

On 10/17/15 18:15, Kinney, Michael D wrote:
> Laszlo,
> 
> I agree with many of your points.
> 
> If you prefer, I can consolidate the UefiCpuPkg updates including 6
> items you list below into my UefiCpuPkg series and get that checked
> in first so you can focus on OVMF SMM.

That's greatly appreciated; I can see them in your v4.

Thank you!
Laszlo

> 
> Thanks,
> 
> Mike
> 
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>> Laszlo Ersek
>> Sent: Friday, October 16, 2015 11:04 PM
>> To: Kinney, Michael D; edk2-de...@ml01.01.org
>> Subject: Re: [edk2] [PATCH v3 04/52] UefiCpuPkg: CpuDxe: broadcast MTRR
>> changes to APs
>>
>> On 10/16/15 23:17, Kinney, Michael D wrote:
>>> Laszlo,
>>>
>>> Here is a proposed fix on top of your v3 patch services to address a
>>> race condition that was introduced by the v3 patch series call to
>>> StartupAllAPs() with SingleThread set to TRUE in the MP
>>> initialization.  If the APs have not entered their idle loop before
>>> StartupAllAPs() is called, then some of the APs will be in an
>>> unexpected state, and StartupAllAPs() will hang.  This is the hang
>>> condition that is only seen when SingleThread parameter is set to
>>> TRUE and StartupAllAPs() is called very shortly after
>>> mAPsAlreadyInitFinished is set to TRUE that releases the APs to
>>> complete their initialization.
>>>
>>> I added an internal function that checks to see if all APs are in the
>>> sleeping state in the idle loop.  On the first call to
>>> StartupAllAPs(), this internal function is used to make sure the APs
>>> are in a state that is compatible with StartupAllAPs() being used.  I
>>> put this check in the first call to StartupAllAPs(), so we do not
>>> take the delay to wait for the APs unconditionally in the MP init
>>> code.  Other work can get done while the APs work their way to their
>>> idle loop sleeping state.
>>>
>>> The one item remaining is to have a timeout with an ASSERT() if
>>> timeout is triggered in first call to StartupAllAPs() waiting for the
>>> APs to enter idle loop.
>>>
>>> I also reordered some of the actions InitializeMpSupport(), so the MP
>>> Services Protocol and call to StartupAllAPs() are done as late as
>>> possible to give APs more time to get to idle loop.
>>>
>>> Please merge this into your patch series.
>>
>> Many thanks for this!
>>
>> I have two comments:
>>
>>
>> First, I don't think that it is my patch "UefiCpuPkg: CpuDxe: broadcast
>> MTRR changes to APs" that *introduces* the race condition, with the
>> early call to StartupAllAps(). I believe that the race condition exists
>> in the current code, and my patch only exposes it.
>>
>> Namely, my patch adds the StartupAllAps() call right before the MP
>> services protocol interface is installed. Considering a case where my
>> patch is not applied, but another driver registers a protocol notify
>> callback for MP services, that callback would be invoked on the stack of
>> InstallMultipleProtocolInterfaces(), while some of the APs might not
>> have entered their idle loop yet. If the callback in that other driver
>> located the protocol instance quickly, and called StartupAllAps() with
>> similar arguments (which would be a valid thing to do), the same issue
>> could be triggered. So I think the race is already there; the protocol
>> interface gets installed too early.
>>
>> Which leads me to think that the code you add here under
>> (!mStartupAllAPsCalled) should be executed unconditionally, right after
>> "mAPsAlreadyInitFinished is set to TRUE that releases the APs to
>> complete their initialization". We shouldn't install the MP services
>> protocol interface until initialization is complete, and allows for any
>> kinds of calls through that interface.
>>
>>
>> Second, I think I'll put aside the SMM series for a short period, and
>> work on a smaller UefiCpuPkg + OvmfPkg series. I'm thinking about six
>> patches:
>>
>> (1) split out the crux of this patch (without the code rearrangement)
>> and state that it fixes the existent (although mostly un-triggered) race
>> condition
>>
>> (2) refine the above by introducing the timeout you mention. I'm thinking
>>
>>  GetTimeInNanoSecond (GetPerformanceCounter ())
>>
>> should be a good way to measure the elapsed time; it seems to be a
>> pattern used elsewhere in the tree. This will also require a new PCD.
>> What default would you suggest for the timeout?
>>
>> (3) add the rearrangement that gives more time to the APs to enter their
>> idle loops
>>
>> (4) Include my MTRR broadcast patch
>>
>> (5) Separately, implement your other suggestion with
>> gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds, from
>> .
>>
>> (6) Xiao Guangrong provided us with the info for wording a commit for
>> OvmfPkg where the timeout from (5) would be increased.
>>
>> Obviously I'll keep your authorship wherever appropriate.
>>
>> Once these are 

Re: [edk2] [PATCH v3 03/52] UefiCpuPkg: PiSmmCpuDxeSmm: do not execute RSM from 64-bit mode

[Fan, Jeff]

Paolo,

Thanks reporting this spec issue. We will forward it to SDM owner to address it.

Thanks!
Jeff

-Original Message-
From: Paolo Bonzini [mailto:pbonz...@redhat.com] 
Sent: Friday, October 16, 2015 4:38 PM
To: Yao, Jiewen; Fan, Jeff; Laszlo Ersek; edk2-de...@ml01.01.org
Cc: Kinney, Michael D
Subject: Re: [edk2] [PATCH v3 03/52] UefiCpuPkg: PiSmmCpuDxeSmm: do not execute 
RSM from 64-bit mode



On 16/10/2015 09:41, Yao, Jiewen wrote:
> Hello According to "IA32 SDM, page 1428, 4-330 Vol. 2B, RSM?Resume 
> from System Management Mode", I do not find word say: 64bit mode is 
> invalid. Would you please point out where you find "RSM is invalid in 
> 64-bit mode "?

It's in the heading.  It says

64-bit mode   Invalid
Compat/Leg mode   Valid

Paolo
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Re: [edk2] [PATCH v4 17/19] UefiCpuPkg: Add PiSmmCpuDxeSmm module no IA32/X64 files

[Laszlo Ersek]

On 10/19/15 09:44, Michael Kinney wrote:
> Add module that initializes a CPU for the SMM environment and
> installs the first level SMI handler.  This module along with the
> SMM IPL and SMM Core provide the services required for
> DXE_SMM_DRIVERS to register hardware and software SMI handlers.
> 
> CPU specific features are abstracted through the SmmCpuFeaturesLib
> 
> Platform specific features are abstracted through the
> SmmCpuPlatformHookLib
> 
> Several PCDs are added to enable/disable features and configure
> settings for the PiSmmCpuDxeSmm module
> 
> Changes between [PATCH v1] and [PATCH v2]:
> 1) Swap PTE init order for QEMU compatibility.
>Current PTE initialization algorithm works on HW but breaks QEMU
>emulator.  Update the PTE initialization order to be compatible
>with both.
> 2) Update comment block that describes 32KB SMBASE alignment requirement
>to match contents of Intel(R) 64 and IA-32 Architectures Software
>Developer's Manual
> 3) Remove BUGBUG comment and call to ClearSmi() that is not required.
>SMI should be cleared by root SMI handler.
> 
> [jeff@intel.com: Fix code style issues reported by ECC]
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Michael Kinney 
> Cc: Laszlo Ersek 
> Cc: Paolo Bonzini 
> 
> [pbonz...@redhat.com: InitPaging: prepare PT before filling in PDE]
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Paolo Bonzini 
> ---

Acked-by: Laszlo Ersek 

Thank you!
Laszlo

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Re: [edk2] [PATCH v3 03/52] UefiCpuPkg: PiSmmCpuDxeSmm: do not execute RSM from 64-bit mode

[Laszlo Ersek]

On 10/17/15 13:39, Paolo Bonzini wrote:
> 
> 
> On 16/10/2015 18:39, Kinney, Michael D wrote:
>> Paolo,
>>
>> Thanks for the reference.  We believe this is a document issue.
>>
>> We would prefer to drop this patch.
> 
> Fair enough.  Laszlo, please keep it in your branch for ease of testing
> but do not include it in the patches you send.

I'll follow your advice.

Thanks!
Laszlo

> It will take until Linux
> 4.4 before KVM is fixed.
> 
> Paolo
> 

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Re: [edk2] [PATCH v4 16/19] UefiCpuPkg: Update DEC/DSC files for new includes and libraries

[Laszlo Ersek]

On 10/19/15 09:44, Michael Kinney wrote:
> Add SmmCpuPlatformHookLib library class declaration
> Add SmmCpuFeaturesLib library class declaration
> Add gEfiSmmCpuServiceProtocolGuid protocol declaration
> Build SmmCpuPlatformHookLibNull library instance
> Build SmmCpuFeaturesLib library instance
> 
> Changes between [PATCH v1] and [PATCH v2]:
> 1) Use module type specific CpuExceptionHandlerLib in DSC file
>instead of Null library instance
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Michael Kinney 
> Cc: Laszlo Ersek 
> ---
>  UefiCpuPkg/UefiCpuPkg.dec | 13 -
>  UefiCpuPkg/UefiCpuPkg.dsc | 10 --
>  2 files changed, 20 insertions(+), 3 deletions(-)
> 
> diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
> index fe9b2a5..4f7065f 100644
> --- a/UefiCpuPkg/UefiCpuPkg.dec
> +++ b/UefiCpuPkg/UefiCpuPkg.dec
> @@ -41,11 +41,22 @@
>##  @libraryclass  Provides platform specific initialization functions in 
> the SEC phase.
>##
>PlatformSecLib|Include/Library/PlatformSecLib.h
> -
>
> +  ##  @libraryclass  Public include file for the SMM CPU Platform Hook 
> Library.
> +  ##
> +  SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h
> +  
> +  ##  @libraryclass  Provides the CPU specific programming for 
> PiSmmCpuDxeSmm module.
> +  ##
> +  SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h
> +
>  [Guids]
>gUefiCpuPkgTokenSpaceGuid  = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 
> 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
>  
> +[Protocols]
> +  ## Include/Protocol/SmmCpuService.h
> +  gEfiSmmCpuServiceProtocolGuid  = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 
> 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
> +  
>  #
>  # [Error.gUefiCpuPkgTokenSpaceGuid]
>  #   0x8001 | Invalid value provided.
> diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
> index 68400e3..961c970 100644
> --- a/UefiCpuPkg/UefiCpuPkg.dsc
> +++ b/UefiCpuPkg/UefiCpuPkg.dsc
> @@ -32,6 +32,7 @@
>BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
>CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
>DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
> +  
> SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf  

The trailing spaces are still there on this line.

(If you remove them, you can append my R-b immediately to the end of the
commit message, please refer to
.)

Thanks!
Laszlo

>
> DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
>DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
>UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
> @@ -51,14 +52,16 @@
>DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
>LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
>
> ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
> -  
> CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
>
> SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
>SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf
> +  
> SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
> +  
> SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
>
> PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
>
> PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
>  
>  [LibraryClasses.common.SEC]
>PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
> +  
> CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
>
>  [LibraryClasses.common.PEIM]
>
> MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
> @@ -74,11 +77,13 @@
>  [LibraryClasses.common.DXE_DRIVER]
>
> MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
>HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
> +  
> CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
>  
>  [LibraryClasses.common.DXE_SMM_DRIVER]
>
> SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
>
> MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
>HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
> +  
> CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
>  
>  #
>  # Drivers/Libraries within this package
> @@ -101,8 +106,9 @@
>UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
>

Re: [edk2] [PATCH v4 14/19] UefiCpuPkg: Add ACPI CPU Data include file

[Laszlo Ersek]

On 10/19/15 09:44, Michael Kinney wrote:
> Add AcpuCpuData.h that defines a data structure that is shared between
> modules and is required for ACPI S3 support.
> APState field removed between V1 and V2 patch.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Michael Kinney 
> Cc: Laszlo Ersek 
> ---
>  UefiCpuPkg/Include/AcpiCpuData.h | 71 
> 
>  1 file changed, 71 insertions(+)
>  create mode 100644 UefiCpuPkg/Include/AcpiCpuData.h

I reviewed this patch as part of v2:

http://thread.gmane.org/gmane.comp.bios.edk2.devel/3074/focus=3170

In such cases (i.e., when there are no changes for a patch after it
receives an R-b), can you please post the next version with that R-b tag
added to the end of the commit message? Just do a git-rebase, select the
"reword" action for the patch, and copy & paste the tag from the email
to the end of the commit message.

My Reviewed-by stands for this patch.

Thanks!
Laszlo


> diff --git a/UefiCpuPkg/Include/AcpiCpuData.h 
> b/UefiCpuPkg/Include/AcpiCpuData.h
> new file mode 100644
> index 000..a367257
> --- /dev/null
> +++ b/UefiCpuPkg/Include/AcpiCpuData.h
> @@ -0,0 +1,71 @@
> +/** @file
> +Definitions for CPU S3 data.
> +
> +Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.
> +This program and the accompanying materials
> +are licensed and made available under the terms and conditions of the BSD 
> License
> +which accompanies this distribution.  The full text of the license may be 
> found at
> +http://opensource.org/licenses/bsd-license.php
> +
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef _ACPI_CPU_DATA_H_
> +#define _ACPI_CPU_DATA_H_
> +
> +//
> +// Register types in register table
> +//
> +typedef enum _REGISTER_TYPE {
> +  Msr,
> +  ControlRegister,
> +  MemoryMapped,
> +  CacheControl
> +} REGISTER_TYPE;
> +
> +//
> +// Element of register table entry
> +//
> +typedef struct {
> +  REGISTER_TYPE RegisterType;
> +  UINT32Index;
> +  UINT8 ValidBitStart;
> +  UINT8 ValidBitLength;
> +  UINT64Value;
> +} CPU_REGISTER_TABLE_ENTRY;
> +
> +//
> +// Register table definition, including current table length,
> +// allocated size of this table, and pointer to the list of table entries.
> +//
> +typedef struct {
> +  UINT32   TableLength;
> +  UINT32   NumberBeforeReset;
> +  UINT32   AllocatedSize;
> +  UINT32   InitialApicId;
> +  CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry;
> +} CPU_REGISTER_TABLE;
> +
> +typedef struct {
> +  EFI_PHYSICAL_ADDRESS  StartupVector;
> +  EFI_PHYSICAL_ADDRESS  GdtrProfile;
> +  EFI_PHYSICAL_ADDRESS  IdtrProfile;
> +  EFI_PHYSICAL_ADDRESS  StackAddress;
> +  UINT32StackSize;
> +  UINT32NumberOfCpus;
> +  EFI_PHYSICAL_ADDRESS  MtrrTable;
> +  //
> +  // Physical address of a CPU_REGISTER_TABLE structure
> +  //
> +  EFI_PHYSICAL_ADDRESS  PreSmmInitRegisterTable;
> +  //
> +  // Physical address of a CPU_REGISTER_TABLE structure
> +  //
> +  EFI_PHYSICAL_ADDRESS  RegisterTable;
> +  EFI_PHYSICAL_ADDRESS  ApMachineCheckHandlerBase;
> +  UINT32ApMachineCheckHandlerSize;
> +} ACPI_CPU_DATA;
> +
> +#endif
> 

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Re: [edk2] [PATCH v4 17/19] UefiCpuPkg: Add PiSmmCpuDxeSmm module no IA32/X64 files

[Laszlo Ersek]

On 10/19/15 16:20, Laszlo Ersek wrote:
> On 10/19/15 09:44, Michael Kinney wrote:
>> Add module that initializes a CPU for the SMM environment and
>> installs the first level SMI handler.  This module along with the
>> SMM IPL and SMM Core provide the services required for
>> DXE_SMM_DRIVERS to register hardware and software SMI handlers.
>>
>> CPU specific features are abstracted through the SmmCpuFeaturesLib
>>
>> Platform specific features are abstracted through the
>> SmmCpuPlatformHookLib
>>
>> Several PCDs are added to enable/disable features and configure
>> settings for the PiSmmCpuDxeSmm module
>>
>> Changes between [PATCH v1] and [PATCH v2]:
>> 1) Swap PTE init order for QEMU compatibility.
>>Current PTE initialization algorithm works on HW but breaks QEMU
>>emulator.  Update the PTE initialization order to be compatible
>>with both.
>> 2) Update comment block that describes 32KB SMBASE alignment requirement
>>to match contents of Intel(R) 64 and IA-32 Architectures Software
>>Developer's Manual
>> 3) Remove BUGBUG comment and call to ClearSmi() that is not required.
>>SMI should be cleared by root SMI handler.
>>
>> [jeff@intel.com: Fix code style issues reported by ECC]
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Michael Kinney 
>> Cc: Laszlo Ersek 
>> Cc: Paolo Bonzini 
>>
>> [pbonz...@redhat.com: InitPaging: prepare PT before filling in PDE]
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Paolo Bonzini 
>> ---
> 
> Acked-by: Laszlo Ersek 

Hm, actually, I have a few comments for this patch; sorry that I haven't
noticed these things earlier.

(
First, I can see that the patch removes some whitespace that was
introduced in this same patch series earlier. I think it would be nicer
not to add that extra whitespace in the first place, but I don't want to
obsess about such banalities.

... FWIW, if you find some whitespace at the end of the series that
you'd like to remove, you can use "git blame" on the source file to
locate the commit that introduced that line, then use "git rebase -i"
with the "edit" action to remove the whitespace right from the patch
that adds it.
)

Second -- this is again a "general git hint" -- please try to ensure
that the tree builds at every stage of the patch series. Someone could
be bisecting the tree later on, in search for the commit that introduced
an unrelated bug, and that bisection can take him or her to semi-random
patches in the history. The tree should build at each individual commit.

I think this patch probably breaks the build:
- it adds the "UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf" file with
  references to Ia32 and X64 source files
- those files themselves are delayed to the next two patches,
- the PiSmmCpuDxeSmm.inf file is referenced in
  "UefiCpuPkg/UefiCpuPkg.dsc".

It certainly makes sense to construct a complex driver in several
stages, many of which might not compile in separation. (I do that all
the time.) However, the driver's INF file should be added to the DSC
(and FDF, if any) file(s) only when the driver *does* build.

A person bisecting the history for an unrelated bug won't care that
PiSmmCpuDxeSmm is not "available" midway in this series, but he or she
will definitely care that "UefiCpuPkg/UefiCpuPkg.dsc" *build* midway in
this series, so he or she can test it for the unrelated bug.

I don't want to obsess about this (we're at v4 and this driver is huge
and also very important, plus I'm *getting* a favor here, not *doing*
one -- I shouldn't be a pain to work with), but in general this is
something to keep in mind when working with git. Once the subject
feature is complete, several more local rebases are usually needed to
rework the series such that each patch is logically minimal and
indivisible (to help reviewers focus) and that the tree builds at each
single stage.

Unfortunately, for validating the latter (= builds at each patch),
there's really no better tool than writing a script that checks out the
tree at each patch and builds it. (For bonus points, the script can
pause after each build and regression-test the build automatically, or
ask the developer to do that. But I agree that at v4 that's not really
practical.)

Third, to obsess a bit more about logical minimality and focus, patches
that remove whitespace (introduced *before* the subject series) should
be kept separate from any other patches. This way the commit message can
just say "remove whitespace", and the patch is trivial to verify for
reviewers. Reviewing whitespace removal and functional changes in the
same patch causes double vision. :)

Summary: please consider the above practices in the future; for now, the
only thing I think should be fixed is the build breakage. The easiest
way to do it should be splitting out the INF file's addition to the DSC
file, and moving 

Re: [edk2] [PATCH] Update the ACPI device information for ARM Juno.

[Leif Lindholm]

On Mon, Oct 19, 2015 at 09:36:00AM -0500, Jeremy Linton wrote:
> These patches correct a number of problems with the JUNO ACPI tables.
> 
> First, put CCA attributes on the devices which can do DMA. This is
> because the linux kernel now requires ARM64 devices specify a coherency
> model. Without CCA the devices are unable to perform DMA.
> 
> Update the EHCI window to a full 64k as documented in the
> Juno Platform SoC TRM. This makes it match the values used in some
> other places.
> 
> Finally, add some _DSD entries for the SMSC ethernet chip.
> The latter changes are required for the mainline kernels to use the adapter.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Jeremy Linton 

Thanks - committed as SVN r18628 (with an r18627 inserted before to
resolve CRLF issues in existing source files).

/
Leif

> ---
>  ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl |  1 +
>  ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl| 14 --
>  2 files changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl 
> b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl
> index 7d50a5f..645ba93 100644
> --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl
> +++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl
> @@ -51,6 +51,7 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", 
> "ARM-JUNO", EFI_ACPI_ARM_OEM
>   Name(_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
>   Name(_SEG, Zero) // PCI Segment Group number
>   Name(_BBN, Zero) // PCI Base Bus Number
> + Name(_CCA, 1)// Initially mark the PCI coherent (for JunoR1)
>  
>  // Root Complex 0
>  Device (RP0) {
> diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl 
> b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
> index 7a56f00..c80f46a 100644
> --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
> +++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
> @@ -68,6 +68,15 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", 
> "ARM-JUNO", EFI_ACPI_ARM_O
>Memory32Fixed(ReadWrite, 0x1A00, 0x1000)
>Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 
> 192 }
>})
> +  Name(_DSD, Package() {
> +   ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> +   Package() {
> +   Package(2) {"phy-mode", "mii"},
> +   Package(2) {"reg-io-width", 4 },
> +   Package(2) {"smsc,irq-active-high",1},
> +   Package(2) {"smsc,irq-push-pull",1}
> +  }
> +  }) // _DSD()
>  }
>  
>  // UART PL011
> @@ -82,16 +91,17 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", 
> "ARM-JUNO", EFI_ACPI_ARM_O
>  }
>  
>  //
> -// USB Host Controller
> +// USB EHCI Host Controller
>  //
>  Device(USB0){
>  Name(_HID, "ARMH0D20")
>  Name(_CID, "PNP0D20")
>  Name(_UID, 2)
> +Name(_CCA, 0) //EHCI on this platform is not coherent!
>  
>  Method(_CRS, 0x0, Serialized){
>  Name(RBUF, ResourceTemplate(){
> -Memory32Fixed(ReadWrite, 0x7FFC, 0x00B0)
> +Memory32Fixed(ReadWrite, 0x7FFC, 0x1)
>  Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) 
> {149}  // INT ID=149 GIC IRQ ID=117 for Juno SoC USB EHCI Controller
>  })
>  Return(RBUF)
> -- 
> 2.4.3
> 
> 
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[edk2] [PATCHv3] ArmPlatformPkg/ArmJunoPkg correct ACPI tables

[Jeremy Linton]

V3
Added appropriate contribution tag

V2 
Removed mali definition as its not been completely tested yet.

V1
This set of patches updates the ACPI tables for the JunoR1 in keeping with
recent changes to the linux kernel.

These changes allow both the RHEL and mainline kernels to boot with a functional
USB and network adapter. Given the previous PCIe change posted by Supreeth, and 
this
one, the PCIe host bridge works with RHEL and hopefully future version of linux.


Jeremy Linton (1):
  Update the ACPI device information for ARM Juno.

 ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl |  1 +
 ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl| 14 --
 2 files changed, 13 insertions(+), 2 deletions(-)

-- 
2.4.3


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[edk2] [PATCH] Update the ACPI device information for ARM Juno.

[Jeremy Linton]

These patches correct a number of problems with the JUNO ACPI tables.

First, put CCA attributes on the devices which can do DMA. This is
because the linux kernel now requires ARM64 devices specify a coherency
model. Without CCA the devices are unable to perform DMA.

Update the EHCI window to a full 64k as documented in the
Juno Platform SoC TRM. This makes it match the values used in some
other places.

Finally, add some _DSD entries for the SMSC ethernet chip.
The latter changes are required for the mainline kernels to use the adapter.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton 
---
 ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl |  1 +
 ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl| 14 --
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl 
b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl
index 7d50a5f..645ba93 100644
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl
+++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl
@@ -51,6 +51,7 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", 
"ARM-JUNO", EFI_ACPI_ARM_OEM
Name(_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
Name(_SEG, Zero) // PCI Segment Group number
Name(_BBN, Zero) // PCI Base Bus Number
+   Name(_CCA, 1)// Initially mark the PCI coherent (for JunoR1)
 
 // Root Complex 0
 Device (RP0) {
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl 
b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
index 7a56f00..c80f46a 100644
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
+++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
@@ -68,6 +68,15 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", 
"ARM-JUNO", EFI_ACPI_ARM_O
   Memory32Fixed(ReadWrite, 0x1A00, 0x1000)
   Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 192 }
   })
+  Name(_DSD, Package() {
+   ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+   Package() {
+   Package(2) {"phy-mode", "mii"},
+   Package(2) {"reg-io-width", 4 },
+   Package(2) {"smsc,irq-active-high",1},
+   Package(2) {"smsc,irq-push-pull",1}
+  }
+  }) // _DSD()
 }
 
 // UART PL011
@@ -82,16 +91,17 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", 
"ARM-JUNO", EFI_ACPI_ARM_O
 }
 
 //
-// USB Host Controller
+// USB EHCI Host Controller
 //
 Device(USB0){
 Name(_HID, "ARMH0D20")
 Name(_CID, "PNP0D20")
 Name(_UID, 2)
+Name(_CCA, 0) //EHCI on this platform is not coherent!
 
 Method(_CRS, 0x0, Serialized){
 Name(RBUF, ResourceTemplate(){
-Memory32Fixed(ReadWrite, 0x7FFC, 0x00B0)
+Memory32Fixed(ReadWrite, 0x7FFC, 0x1)
 Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) 
{149}  // INT ID=149 GIC IRQ ID=117 for Juno SoC USB EHCI Controller
 })
 Return(RBUF)
-- 
2.4.3


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Re: [edk2] [PATCH 1/1] AppPkg: Allow interactive Python on platforms without STDERR

[Carsey, Jaben]

Code looks good.  The format of the diff/patch seems quite different and harder 
to decode than the usual.

Reviewed-by: Jaben Carsey 

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Daryl McDaniel
> Sent: Friday, October 16, 2015 4:19 PM
> To: edk2-devel@lists.01.org; Carsey, Jaben ;
> Bjorge, Erik C 
> Subject: [edk2] [PATCH 1/1] AppPkg: Allow interactive Python on platforms
> without STDERR
> Importance: High
> 
> AppPkg: Python, as distributed, sends its prompts and other interactive
> output to stderr, which uses the platforms STDERR device for output.  If
> STDERR output is not visible, it may appear that Python has hung.  Several
> people have reported problems on platforms that don't enable STDERR.
> These
> include platforms without a Setup utility and those without Setup options
> for STDERR.
> 
> This patch adds a command-line switch, -#, to Python.  If this switch is
> present, stderr will be aliased to stdout.
> 
> 
> 
> AppPkg/Applications/Python/PyMod-2.7.2/Modules/main.c:  New file,
> modified
> version of AppPkg/Applications/Python/Python-2.7.2/Modules/main.c.  Add
> the
> -# option which causes stderr to be aliased to stdout.  Add a description of
> this switch to the Help output.
> 
> 
> 
> AppPkg/Applications/Python/PythonCore.inf:  Reference main.c from
> PyMod-2.7.2 instead of from Python-2.7.2 so that the modified version is
> used.
> 
> 
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> 
> Signed-off-by: Daryl McDaniel 
> 
> 
> 
> 
> 
> diff C3b Temp/PythonCore.inf-revBASE.svn001.tmp.inf
> AppPkg/Applications/Python/PythonCore.inf
> 
> *** Temp/PythonCore.inf-revBASE.svn001.tmp.inf  Thu Sep 18 12:13:22 2014
> 
> --- AppPkg/Applications/Python/PythonCore.inf  Fri Oct 16 14:15:13 2015
> 
> ***
> 
> *** 1,6 
> 
> --- 1,7 
> 
>   ## @file
> 
>   # PythonCore.inf
> 
>   #
> 
> + #  Copyright (c) 2015, Daryl McDaniel. All rights reserved.
> 
>   #  Copyright (c) 2011-2012, Intel Corporation. All rights reserved.
> 
>   #  This program and the accompanying materials
> 
>   #  are licensed and made available under the terms and conditions of the
> BSD License
> 
> ***
> 
> *** 164,170 
> 
> Python-$(PYTHON_VERSION)/Modules/_functoolsmodule.c
> 
> Python-$(PYTHON_VERSION)/Modules/gcmodule.c
> 
> Python-$(PYTHON_VERSION)/Modules/getbuildinfo.c
> 
> !   Python-$(PYTHON_VERSION)/Modules/main.c
> 
> Python-$(PYTHON_VERSION)/Modules/python.c
> 
> 
> 
> # Optional Modules -- See Python/Efi/config.c
> 
> --- 165,171 
> 
> Python-$(PYTHON_VERSION)/Modules/_functoolsmodule.c
> 
> Python-$(PYTHON_VERSION)/Modules/gcmodule.c
> 
> Python-$(PYTHON_VERSION)/Modules/getbuildinfo.c
> 
> !   PyMod-$(PYTHON_VERSION)/Modules/main.c
> 
> Python-$(PYTHON_VERSION)/Modules/python.c
> 
> 
> 
> # Optional Modules -- See Python/Efi/config.c
> 
> diff C3b a/AppPkg/Applications/Python/Python-2.7.2/Modules/main.c
> b/AppPkg/Applications/Python/PyMod-2.7.2/Modules/main.c
> 
> *** a/AppPkg/Applications/Python/Python-2.7.2/Modules/main.c Thu Oct
> 15
> 13:08:22 2015
> 
> --- b/AppPkg/Applications/Python/PyMod-2.7.2/Modules/main.c  Fri Oct 16
> 15:08:08 2015
> 
> ***
> 
> *** 1,4 
> 
> ! /* Python interpreter main program */
> 
> 
> 
>   #include "Python.h"
> 
>   #include "osdefs.h"
> 
> --- 1,8 
> 
> ! /** @file
> 
> !   Python interpreter main program.
> 
> !
> 
> !   Copyright (c) 2015, Daryl McDaniel. All rights reserved.
> 
> ! **/
> 
> 
> 
>   #include "Python.h"
> 
>   #include "osdefs.h"
> 
> ***
> 
> *** 40,46 
> 
>   static int  orig_argc;
> 
> 
> 
>   /* command line options */
> 
> ! #define BASE_OPTS "3bBc:dEhiJm:OQ:sStuUvVW:xX?"
> 
> 
> 
>   #ifndef RISCOS
> 
>   #define PROGRAM_OPTS BASE_OPTS
> 
> --- 44,50 
> 
>   static int  orig_argc;
> 
> 
> 
>   /* command line options */
> 
> ! #define BASE_OPTS "#3bBc:dEhiJm:OQ:sStuUvVW:xX?"
> 
> 
> 
>   #ifndef RISCOS
> 
>   #define PROGRAM_OPTS BASE_OPTS
> 
> ***
> 
> *** 59,64 
> 
> --- 63,69 
> 
>   /* Long usage message, split into parts < 512 bytes */
> 
>   static char *usage_1 = "\
> 
>   Options and arguments (and corresponding environment variables):\n\
> 
> + -# : alias stderr to stdout for platforms without STDERR output.\n\
> 
>   -B : don't write .py[co] files on import; also
> PYTHONDONTWRITEBYTECODE=x\n\
> 
>   -c cmd : program passed in as string (terminates option list)\n\
> 
>   -d : debug output from parser; also PYTHONDEBUG=x\n\
> 
> ***
> 
> *** 99,105 
> 
>   static char *usage_5 = "\
> 
>   PYTHONHOME   : alternate  directory (or
> %c).\n\
> 
>  The default module search path uses %s.\n\
> 
> ! PYTHONCASEOK : ignore case in 'import' statements (Windows).\n\
> 
>   PYTHONIOENCODING: 

Re: [edk2] [PATCH v4 16/19] UefiCpuPkg: Update DEC/DSC files for new includes and libraries

[Laszlo Ersek]

On 10/19/15 16:18, Laszlo Ersek wrote:
> On 10/19/15 09:44, Michael Kinney wrote:
>> Add SmmCpuPlatformHookLib library class declaration
>> Add SmmCpuFeaturesLib library class declaration
>> Add gEfiSmmCpuServiceProtocolGuid protocol declaration
>> Build SmmCpuPlatformHookLibNull library instance
>> Build SmmCpuFeaturesLib library instance
>>
>> Changes between [PATCH v1] and [PATCH v2]:
>> 1) Use module type specific CpuExceptionHandlerLib in DSC file
>>instead of Null library instance
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Michael Kinney 
>> Cc: Laszlo Ersek 
>> ---
>>  UefiCpuPkg/UefiCpuPkg.dec | 13 -
>>  UefiCpuPkg/UefiCpuPkg.dsc | 10 --
>>  2 files changed, 20 insertions(+), 3 deletions(-)
>>
>> diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
>> index fe9b2a5..4f7065f 100644
>> --- a/UefiCpuPkg/UefiCpuPkg.dec
>> +++ b/UefiCpuPkg/UefiCpuPkg.dec
>> @@ -41,11 +41,22 @@
>>##  @libraryclass  Provides platform specific initialization functions in 
>> the SEC phase.
>>##
>>PlatformSecLib|Include/Library/PlatformSecLib.h
>> -
>>
>> +  ##  @libraryclass  Public include file for the SMM CPU Platform Hook 
>> Library.
>> +  ##
>> +  SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h
>> +  
>> +  ##  @libraryclass  Provides the CPU specific programming for 
>> PiSmmCpuDxeSmm module.
>> +  ##
>> +  SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h
>> +
>>  [Guids]
>>gUefiCpuPkgTokenSpaceGuid  = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 
>> 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
>>  
>> +[Protocols]
>> +  ## Include/Protocol/SmmCpuService.h
>> +  gEfiSmmCpuServiceProtocolGuid  = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 
>> 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
>> +  
>>  #
>>  # [Error.gUefiCpuPkgTokenSpaceGuid]
>>  #   0x8001 | Invalid value provided.
>> diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
>> index 68400e3..961c970 100644
>> --- a/UefiCpuPkg/UefiCpuPkg.dsc
>> +++ b/UefiCpuPkg/UefiCpuPkg.dsc
>> @@ -32,6 +32,7 @@
>>BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
>>CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
>>DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
>> +  
>> SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf 
>>  
> 
> The trailing spaces are still there on this line.
> 
> (If you remove them, you can append my R-b immediately to the end of the
> commit message, please refer to
> .)

Nevermind, the whitespace is removed in "[PATCH v4 17/19] UefiCpuPkg:
Add PiSmmCpuDxeSmm module no IA32/X64 files".

Reviewed-by: Laszlo Ersek 

> 
> Thanks!
> Laszlo
> 
>>
>> DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
>>DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
>>UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
>> @@ -51,14 +52,16 @@
>>DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
>>LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
>>
>> ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
>> -  
>> CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
>>
>> SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
>>SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf
>> +  
>> SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
>> +  
>> SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
>>
>> PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
>>
>> PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
>>  
>>  [LibraryClasses.common.SEC]
>>
>> PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
>> +  
>> CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
>>
>>  [LibraryClasses.common.PEIM]
>>
>> MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
>> @@ -74,11 +77,13 @@
>>  [LibraryClasses.common.DXE_DRIVER]
>>
>> MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
>>HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
>> +  
>> CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
>>  
>>  [LibraryClasses.common.DXE_SMM_DRIVER]
>>
>> SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
>>
>> MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
>>

Re: [edk2] [PATCH v4 04/19] UefiCpuPkg: CpuDxe: Wait for APs to enter idle loop

[Kinney, Michael D]

Laszlo,

I have updated the commit message and I have updated source to use gBS->Stall() 
to be consistent with the rest of this module.

I will come back to this module in the future and look into using the 
performance counter functions in the TimerLib and CpuPause(), so this module 
can minimize the wait time for all AP sync operations.

Thanks,

Mike

>-Original Message-
>From: Laszlo Ersek [mailto:ler...@redhat.com]
>Sent: Monday, October 19, 2015 6:57 AM
>To: Kinney, Michael D; edk2-de...@ml01.01.org
>Cc: Fan, Jeff
>Subject: Re: [PATCH v4 04/19] UefiCpuPkg: CpuDxe: Wait for APs to enter idle
>loop
>
>comments below
>
>On 10/19/15 09:44, Michael Kinney wrote:
>> Address a race condition in first call to StartupAllAPs() with
>> SingleThread set to TRUE in the MP initialization.  If the APs
>> have not entered their idle loop before StartupAllAPs() is called,
>> then some of the APs will be in an unexpected state, and
>> StartupAllAPs() will hang.  This is the hang condition that is
>> only seen when SingleThread parameter is set to TRUE and
>> StartupAllAPs() is called very shortly after mAPsAlreadyInitFinished
>> is set to TRUE that releases the APs to complete their initialization.
>>
>> An internal function has been added to check if all APs are in the
>> sleeping state in their idle loop.  On the first call to
>> StartupAllAPs(), this internal function is used to make sure the
>> APs are in a state that is compatible with StartupAllAPs() being
>> called.
>
>I think these paragraphs date back to the version of the patch where the
>wait was still conditional on the StartupAllAPs() member being called.
>
>... I think the first paragraph is precise enough (because it describes
>symptoms / an actual reproducer), but the second paragraph should
>reflect that the sleeping state is awaited unconditionally.
>
>> The PcdCpuApInitTimeOutInMicroSeconds is used as the maximum wait
>> time for the APs to enter their idle loop.
>
>Makes sense I believe.
>
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Michael Kinney 
>> Cc: Jeff Fan 
>> Cc: Laszlo Ersek 
>> ---
>>  UefiCpuPkg/CpuDxe/CpuMp.c | 62
>+--
>>  1 file changed, 60 insertions(+), 2 deletions(-)
>>
>> diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
>> index fbe43f5..7e7736c 100644
>> --- a/UefiCpuPkg/CpuDxe/CpuMp.c
>> +++ b/UefiCpuPkg/CpuDxe/CpuMp.c
>> @@ -313,6 +313,47 @@ CheckAndUpdateAllAPsToIdleState (
>>  }
>>
>>  /**
>> +  Check if all APs are in state CpuStateSleeping.
>> +
>> +  Return TRUE if all APs are in the CpuStateSleeping state.  Do not
>> +  check the state of the BSP or any disabled APs.
>> +
>> +  @retval TRUE   All APs are in CpuStateSleeping state.
>> +  @retval FALSE  One or more APs are not in CpuStateSleeping state.
>> +
>> +**/
>> +BOOLEAN
>> +CheckAllAPsSleeping (
>> +  VOID
>> +  )
>> +{
>> +  UINTN   ProcessorNumber;
>> +  CPU_DATA_BLOCK  *CpuData;
>> +
>> +  for (ProcessorNumber = 0; ProcessorNumber <
>mMpSystemData.NumberOfProcessors; ProcessorNumber++) {
>> +CpuData = [ProcessorNumber];
>> +if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT)) {
>> +  //
>> +  // Skip BSP
>> +  //
>> +  continue;
>> +}
>> +
>> +if (!TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT)) {
>> +  //
>> +  // Skip Disabled processors
>> +  //
>> +  continue;
>> +}
>> +
>> +if (GetApState (CpuData) != CpuStateSleeping) {
>> +  return FALSE;
>> +}
>> +  }
>> +  return TRUE;
>> +}
>> +
>> +/**
>>If the timeout expires before all APs returns from Procedure,
>>we should forcibly terminate the executing AP and fill FailedList back
>>by StartupAllAPs().
>> @@ -1650,8 +1691,9 @@ InitializeMpSupport (
>>VOID
>>)
>>  {
>> -  EFI_STATUSStatus;
>> -  MTRR_SETTINGS MtrrSettings;
>> +  EFI_STATUS Status;
>> +  MTRR_SETTINGS  MtrrSettings;
>> +  UINTN  Timeout;
>>
>>gMaxLogicalProcessorNumber = (UINTN) PcdGet32
>(PcdCpuMaxLogicalProcessorNumber);
>>if (gMaxLogicalProcessorNumber < 1) {
>> @@ -1700,9 +1742,25 @@ InitializeMpSupport (
>>   sizeof (CPU_DATA_BLOCK) *
>mMpSystemData.NumberOfProcessors,
>>   mMpSystemData.CpuDatas);
>>
>> +  //
>> +  // Release all APs to complete initialization and enter idle loop
>> +  //
>>mAPsAlreadyInitFinished = TRUE;
>>
>>//
>> +  // Wait for all APs to enter idle loop.
>> +  //
>> +  Timeout = 0;
>> +  do {
>> +if (CheckAllAPsSleeping ()) {
>> +  break;
>> +}
>> +MicroSecondDelay (gPollInterval);
>
>- I think gPollInterval is a good fit for this indeed, based on other
>uses in the same file.
>
>- IIRC the previous version used CpuPause(). I thought you would keep
>CpuPause() in this loop, and measure the time that has passed, against a
>timeout.
>
>I think this 

[edk2] [PATCH] ShellPkg: Follow spec to remove the last '\' char in return name of GetCurDir().

[Qiu Shumin]

In Shell spec 2.1 the return name of EFI_SHELL_PROTOCOL.GetCurDir() is defined 
as
'fs0:\current-dir' while in current implementation it's 'fs0:\current-dir\'. To 
follow
spec the patch removed the redundant '\' char.

Since it has been broken for a long time, some codes may depend on the broken 
behavior.
After this change 'EFI_SHELL_PROTOCOL.GetCurDir()' and 
'UefiShellLib.ShellGetCurrentDir()'
will return a current directory string without tailing '\' (fs0:\current-dir), 
the value
of Shell environment variable 'cwd' will become 'fs0:\current-dir' as well.

This patch has updated all the code in EDKII to make them depend on the new 
behavior.
Developers should check whether 'GetCurDir()' and 'ShellGetCurrentDir' are used 
in their
source code.

Cc: Jaben Carsey 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin 
---
 ShellPkg/Application/Shell/FileHandleWrappers.c|   1 +
 ShellPkg/Application/Shell/Shell.uni   | Bin 4838 -> 4840 bytes
 ShellPkg/Application/Shell/ShellProtocol.c |  18 
 ShellPkg/Include/Library/ShellLib.h|   2 ++
 ShellPkg/Include/Protocol/EfiShell.h   |   2 ++
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c   |  23 ---
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c   |  12 ++--
 ShellPkg/Library/UefiShellLevel2CommandsLib/Ls.c   |   6 +++-
 ShellPkg/Library/UefiShellLevel2CommandsLib/Mv.c   |  32 ++---
 ShellPkg/Library/UefiShellLevel2CommandsLib/Rm.c   |   4 ++-
 .../UefiShellLevel2CommandsLib.c   |   3 +-
 ShellPkg/Library/UefiShellLib/UefiShellLib.c   |   5 +++-
 12 files changed, 89 insertions(+), 19 deletions(-)

diff --git a/ShellPkg/Application/Shell/FileHandleWrappers.c 
b/ShellPkg/Application/Shell/FileHandleWrappers.c
index 91c35f7..64f3827 100644
--- a/ShellPkg/Application/Shell/FileHandleWrappers.c
+++ b/ShellPkg/Application/Shell/FileHandleWrappers.c
@@ -510,6 +510,7 @@ FileInterfaceStdInRead(
   Cwd = ShellInfoObject.NewEfiShellProtocol->GetCurDir(NULL);
   if (Cwd != NULL) {
 StrnCpyS(TabStr, (*BufferSize)/sizeof(CHAR16), Cwd, 
(*BufferSize)/sizeof(CHAR16) - 1);
+StrCatS(TabStr, (*BufferSize)/sizeof(CHAR16), L"\\");
 if (TabStr[StrLen(TabStr)-1] == L'\\' && *(CurrentString + TabPos) 
== L'\\' ) {
   TabStr[StrLen(TabStr)-1] = CHAR_NULL;
 }
diff --git a/ShellPkg/Application/Shell/Shell.uni 
b/ShellPkg/Application/Shell/Shell.uni
index 
04f001d3870ac3d9f59ebea4617ab5f13e2c4ce9..25cf69966b733e7b2488413361cfab98c2249bfd
 100644
GIT binary patch
delta 19
bcmaE+`a*TW6GqdGPp`8w#%$irrp*HYUOEUp

delta 17
ZcmaE%`b>4g6Gp?0Pp`9X-p8iJ0{~Bl2i^bx

diff --git a/ShellPkg/Application/Shell/ShellProtocol.c 
b/ShellPkg/Application/Shell/ShellProtocol.c
index 28521ec..3a96384 100644
--- a/ShellPkg/Application/Shell/ShellProtocol.c
+++ b/ShellPkg/Application/Shell/ShellProtocol.c
@@ -532,12 +532,13 @@ EfiShellGetDevicePathFromFilePath(
 if (Cwd == NULL) {
   return (NULL);
 }
-Size = StrSize(Cwd) + StrSize(Path) - sizeof(CHAR16);
+Size = StrSize(Cwd) + StrSize(Path);
 NewPath = AllocateZeroPool(Size);
 if (NewPath == NULL) {
   return (NULL);
 }
 StrCpyS(NewPath, Size/sizeof(CHAR16), Cwd);
+StrCatS(NewPath, Size/sizeof(CHAR16), L"\\");
 if (*Path == L'\\') {
   Path++;
   while (PathRemoveLastItem(NewPath)) ;
@@ -2495,6 +2496,7 @@ EfiShellOpenFileList(
 CurDir = EfiShellGetCurDir(NULL);
 ASSERT((Path2 == NULL && Path2Size == 0) || (Path2 != NULL));
 StrnCatGrow(, , CurDir, 0);
+StrnCatGrow(, , L"\\", 0);
 if (*Path == L'\\') {
   Path++;
   while (PathRemoveLastItem(Path2)) ;
@@ -2796,6 +2798,8 @@ EfiShellSetEnv(
   FileSystemMapping is not NULL, it returns the current directory associated 
with the
   FileSystemMapping. In both cases, the returned name includes the file system
   mapping (i.e. fs0:\current-dir).
+  
+  Note that the current directory string should exclude the tailing backslash 
character.
 
   @param FileSystemMapping  A pointer to the file system mapping. If NULL,
 then the current working directory is returned.
@@ -2852,6 +2856,8 @@ EfiShellGetCurDir(
   If the current working directory or the current working file system is 
changed then the
   %cwd% environment variable will be updated
 
+  Note that the current directory string should exclude the tailing backslash 
character.
+
   @param FileSystem A pointer to the file system's mapped name. If 
NULL, then the current working
 directory is changed.
   @param DirPoints to the NULL-terminated directory on the 
device specified by FileSystem.
@@ -2939,9 +2945,11 @@ EfiShellSetCurDir(
   ASSERT((MapListItem->CurrentDirectoryPath == NULL && Size == 0) || 

[edk2] MdePkg include definition issue in UefiPxe.h?

[Andrew Fish]

I was porting some code the other day and I hit a compiler warning that 
PXE_OPFLAGS_STATION_ADDRESS_READ and PXE_OPFLAGS_STATION_ADDRESS_WRITE had the 
same value? Is this correct, I didn’t see the value in the UEFI spec?

https://github.com/tianocore/edk2/blob/master/MdePkg/Include/Uefi/UefiPxe.h#L320
#define PXE_OPFLAGS_STATION_ADDRESS_READ   0x
#define PXE_OPFLAGS_STATION_ADDRESS_WRITE  0x
#define PXE_OPFLAGS_STATION_ADDRESS_RESET  0x0001

Thanks,

Andrew Fish
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Re: [edk2] [PATCH v4 03/19] UefiCpuPkg: CpuDxe: broadcast MTRR changes to APs

[Kinney, Michael D]

Laszlo,

Thanks for the feedback.  

1) I have updated the author using --author='Laszlo Ersek '
2) I changed the order of the commits so the MP race condition is fixed before 
your patch to sync MTRRs to all APs.

Best regards,

Mike

>-Original Message-
>From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>Laszlo Ersek
>Sent: Monday, October 19, 2015 6:43 AM
>To: Kinney, Michael D; edk2-de...@ml01.01.org
>Cc: edk2-devel
>Subject: Re: [edk2] [PATCH v4 03/19] UefiCpuPkg: CpuDxe: broadcast MTRR
>changes to APs
>
>On 10/19/15 09:44, Michael Kinney wrote:
>> From: edk2-devel 
>
>With SVN it won't matter much ultimately, but considering git per se, I
>think in your git tree my authorship was lost somehow. (The
>Signed-off-by below is correct though.) This can be fixed by:
>- rebasing the series
>- selecting "edit" for this patch
>- committing it without any changes, but with different authorship:
>  git commit --amend --author='Laszlo Ersek '
>
>Not overly important, but I think it's useful to know about git commit
>--author.
>
>Another (not super-important) comment: in cases like this, a patch
>series usually applies the fix for the dormant bug first (i.e., patch v4
>04/19), and then introduces the change that would expose the bug (i.e.,
>this patch). The idea being, since the bug is known, there should be no
>point in history where the bug is exposed -- it could be triggered by an
>unrelated bisection, for example.
>
>Again, not too important, but it's so great that you've been using git
>for this work that I can't hold back some unsolicited git tips. :)
>
>Thanks!
>Laszlo
>
>>
>> The Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuArchDxe
>> driver applies any MTRR changes to APs, if the
>> EFI_MP_SERVICES_PROTOCOL is available. We should do the same.
>>
>> Additionally, the broadcast should occur at MP startup as well,
>> not only when MTRR settings are changed. The inspiration is
>> taken from
>>
>>   Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuMpDxe/
>>
>> (see the EarlyMpInit() function and its call sites in
>> "ProcessorConfig.c").
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Laszlo Ersek 
>> Reviewed-by: Jeff Fan 
>> Reviewed-by: Michael Kinney 
>> ---
>>  UefiCpuPkg/CpuDxe/CpuDxe.c | 26 ++
>>  UefiCpuPkg/CpuDxe/CpuMp.c  | 34 +-
>>  UefiCpuPkg/CpuDxe/CpuMp.h  | 13 +
>>  3 files changed, 72 insertions(+), 1 deletion(-)
>>
>> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
>> index c9df4e1..daf97bd 100644
>> --- a/UefiCpuPkg/CpuDxe/CpuDxe.c
>> +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
>> @@ -350,6 +350,9 @@ CpuSetMemoryAttributes (
>>  {
>>RETURN_STATUS Status;
>>MTRR_MEMORY_CACHE_TYPECacheType;
>> +  EFI_STATUSMpStatus;
>> +  EFI_MP_SERVICES_PROTOCOL  *MpService;
>> +  MTRR_SETTINGS MtrrSettings;
>>
>>if (!IsMtrrSupported ()) {
>>  return EFI_UNSUPPORTED;
>> @@ -405,6 +408,29 @@ CpuSetMemoryAttributes (
>>   CacheType
>>   );
>>
>> +  if (!RETURN_ERROR (Status)) {
>> +MpStatus = gBS->LocateProtocol (
>> +  ,
>> +  NULL,
>> +  (VOID **)
>> +  );
>> +//
>> +// Synchronize the update with all APs
>> +//
>> +if (!EFI_ERROR (MpStatus)) {
>> +  MtrrGetAllMtrrs ();
>> +  MpStatus = MpService->StartupAllAPs (
>> +  MpService,  // This
>> +  SetMtrrsFromBuffer, // Procedure
>> +  TRUE,   // SingleThread
>> +  NULL,   // WaitEvent
>> +  0,  // TimeoutInMicrosecsond
>> +  ,  // ProcedureArgument
>> +  NULL// FailedCpuList
>> +  );
>> +  ASSERT (MpStatus == EFI_SUCCESS || MpStatus == EFI_NOT_STARTED);
>> +}
>> +  }
>>return (EFI_STATUS) Status;
>>  }
>>
>> diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
>> index da3686e..fbe43f5 100644
>> --- a/UefiCpuPkg/CpuDxe/CpuMp.c
>> +++ b/UefiCpuPkg/CpuDxe/CpuMp.c
>> @@ -1626,6 +1626,22 @@ ExitBootServicesCallback (
>>  }
>>
>>  /**
>> +  A minimal wrapper function that allows MtrrSetAllMtrrs() to be passed to
>> +  EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() as Procedure.
>> +
>> +  @param[in] Buffer  Pointer to an MTRR_SETTINGS object, to be passed to
>> + MtrrSetAllMtrrs().
>> +**/
>> +VOID
>> +EFIAPI
>> +SetMtrrsFromBuffer (
>> +  IN VOID *Buffer
>> +  )
>> +{
>> +  MtrrSetAllMtrrs (Buffer);
>> +}
>> +
>> +/**
>>Initialize Multi-processor support.
>>
>>  **/
>> @@ -1634,7