On 11/27/15 16:23, jiewen yao wrote:
> This series patch enables write protection in SMM.
> We always set RW+P bit for page table by default, and set WP in CR0.
> So that we can use page table write-protection for code later.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
>
On 11/27/15 16:23, jiewen yao wrote:
> This series patch enables write protection in SMM.
> We always set RW+P bit for page table by default, and set WP in CR0.
> So that we can use page table write-protection for code later.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
>
] UefiCpuPkg/PiSmmCpu: Enable Write Protection
in SMM.
On 11/27/15 16:23, jiewen yao wrote:
> This series patch enables write protection in SMM.
> We always set RW+P bit for page table by default, and set WP in CR0.
> So that we can use page table write-protection for code later.
>
> Co
This series patch enables write protection in SMM.
We always set RW+P bit for page table by default, and set WP in CR0.
So that we can use page table write-protection for code later.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen"
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