On Mon, Jan 21, 2019 at 04:47:31PM +0100, Marcin Wojtas wrote:
> > > -#define DRAM_REGION_SIZE_EVEN(C)(((C) >= 7) && ((C) <= 26))
> > > -#define GET_DRAM_REGION_SIZE_EVEN(C)((UINT64)1 << ((C) + 16))
> > > -#define DRAM_REGION_SIZE_ODD(C) ((C) <= 4)
> > > -#define
Hi Leif,
pon., 21 sty 2019 o 12:51 Leif Lindholm napisaĆ(a):
>
> On Mon, Jan 21, 2019 at 11:52:11AM +0100, Marcin Wojtas wrote:
> > From: Grzegorz Jaszczyk
> >
> > The memory controller registers are marked as secure in the latest
> > ARM-TF for Armada SoCs. It is available however get the DRAM
On Mon, Jan 21, 2019 at 11:52:11AM +0100, Marcin Wojtas wrote:
> From: Grzegorz Jaszczyk
>
> The memory controller registers are marked as secure in the latest
> ARM-TF for Armada SoCs. It is available however get the DRAM
> information via SiP services in the EL3, so use it instead
> of
From: Grzegorz Jaszczyk
The memory controller registers are marked as secure in the latest
ARM-TF for Armada SoCs. It is available however get the DRAM
information via SiP services in the EL3, so use it instead
of accessing the registers directly.
Contributed-under: TianoCore Contribution
4 matches
Mail list logo