Re: support Pentium3 SSE

2001-07-14 Thread German Tischler

On Thu, Jun 21, 2001 at 03:24:52AM +0900, NAKAMURA Kazushi wrote:
 In article [EMAIL PROTECTED]
 [EMAIL PROTECTED] writes:
 I'm going to see if I can commit your SSE patch to freebsd-current.
 Since I don't know that much about the code you're patching I have
 asked Bruce Evans to have a look at the patch, so he may want to
 make changes. I'll try to read the patch in detail over the next
 few days.
 
   This patch has a problem in SMP environment. There is a new patch
 by Mr. issei following below. Please test in SMP environment
 before commit.
 
 Thank you.

Is there a patch for stable ?

--gt

 PGP signature


Re: support Pentium3 SSE

2001-07-14 Thread NAKAMURA Kazushi

In article [EMAIL PROTECTED]
[EMAIL PROTECTED] writes:
Is there a patch for stable ?

  There are a few patches for 4.2R and 4.3R in my site:

http://kobe1995.net/~kaz/FreeBSD/SSE.en.html
http://kobe1995.net/~kaz/FreeBSD/sys-r420-SSE.diff.gz
http://kobe1995.net/~kaz/FreeBSD/sys-r430-SSE.diff.gz

And there is a patch for 4.0R in Mr. issei's site:

http://www.issei.org/issei/FreeBSD/sse.html

Thank you.
-- 
mailto:[EMAIL PROTECTED]   NAKAMURA Kazushi@KOBE
http://kobe1995.net/~kaz/index-e.html

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Re: support Pentium3 SSE

2001-07-14 Thread German Tischler

On Sat, Jul 14, 2001 at 10:04:42PM +0900, NAKAMURA Kazushi wrote:
 In article [EMAIL PROTECTED]
 [EMAIL PROTECTED] writes:
 Is there a patch for stable ?
 
   There are a few patches for 4.2R and 4.3R in my site:
 
 http://kobe1995.net/~kaz/FreeBSD/SSE.en.html
 http://kobe1995.net/~kaz/FreeBSD/sys-r420-SSE.diff.gz
 http://kobe1995.net/~kaz/FreeBSD/sys-r430-SSE.diff.gz
 
 And there is a patch for 4.0R in Mr. issei's site:
 
 http://www.issei.org/issei/FreeBSD/sse.html

Yes, I'm already using the one for 4.3, and it really improves
(de)coding MPEG. But it does not really work for SMP environments,
and the mail I responded to said, that there was an improved
patch for SMP, at least for current.
Sorry, I should have been more precise: Is there an analogon
to the SMP improved patch, that applies to stable ?

--gt

 PGP signature


Re: support Pentium3 SSE

2001-06-22 Thread Andrew Gallatin


Peter Wemm writes:
  Michael C . Wu wrote:
   On Thu, Jun 21, 2001 at 04:07:25PM +0100, David Malone scribbled:
   | On Wed, Jun 20, 2001 at 05:39:55PM -0400, Andrew Gallatin wrote:
   |  While we're at it, I know that the AMD AthlonMP supports SSE, but I
   
   I think we already detect AthlonMP's SSE automatically.
   I recall reading Peter's dmesg of his Tyan board and seeing
   SSE in the config.
  
  CPU: AMD Athlon(tm) Processor (1194.43-MHz 686-class CPU)
   Origin = AuthenticAMD  Id = 0x661  Stepping = 1
   Features=0x383fbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,\
  MCA,CMOV,PAT,PSE36,MMX,FXSR,SSE
   AMD Features=0xc044b18,AMIE,DSP,3DNow!
  
  Note the FXSR (fast context save and restore) and the SSE flag are there.

Ah, Excellent!  I was confused because the dmesg from the Athlon MP
board that John Baldwin posted about had the only the FXSR flag but
not the SSE flag set.  Interestingly, its the same Id and stepping:

CPU: AMD Athlon(tm) Processor (1194.68-MHz 686-class CPU)
  Origin = AuthenticAMD  Id = 0x661  Stepping = 1 
Features=0x183fbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR
  AMD Features=0xc044b18,AMIE,DSP,3DNow!


I guess it must have been an early rev or something.  

Cheers,

Drew

--
Andrew Gallatin, Sr Systems Programmer  http://www.cs.duke.edu/~gallatin
Duke University Email: [EMAIL PROTECTED]
Department of Computer Science  Phone: (919) 660-6590



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Re: support Pentium3 SSE

2001-06-21 Thread David Malone

On Wed, Jun 20, 2001 at 05:39:55PM -0400, Andrew Gallatin wrote:
 While we're at it, I know that the AMD AthlonMP supports SSE, but I
 can't seem to find which bits they're using in their features for it.
 It would be nice if somebody who knew that spoke up so that we
 supported SSE on Palamino right off the bat..

Is this page any good to you:

http://www.sandpile.org/ia32/cpuid.htm

Otherwise, maybe we can ask someone in AMD.

David.

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Re: support Pentium3 SSE

2001-06-21 Thread Michael C . Wu

On Thu, Jun 21, 2001 at 04:07:25PM +0100, David Malone scribbled:
| On Wed, Jun 20, 2001 at 05:39:55PM -0400, Andrew Gallatin wrote:
|  While we're at it, I know that the AMD AthlonMP supports SSE, but I

I think we already detect AthlonMP's SSE automatically.
I recall reading Peter's dmesg of his Tyan board and seeing
SSE in the config.

|  can't seem to find which bits they're using in their features for it.
|  It would be nice if somebody who knew that spoke up so that we
|  supported SSE on Palamino right off the bat..
| Is this page any good to you:
|   http://www.sandpile.org/ia32/cpuid.htm
| Otherwise, maybe we can ask someone in AMD.

If only we had libraries that did SSE/3DNOW

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+---+
| [EMAIL PROTECTED] | [EMAIL PROTECTED]   |
| http://iteration.net/~keichii | Yes, BSD is a conspiracy. |
+---+

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Re: support Pentium3 SSE

2001-06-21 Thread Peter Wemm

Michael C . Wu wrote:
 On Thu, Jun 21, 2001 at 04:07:25PM +0100, David Malone scribbled:
 | On Wed, Jun 20, 2001 at 05:39:55PM -0400, Andrew Gallatin wrote:
 |  While we're at it, I know that the AMD AthlonMP supports SSE, but I
 
 I think we already detect AthlonMP's SSE automatically.
 I recall reading Peter's dmesg of his Tyan board and seeing
 SSE in the config.

CPU: AMD Athlon(tm) Processor (1194.43-MHz 686-class CPU)
 Origin = AuthenticAMD  Id = 0x661  Stepping = 1
 Features=0x383fbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,\
MCA,CMOV,PAT,PSE36,MMX,FXSR,SSE
 AMD Features=0xc044b18,AMIE,DSP,3DNow!

Note the FXSR (fast context save and restore) and the SSE flag are there.

This is an AthlonMP system:
FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
 cpu0 (BSP): apic id:  1, version: 0x00040010, at 0xfee0
 cpu1 (AP):  apic id:  0, version: 0x00040010, at 0xfee0
 io0 (APIC): apic id:  2, version: 0x00170011, at 0xfec0

and it works very nicely. :-)

Cheers,
-Peter
--
Peter Wemm - [EMAIL PROTECTED]; [EMAIL PROTECTED]; [EMAIL PROTECTED]
All of this is for nothing if we don't go to the stars - JMS/B5


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Re: support Pentium3 SSE

2001-06-20 Thread NAKAMURA Kazushi

In article [EMAIL PROTECTED]
[EMAIL PROTECTED] writes:
I'm going to see if I can commit your SSE patch to freebsd-current.
Since I don't know that much about the code you're patching I have
asked Bruce Evans to have a look at the patch, so he may want to
make changes. I'll try to read the patch in detail over the next
few days.

  This patch has a problem in SMP environment. There is a new patch
by Mr. issei following below. Please test in SMP environment
before commit.

Thank you.

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Re: support Pentium3 SSE

2001-06-20 Thread Andrew Gallatin


NAKAMURA Kazushi writes:
  In article [EMAIL PROTECTED]
  [EMAIL PROTECTED] writes:
  I'm going to see if I can commit your SSE patch to freebsd-current.
  Since I don't know that much about the code you're patching I have
  asked Bruce Evans to have a look at the patch, so he may want to
  make changes. I'll try to read the patch in detail over the next
  few days.
  
This patch has a problem in SMP environment. There is a new patch
  by Mr. issei following below. Please test in SMP environment
  before commit.
  

Nice!

While we're at it, I know that the AMD AthlonMP supports SSE, but I
can't seem to find which bits they're using in their features for it.
It would be nice if somebody who knew that spoke up so that we
supported SSE on Palamino right off the bat..

Drew


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