What sync operation are you doing? At least for PREREAD or PREWRITE,
I'd expect any dirty cache lines to be flushed to RAM. If this isn't
happening, then you may want to submit a bug report.
For a PREREAD, I don't believe that it's correct to flush a dirty
cache line to RAM. That would
1. code modifies data in block and this modification ends up in
cache and is not written back to memory
2. right after this code calls bus_dmamap_sync for this buffer
and as a result cache invalidation is performed
3. Cache function operates on cache line
This problem haunts for a couple of days and I can't find a
nice and clean solution so this email is actually a cry for help.
The problem:
There is a buffer loaded by bus_dmamap_load for use as a
DMA buffer. Right before this buffer resides block of vital
data structure. Consider following
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